Patent Application
20080024394
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.
<Plasma Display Device>
As shown in
In this example, in particular, the control circuit 115 includes a display data control unit 16 provided with a frame memory 119, and driver control units. The driver control units are a scan driver control unit 117 and a common driver control unit 118. Also, as drivers, an address driver circuit 111, an X common driver circuit 114, a scan driver circuit 112, and a Y common driver circuit 113 are provided.
The control circuit 115 generates control signals for controlling each driver of the display panel by using interface signals inputted externally {CLK (clock), D (data), Vsync (vertical synchronization), Hsync (horizontal synchronization)}, thereby controlling each driver. The address driver circuit 111 is controlled by the display data control unit 116 based on a data signal stored in the frame memory 119, and the scan driver circuit 112 is controlled by the scan driver control unit 117. Furthermore, the X common driver circuit 114 and the Y common driver circuit 113 are controlled by the common driver control unit 118.
Each of the drivers drives the electrodes according to the control signals from the control circuit 115. On a display screen of the display panel, an address discharge for determining a display cell 103 is generated by the driving of the address driver circuit 111 and the scan driver circuit 112. Next, a sustain discharge for lighting the display cell 103 is generated by the driving of the X common driver circuit 114 and the Y common driver circuit 113.
A feature of the present embodiment lies in the address driving system including the address driver circuit 111. A first configuration for comparison with the present invention (
In
The address driving board 10a is formed of a flexible board, and an address driver circuit 11 and a power supply smoothing capacitor Cl for a low-voltage signal processing unit of this address driver circuit 11 are mounted on this flexible board.
The address bus board 20a is formed of a rigid board, and a data generation source 21 for display data, a buffer 22 for transmitting the display data from this data generation source 21, a power supply smoothing capacitor C2 for VCC, and a power supply smoothing capacitor C3 for VH are mounted on this rigid board.
This first configuration has a problem that TCP (Tape Carrier Package) (or COF (Chip On Film)) for promoting the reduction in manufacturing cost of the address driving boards 10a cannot be implemented. In other words, the reduction of the manufacturing cost can be achieved by, for example, reducing the number of operation processes. For its achievement, the implementation of TCP (COF) is important. In this TCP (COF) mounting of the address driving boards 10a, it is impossible to mount components which require soldering such as the power supply smoothing capacitor C1. Therefore, they are relocated from the address driving board 10a to the address bus board 20a. That is, the second configuration described next is formed.
The TCP (COF) mounting mentioned here indicates a mounting structure based on a gang bonding method, in which higher-density mounting is possible and productivity can be expected to be improved, instead of a wire bonding method which has been generally used. Further, in the gang bonding method, a plurality of IC chips of driving ICs are successively mounted on a flexible board formed in a tape shape by a reel carrier method, and individual modules each having one driving IC mounted thereon are punched from the board.
Examples of the mounting structure by this gang bonding method are broadly divided into two types. One type is a mounting structure based on COF (Chip On Film). In this structure, a gold bump is attached to a terminal of an IC chip, and the terminal to which the gold bump is attached and a tinned terminal on the flexible board are bonded through thermal compression to form a gold-tin eutectic alloy bonding, thereby connecting the terminals. After the connection of the terminals, a space between the IC chip and the flexible board is filled with sealing resin called underfill, and the resin is then dried to complete the operation.
The other type is a mounting structure based on TCP (Tape Carrier Package). In this structure, a gold bump is similarly attached to a terminal of an IC chip, and a hole called a device hole is provided on a flexible board side and a terminal for connection protrudes as a finger lead in this hole. The finger lead is plated with tin, and after the IC chip is mounted and connected by means of the gold-tin eutectic alloy bonding through the thermal compression in the same manner, protective sealing resin is applied to the mounting surface of the IC chip at the position of the device hole and the resin is then dried for protecting the connecting portion.
A feature of this TCP type is as follows. That is, since the terminal on the IC chip side is connected to the terminal of the device hole portion as described above, the IC chip can be mounted in an arbitrary direction with respect to the orientation of the flexible board. Also, while the direction of mounting the IC chip with respect to the orientation of the flexible board is self-defined in the COF type, mounting in a direction reverse to the direction of the COF type is possible in the TCP type.
The address driving system according to the present embodiment is suitable for the mounting structure of TCP type. However, as a matter of course, it can be applied to a mounting structure of COF type.
In
In this second configuration, TCP (COF) for promoting the reduction in manufacturing cost of the address driving boards 10a can be implemented. However, since the power supply smoothing capacitor C1 is mounted on the address bus board 20b, noise occurs on a GND line of the address driving board 10b due to parasitic inductance (L). This noise is applied to the power supply smoothing capacitor C2 for VCC, and the noise components are superposed on the VCC voltage and then undesirably supplied to the IC of the address driver circuit 11 as VCC. For its prevention, the configuration according to one embodiment of the present invention described next is formed.
In
The address driving board 10 is formed of a flexible board, and an IC chip of an address driver circuit (data driver circuit) 11 is mounted on this flexible board in the above-described mounting structure of TCP (COF) type. This address driver circuit 11 includes a low-voltage signal processing unit 12 for performing signal processing of display data, transistors Q1 and Q2 which are controlled to turn ON and OFF by an output signal from this low-voltage signal processing unit 12, and others.
On this address driving board 10, electrical connection with the IC chip of the address driver circuit 11 is made through a wiring pattern on the address driving board 10. A connection terminal for VH is connected to the transistor Q1 of the address driver circuit 11, a connection terminal for VCC is connected to the low-voltage signal processing unit 12, a connection terminal for display data (Sig) is connected to the low-voltage signal processing unit 12, and a connection terminal for VCC ground (VCCGND) and a connection terminal for VH ground (VHGND) are combined and connected to the low-voltage signal processing unit 12 and the transistor Q2. Also, a connection point between the transistors Q1 and Q2 is connected to an address electrode (A) of a display panel.
The address bus board 20 is formed of a rigid board, and a data generation source 21 for display data, a buffer 22 for transmitting the display data from this data generation source 21, a power supply smoothing capacitor C1 for the low-voltage signal processing unit 12 of the address driver circuit 11, a power supply smoothing capacitor C2 for VCC, and a power supply smoothing capacitor C3 for VH are soldered and mounted on this rigid board.
On this address bus board 20, electrical connection with various mounted components is made through a wiring pattern on the address bus board 20. A connection terminal for VH is connected to the power supply smoothing capacitor C3. Also, a connection terminal for VCC is connected to the buffer 22 and the power supply smoothing capacitors C1 and C2, a connection terminal for Sig is connected to the buffer 22, a connection terminal for VCCGND is connected to the data generation source 21, the buffer 22, and the power supply smoothing capacitors C2 and C3, and a connection terminal for VHGND is connected to the power supply smoothing capacitors C2 and C3. Also, a connection terminal for VH is connected to a high-voltage power supply (VH), and a connection terminal for VCC is connected to a low-voltage power supply (VCC), respectively.
The operation of this address driving system is as follows. On the address bus board 20, display data from the data generation source 21 is transmitted through the buffer 22 and supplied to the address driver circuit 11 of the address driving board 10. In the address driver circuit 11, the received display data is subjected to signal processing in the low-voltage signal processing unit 12 and ON/OFF of the transistors Q1 and Q2 are controlled, thereby performing the operations of charging and discharging the address electrode (A) of the display panel.
In this address driving system, the power supply smoothing capacitors C1 for low-voltage signal processing unit 12 of the address driver circuit 11 mounted on the address driving board 10 is mounted on the address bus board 20, and a parasitic impedance is generated by a power supply line for VCC and a GND line for the return thereof. In this configuration, the GND line connecting the address driving board 10 and the address bus board 20 has two systems such as a GND line for VCC and a GND line for VH supplied to the display panel.
In particular, theses two systems of the GND line for VCC and the GND line for VH are separated from each other near the address driver circuit 11 of the address driving board 10. On the address bus board 20 side, these two systems of lines are combined together near a position connected to a reference GND portion (for example, chassis metal which retains the display panel) serving as an operation reference of the display panel. On the GND line for VCC, an impedance is applied between a connection point of the power supply smoothing capacitor C1 and a point combined to the GND line for VH.
The impedance between the connection point of the power supply smoothing capacitor C1 and the point combined to the GND line for VH is formed by a parasitic element using a pattern in the address bus board 20. Alternatively, it is formed by a resistor or inductance circuit element mounted by soldering on the address bus board 20. On the other hand, the impedance of the GND line for VCC in the address driving board 10 is formed by a parasitic element using a board pattern. In the case where an impedance is formed by using a board pattern, the amount of impedance components can be increased by, for example, increasing the length of the board pattern.
In this address driving system, the impedances of the GND line for VCC and the GND line for VH have the following relation:
(1) The amount of impedance components of the GND line for VCC is larger than the amount of impedance components of the GND line for VH;
(2) The amount of impedance components between the connection point of the power supply smoothing capacitor C1 of the GND line for VCC and the point combined to the GND line for VH is larger than the amount of impedance components of the GND line for VH on the address bus board 20;
(3) The amount of impedance components between the connection point of the power supply smoothing capacitor C1 of the GND line for VCC and the point combined to the GND line for VH is equal to or larger than the amount of impedance components between the point where the GND line for VCC is separated near the address driver circuit 11 of the address driving board 10 and the connection point of the power supply smoothing capacitor C1 on the address bus board 20 side; and
(4) The amount of impedance components between the connection point of the power supply smoothing capacitor C1 of the GND line for VCC and the point combined to the GND line for VH is larger than the amount of impedance components of the GND line for VH on the address bus board 20 and is equal to or larger than the amount of impedance components between the point where the GND line for VCC is separated near the address driver circuit 11 of the address driving board 10 and the connection point of the power supply smoothing capacitor C1 on the address bus board 20 side.
According to the configuration of the present embodiment described above, (1) a charge/discharge current (I) flowing through the capacitance of the address electrode (A) flows through the GND line for VH with low impedance and does not flow through the GND line for VCC. (2) Due to the parasitic inductance of the GND line for VH, noise occurs. This noise is voltage-divided by the parasitic inductance components of the GND line for VCC on the address driving board 10 side and the applied impedance on the address bus board 20 side and is then applied to the power supply smoothing capacitor C2 for VCC. The noise components are then superposed on the VCC voltage and supplied as VCC for the address driver circuit 11. (3) The applied noise between VCC and GND of the address driver circuit 11 is suppressed by the canceling effect owing to the above-described (1) and (2). (4) Thus, by providing two systems of GNDs and applying an impedance onto the GND line for VCC, the increase of VCC application noise is prevented even if the power supply smoothing capacitor C1 is relocated from the address driving board 10 to the address bus board 20.
Therefore, according to the present embodiment, effects described below can be obtained.
(1) The impedance to be applied can be obtained by forming a parasitic inductance by an extension of the GND line. Also, since the number of connection terminals on the GND line between the address driving board 10 and the address bus board 20 does not have to be increased, it is possible to achieve the application of impedance at low cost.
(2) Since the number of components on the address driving board 10 can be reduced, the operation processes of the address driving board 10 can be reduced. Furthermore, TCP (COF) mounting can be easily implemented.
(3) Since the components and connection configuration are not changed, a change in design, manufacture, and facilities can be minimized, and it is possible to form an address driving system which is advantageous in terms of cost.
In the foregoing, the invention made by the inventors of the present invention has been concretely described based on the embodiments. However, it is needless to say that the present invention is not limited to the foregoing embodiments and various modifications and alterations can be made within the scope of the present invention.
The present invention relates to a technology for a plasma display device. In particular, it is usable for the circuit configuration of an address driving system for driving address electrodes of a display panel in a plasma display device.
| Number | Date | Country | Kind |
|---|---|---|---|
| JP2006-205489 | Jul 2006 | JP | national |
The present application claims priority from Japanese Patent Application No. JP 2006-205489 filed on Jul. 28, 2006, the content of which is hereby incorporated by reference into this application.
