Patent Application
20070052624
This Nonprovisional application claims priority under 35 U.S.C. § 119(a) on Patent Application No. 10-2005-0083274 filed in Korea on Sep. 7, 2005 the entire contents of which are hereby incorporated by reference.
1. Field
The present invention relates to a plasma display panel and a driving method thereof.
2. Description of the Background Art
In general, a plasma display panel comprises a phosphor layer within a discharge cell partitioned by a barrier rib, and comprises a plurality of electrodes to apply a driving signal to the discharge cell.
In the plasma display panel, when the driving signal is applied to the discharge cell, a discharge gas filled in the discharge cell generates vacuum ultraviolet rays. The vacuum ultraviolet rays excite phosphors provided within the discharge cell, thereby embodying an image.
Accordingly, an object of the present invention is to provide a plasma display panel and a driving method thereof, for improving an efficiency of light emission and a luminance characteristic.
In one aspect, there is provided a plasma display panel. The plasma display panel comprises a first display electrode provided in a front substrate, a second display electrode provided in a direction intersecting with the first display electrode in a rear substrate, and an address electrode provided in parallel with the second display electrode in the rear substrate.
Implementations may include one or more of the following features. For example, the address electrode is provided in parallel at both sides of the second display electrode within one discharge cell.
The transparent electrode of the first display electrode comprises a protrusion within one discharge cell.
In another aspect, there is provided a method for driving a plasma display panel by applying a driving pulse to an electrode of the plasma display panel that comprises a front substrate comprising a first display electrode, a rear substrate comprising a second display electrode in a direction intersecting with the first display electrode, and two address electrodes provided in parallel at both sides of the second display electrode within one discharge cell formed by an intersection of the first and second display electrodes. The driving method comprises applying a reset pulse to the second display electrode in a reset period; in an address period, applying a scan pulse to the first display electrode, and concurrently applying data pulses to the address electrodes, respectively; and applying a sustain pulse alternately to the first and second display electrodes in a sustain period.
Implementations may include one or more of the following features. For example, the data pulse applied to the address electrode has a reference potential of ground or less.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
The invention will be described in detail with reference to the following drawings in which like numerals refer to like elements.
Preferred embodiments of the present invention will be described in a more detailed manner with reference to the drawings.
Referring to
The front panel 110 comprises a first display electrode (Y) arranged in parallel on a front substrate 111. The rear panel 120 comprises an address electrode (A) and a second display electrode (X) arranged vertically with the first display electrode (Y) on a rear substrate 121.
In the front panel 110 and the rear panel 120, a plurality of the first display electrodes and a plurality of the address electrodes and the second display electrodes are arranged in row and column.
The first display electrode (Y) can be provided as only a single layered bus electrode. However, as shown, the first display electrode (Y) comprises a conductive layer 113 formed of a transparent electrode material such as indium tin oxide (ITO), and a bus electrode 114 formed of a conductive metal, such as chrome (Cr) or silver (Ag), along an edge of the transparent conductive layer 113 to complement a high resistance of the transparent conductive layer 113.
The first display electrode (Y) is a scanning electrode for displaying an image on the front panel 110 when the plasma display panel is driven.
A dielectric layer 112 formed of a low melting point glass having a thickness of about 30 μm is coated on the first display electrode (Y). A protective layer 115 such as oxide magnesium is deposited on the dielectric layer 112.
Like the first display electrode (Y), the second display electrode (X) of the rear substrate can comprise a transparent electrode and a bus electrode, but as shown, is provided as a single layered bus electrode. The address electrode (A) is also provided as a single layered bus electrode.
A dielectric layer 122 is coated at a thickness of about 10 μm on the address electrode (A) and the second display electrode (X). A barrier rib 123 having a height of about 150 μm is arranged on the dielectric layer 122 in a direction parallel with the second display electrode (X) and the address electrode (A).
The barrier rib 123 forms a discharge space.
A structure of a discharge cell formed by the barrier rib is not limited to a stripe structure. The discharge cell structure can be of other structures capable of housing the above electrode arrangement, for example, a waffle structure or a meander structure.
Red, Green, and Blue phosphor layers 125R, 125G, and 125B are formed on the dielectric layer 122 and the barrier rib 123, respectively. The phosphor layers 125R, 125G, and 125B can be also provided only on the barrier rib 123. Unlike this, an additional protective layer (not shown) can be also provided on the phosphor layers 125R, 125G, and 125B to protect the phosphor layers 125R, 125G, and 125B from collision with charged particles.
A discharge gas for plasma discharge is filled in the discharge space between the front panel 110 and the rear panel 120. A unitary pixel formed by the barrier rib is divided into Red, Green, Blue subpixels.
The plasma display panel is driven using a driver for, though not shown, driving each electrode.
Referring to
The first display electrode (Y) is provided on one plane (F), and the second display electrode (X) and the address electrode (A) are provided on the other plane (R).
The second display electrode (X) and the address electrode (A) may not be disposed on the same plane.
The first display electrode (Y) comprises the transparent electrode 113, and the bus electrode 114 that is a metal electrode. As shown in
The second display electrode (X) can comprise only a metal electrode. Alternately, the second display electrode (X) can comprise a transparent electrode and the metal electrode. The transparent electrode can comprise a protrusion 113a within one discharge cell as shown in
Widths of the transparent electrodes of the first display electrode (Y) and the second display electrode (X) can be kept constant in a whole of the plasma display panel. However, the widths of the transparent electrodes can be differentiated depending on a kind of the phosphor provided within the discharge cell.
The address electrode (A) and the second display electrode (X) are spaced a predetermined distance (w1) apart from each other. The spaced distance is about 50 μm or less.
A distance between the first display electrode (Y) and the second display electrode (X) is provided greater than at least a height of the barrier rib so that, when the plasma display panel is driven, the plasma discharge can be induced using a positive column. Preferably, the distance ranges from about 100 μm to 500 μm.
The plasma display panel having the electrode shape and electrode arrangement structure can improve the discharge efficiency at the time of the plasma discharge.
As shown in
In the selected cell, an address discharge is induced between the first display electrode (Y) and the address electrode (A) and thus, negative charges are accumulated on the address electrode (A) and positive charges are accumulated on the first display electrode (Y).
Not illustrated in the drawings, but reference potentials of two electrodes can be differentiated from each other to facilitate formation of a wall voltage when an opposed discharge is induced between the first display electrode (Y) and the address electrode (A) in the address period.
Next, in a sustain period, a sustain pulse (Psus) having a lower voltage than a discharge voltage is applied alternately between the second display electrode (X) and the first display electrode (Y). Thus, the discharge is sustained in the cell selected in the address period.
In a reset period, a state of a wall voltage within a pixel where a sustain discharge has been induced in an earlier sustain period equals to a state of a wall charge of an off cell. For example, at a time point when the sustain discharge ends, a pre-reset pulse can be applied to the first display electrode (Y) and then, a reset operation can be performed in such a manner that a ramp waveform is applied to the second display electrode (X).
Referring to
In the above construction, a reset discharge can be more smoothly induced between the second display electrode (X) and the address electrodes (AL, AR), thereby making wall charges uniform within the discharge cell.
Electrode shape and arrangement structure can be also provided identically with the examples shown in
Referring to
A driving pulse applied to the second display electrode (X) can have a reference potential of a bias voltage (Vb3) lower than the positive voltage (Vb1) applied to the first display electrode (Y).
The driving pulse applied to the second display electrode (X) has a reference potential of positive voltage.
The invention being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2005-0083274 | Sep 2005 | KR | national |
