This application claims priority to and the benefit of Korean Patent Application No. 10-2007-0123808, filed on Nov. 30, 2007, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a plasma display panel (PDP), and more particularly, to an addressing operation of a PDP.
2. Description of the Related Art
In a PDP, a plurality of discharge cells arranged in a matrix are interposed between upper and lower substrates. Scan electrodes and sustain electrodes for generating a discharge between the electrodes are provided on the upper substrate, and a plurality of address electrodes are provided on the lower substrate. The upper substrate and the lower substrate facing each other are bonded together. A discharge gas (e.g., a predetermined discharge gas) is injected between the upper and lower substrates, and phosphors coated in the discharge cells are excited by applying a discharge pulse (e.g., a predetermined discharge pulse) between discharge electrodes (that is, the scan and sustain electrodes) so as to generate visible light, thereby realizing a desired image.
In order to realize gradation (e.g., color, brightness, or gray levels) of images in the PDP, a frame of an image is divided into several sub-fields each having different light emission levels, thereby performing a time-division operation. Each of the sub-fields is divided into a reset period to uniformly generate a discharge, an address period to select a discharge cell, and a sustain period to realize gradation of images according to the number of discharges. In the address period, a kind of auxiliary discharge is generated between the address electrodes and the scan electrodes, and a wall voltage is formed in the selected discharge cells so as to provide an environment suitable for a sustain discharge.
In general, in the address period, a higher voltage is required, as compared to that of a sustain discharge. Reducing an input voltage (that is, the address voltage) for addressing and ensuring a voltage margin are essential for improving the driving efficiency of the PDP and for increasing discharge stability. Moreover, with the development of display devices having full-HD class resolution, the power consumption required in a circuit board is increased as the number of address electrodes allotted for discharge cells is increased in proportion to the number of discharge cells. In addition, a high xenon (Xe) display, in which a partial pressure of Xe among the discharge gas injected inside the PDP is increased, has high luminous efficiency but requires a relatively high address voltage for firing a discharge. Thus, in order to embody a high-efficiency display, a sufficient address voltage margin should be provided.
Embodiments of the present invention provide a plasma display panel (PDP) capable of performing an addressing operation at a low voltage by reducing a distance of a discharge path, thereby enhancing a driving efficiency.
Embodiments of the present invention also provide a high-quality and high contrast display, wherein noise brightness such as discharge light or background light that occurs during an address discharge is removed or reduced, except for light emission.
According to an embodiment of the present invention, there is provided a PDP. The PDP includes: a first substrate and a second substrate facing each other; a plurality of barrier ribs on the second substrate and between the first substrate and the second substrate, the plurality of barrier ribs including a plurality of unit cells; a pair of electrodes including a scan electrode and a sustain electrode spaced apart from each other and extending on the first substrate; a protrusion wall on the second substrate at a position in a unit cell among the plurality of unit cells, the protrusion wall protruding toward the scan electrode, the position corresponding to the scan electrode, wherein the protrusion wall is separated from the barrier ribs by a gap between the protrusion wall and the barrier ribs; a plurality of address electrodes extending on the second substrate and crossing the scan electrode; and a phosphor layer in a part of the unit cell.
The protrusion wall may have a height lower than a height of the barrier ribs.
The PDP may further include a dielectric layer covering the address electrodes, and the protrusion wall may protrude from the dielectric layer toward the scan electrode.
The PDP may further include an electron emission material layer on a surface of the protrusion wall, and the surface faces the scan electrode. The electron emission material layer may extend in a part of the unit cell. Also, the electron emission material layer may continuously cover exterior surfaces of the barrier ribs and the protrusion wall.
The phosphor layer may be in a cell region of the unit cell, and the cell region corresponds to the sustain electrode and is between the protrusion wall and a corresponding barrier rib among the plurality of barrier ribs. The electron emission material layer and the phosphor layer may overlap in a part of the unit cell, and the phosphor layer may be on the electron emission material layer.
According to another embodiment of the present invention, there is provided a PDP. The PDP includes: a first substrate and a second substrate facing each other; a plurality of barrier ribs on the second substrate between the first substrate and the second substrate, the plurality of barrier ribs including a plurality of unit cells; a pair of electrodes including a scan electrode and a sustain electrode spaced apart from each other and extending on the first substrate; a first dielectric layer covering the pair of electrodes and having a groove at a position corresponding to the scan electrode; a protrusion wall on the second substrate at a position in a unit cell among the plurality of unit cells, the protrusion wall protruding toward the scan electrode, the position corresponding to the scan electrode, wherein the protrusion wall is separated from the barrier ribs by a gap between the protrusion wall and the barrier ribs; a plurality of address electrodes extending on the second substrate and crossing the scan electrode; and a phosphor layer in a part of the unit cell.
The protrusion wall may have a height equal to a height of the barrier ribs.
The PDP may further include a second dielectric layer covering the plurality of address electrodes, and the protrusion wall may protrude from the second dielectric layer toward the scan electrode.
The PDP may further include an electron emission material layer may on an area of the second dielectric layer. The electron emission material layer may extend in a part of the unit cell. Also, the area of the second dielectric layer may be between the protrusion wall and a barrier rib among the plurality of barrier ribs. The electron emission material layer and the phosphor layer may be on different parts of the unit cell.
According to yet another embodiment of the present invention, there is provided a PDP. The PDP includes: a first substrate and a second substrate facing each other; a plurality of barrier ribs on the second substrate between the first substrate and the second substrate, the plurality of barrier ribs including a plurality of unit cells; a pair of electrodes including a scan electrode and a sustain electrode spaced apart from each other and extending on the first substrate; a plurality of address electrodes extending on the second substrate and crossing the scan electrode; and a phosphor layer in a part of a unit cell among the plurality of unit cells, wherein the unit cell includes a main discharge space and an auxiliary discharge space.
The part of the unit cell may include the main discharge space.
The PDP may further include a protrusion wall on the second substrate in the unit cell for partitioning the unit cell into the main discharge space and the auxiliary discharge.
The PDP may further include an electron emission material layer on the protrusion wall.
The PDP may further include an electron emission material layer on an area of the second substrate in the auxiliary discharge space.
The above and other features and aspects of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings in which:
a) and 13(b) are diagrams that are related to a conventional technology and illustrate a spatial distribution of electron density generated in a discharge space when discharge pulses respectively having positive and negative polarities are alternatively applied to a pair of scan and sustain electrodes that generate a display discharge; and
a) and 14(b) are diagrams which are related to embodiments of the present invention and illustrate a spatial distribution of electron density generated in a discharge space when discharge pulses respectively having positive and negative polarities are alternately applied to a pair of scan and sustain electrodes that generate a display discharge.
Hereinafter, features and aspects of the present invention will now be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the present invention are shown.
The sustain electrodes X and Y represent respectively a sustain electrode X and a scan electrode Y. Each of the sustain electrodes X and Y may respectively include bus electrodes 112X and 112Y, which constitute a power line for supplying power, and transparent electrodes 113X and 113Y, which are formed of a conductive transparent material, extending across the unit cell S and forming electrical contacts with the bus electrodes 112X and 112Y. The pair of sustain electrodes X and Y may be covered with a front dielectric layer 114 so as not to be directly exposed to a discharge environment, thereby being protected from direct collision with charged particles participating in a discharge. The front dielectric layer 114 may be covered with a protective layer 115 including an MgO thin film. The protective layer 115 may protect the front dielectric layer 114 and induce emission of secondary electrons, thereby serving to activate the discharge.
The address electrode 122 is disposed on the rear substrate 120. The address electrode 122 and the scan electrode Y together perform an address discharge, and are disposed to cross each other in each of the unit cells S. Here, the address discharge represents a kind of auxiliary discharge which precedes a display discharge so as to store priming particles in each of the unit cells S, thereby supporting the display discharge. A discharge voltage applied between the scan electrode Y and the address electrode 122 converges in the vicinity of a discharge gap g (shown in
Referring to
The discharge gap g is a gap between the front dielectric layer 114 (or the protective layer 115) covering the scan electrode Y and the protrusion wall 130 to which an electric field is applied by the address electrode 122. The discharge gap g forms a shortest discharge path, and a discharge electric field converges into the discharge gap g during an address stage (e.g., an address period) so that the gap g becomes a path in which an initial address discharge is performed. Also, in this embodiment, the fact that the protrusion wall 130 is formed at the position corresponding to the scan electrode Y does not mean that the protrusion wall 130 and the scan electrode Y are always arranged to completely overlap each other so as to have a common line widths. In other words, the protrusion wall 130 and the scan electrode Y are disposed to form a common width WO that is the overlapping area between the protrusion wall 130 and the scan electrode Y. Each of the unit cells S is partitioned by the protrusion wall 130 into the main discharge space S1 and the auxiliary discharge space S2 that are adjacent to each other and have different volumes. The main discharge space S1 and the auxiliary discharge space S2 are partitioned by the protrusion wall 130. The main discharge space S1 and the auxiliary discharge space S2 are not functionally separated from each other. That is, the display discharge performed between the sustain electrodes X and Y, and a light emitting effect thereof may be performed in all of the main discharge space S1 and the auxiliary discharge space S2. However, due to a larger volume size, the main discharge space S1 becomes the main light emitting part of a unit cell S.
A phosphor layer 125 is formed in at least a part of the unit cell S. That is, the phosphor layer 125 may be formed in part of the unit cell S, or may be formed inside the whole unit cell S. The phosphor layer 125 may be formed on at least an inner wall of the main discharge space S1 to which the display discharge between the sustain electrode X and the scan electrode Y converges. The phosphor layer 125 may be formed on side surfaces of the barrier rib 124 and the protrusion wall 130 which form the walls of the main discharge space S1, and on an area of the rear dielectric layer 121 therebetween. The phosphor layer 125 is excited by ultraviolet light generated from the display discharge, thereby generating visible light of different colors. For example, by coating red (R), green (G), and blue (B) phosphors in the main discharge space S1, each main discharge space S1 or the unit cell S corresponds to R, G, and B subpixels. In addition, the phosphor layer 125 is not formed on a top surface of the protrusion wall 130. This is because the top surface of the protrusion wall 130 is an opposing discharge surface facing the scan electrode Y during the address stage (e.g., an address period), therefore the phosphor layer 125 is not placed on the top surface to prevent or reduce a discharge interference that can occur due to an electrical property of the phosphor layer 125. In general, different phosphors including different materials have different electrical properties which may affect a sensitive discharge environment. For example, a surface potential of a G phosphor, which is based on zinc silicate such as Zn2SiO4:Mn, has a tendency to be negatively charged, while R and B phosphors, such as Y(V,P)O4:Eu or BAM:Eu, etc., have a tendency to be positively charged. Thus, in order to prevent the occurrence of a discharge interference by the phosphors and to provide a uniform discharge environment, the phosphor layer 125 is not coated on the protrusion wall 130 in order to remove the phosphor from an address discharge path. In a conventional PDP, the phosphor is directly exposed to the path of the address discharge, and thus, even when a uniform address voltage is applied to discharge spaces, a voltage actually applied inside the discharge spaces is changed according to an electrical property of the phosphor inside the discharge spaces. That is, G phosphor (which has a tendency to be negatively charged) serves to decrease the address voltage while R and B phosphors (which have a tendency to be positively charged) serve to increase the address voltage, and therefore, the voltage applied inside the discharge spaces varies even though the address voltage applied to the discharge spaces is uniform. As a result, the address voltage margin is reduced. According to the embodiment of
The address discharge converging around the protrusion wall 130 serves to supply the priming particles for participating in the display discharge and does not directly provide light emission. When discharge light unavoidably occurring from the address charge leaks along with the display light emission, the discharge light creates blurry noise brightness around an emitting pixel, thereby deteriorating resolution of a display. In general, the bus electrode 112Y, which is a part of the scan electrode Y, is made of a metallic conductive material having sufficient conductivity, and thus, discharge light generated in the vicinity of the protrusion wall 130 may be blocked by the opaque bus electrode 112Y which is positioned on the upper part of a unit cell S. Also, a black stripe (not shown) for blocking light may be formed to be parallel to the bus electrode 112Y, in consideration of a path of the discharge light. As described above, according to the described embodiment of the present invention, the protrusion wall 130 is directly formed under the scan electrode Y so as to enable the address discharge to converge in a specific region, thereby easily providing a technical method capable of blocking the discharge light. Employing the opaque bus electrode 112Y is one of a plurality of options for blocking the discharge light. However, in the conventional PDP technology, the display discharge and the address discharge are generated at a same position, and thus, blocking the discharge light is actually impossible or very difficult, and thus display quality unavoidably deteriorates. In particular, in the conventional PDP technology, visible light generated by phosphor activated by the address discharge creates background light, which deteriorates a contrast characteristic. The embodiment of the present invention may realize a HD display having a high contrast by excluding the phosphor layer 125 from the protrusion wall 130 where the address discharge converges, and by removing the background light.
The protrusion wall 130 and the barrier rib 124 may be concurrently formed by applying a patterning (e.g., a predetermined patterning) to a barrier rib paste coated on the rear dielectric layer 121 and by baking the barrier rib paste. Here, in the baking process, when volatile components in the barrier rib paste are removed, the barrier rib paste undergoes volume contraction. If, as illustrated in
Then, the discharge gas is injected, as a source for generating ultraviolet light, inside the unit cell S. A multi-component gas, in which xenon (Xe), krypton (Kr), helium (He), neon (Ne), etc., capable of emitting suitable ultraviolet light by a discharge excitation are mixed with a volume fraction (e.g., a predetermined fraction), may be used as the discharge gas. A conventional method of using a high Xe discharge gas, in which the proportion of Xe is increased, has high luminous efficiency. However, the conventional method requires a high firing voltage, thereby causing an increase in driving power consumption, circuit re-design for increasing nominal power, etc. Considering the aforementioned problems, use of the conventional method is limited. According to the described embodiment of the present invention in which the address voltage margin is increased, sufficient priming particles for firing the discharge may be obtained with lower firing voltage, so that a high Xe PDP having greatly enhanced luminous efficiency can be realized without an increase in driving power consumption.
In the embodiment of the present invention shown in
In the sixth embodiment, the barrier rib 224 and the protrusion wall 230 are formed to have an equal height h. That is, the barrier rib 224 and the protrusion wall 230 have the equal height h, but a groove r having a depth d (e.g., a predetermined depth) is formed in the front dielectric layer 214, so that the discharge gap g may be provided between the protrusion wall 230 and the front dielectric layer 214 (or, the protective layer 215). The groove r is formed at a position corresponding to at least the scan electrode Y, and may be extended to the sustain electrode X.
An electron emission material layer 435 is formed inside an auxiliary discharge space S2. For example, the electron emission material layer 435 is formed on the rear dielectric layer 221 between the protrusion wall 230 and the barrier rib 224. Similar to the aforementioned second embodiment (shown in
SIMULATION RESULT
As described above, the PDP according to embodiments of the present invention can reduce the address voltage by arranging the protrusion wall to face the scan electrode so as to provide the discharge gap, where an address electric field converges. Also, the PDP according to embodiments of the present invention can increase the address voltage margin by removing the discharge interference incurred by the phosphor disposed on a conventional address discharge path. Therefore, a high efficiency display can be realized by using a high Xe discharge gas, and the requirement for reducing power consumption in an HD display corresponding to a full-HD resolution device can be satisfied.
Also, the embodiments of the present invention remove the discharge light or the background light during the address discharge, so that the HD display has a high contrast.
While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims, and their equivalents.
Number | Date | Country | Kind |
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10-2007-0123808 | Nov 2007 | KR | national |