BACKGROUND
The invention relates to plasma display panels, and in particular to methods for driving plasma display panels.
Plasma display devices provide a large flat display screen for full-color images. According to driving methods of current plasma display panels (PDPs), as shown in FIG. 1, each frame is divided into eight sub-fields SF0˜SF7. Each sub-field includes three operating periods, that is, the erase period, the address period, and the sustain period.
FIG. 2 shows a conventional PDP device. A display array 20 of PDP 2 is constructed by sustaining electrodes X1 to Xn, scan electrodes Y1 to Yn, and address electrodes D1 to Dm. The address electrodes D1 to Dm are perpendicular to the sustaining electrodes X1 to Xn and scan electrodes Y1 to Yn. The sustaining electrodes X1 to Xn, the scan electrodes Y1 to Yn, and the address electrodes D1 to Dm are driven by a sustaining driver 21, a scan driver 22, and a data driver 23 respectively.
Referring to FIGS. 1 and 2, in the erase periods R0 to R7, the residual charges of the former sub-field are cleared to normalize the initial conditions of all display units before the address periods A0 to A7. In the address period A0 to A7, address discharges are initiated in the selected display units according to the display data and wall charges are accumulated. That is, the scan driver 22 scans the scan electrodes Y1 to Yn sequentially and transmits address pulses containing the display data to the scan electrodes Y1 to Yn. The wall charges are built to the selected display units by the address discharges between the scan electrodes Y1 to Yn and the address electrodes D1 to Dm. In the sustain periods S0 to S7, sustain discharges for display are repeatedly initiated and visible light is produced in the display units which have accumulated charges through the address discharge in the address periods A0 to A7.
Plasma display devices can provide increased brightness by utilizing delta structure therein. When delta structure is applied in large and high resolution PDPs, however, the increased number of scan electrodes increases the duration of each address period, resulting in decreased duration of each sustain period and decreased brightness. In the related art, the above problems can be solved by utilizing dual scans. FIG. 3 shows a structure of a panel within a plasma display device utilizing dual scans. PDP 3 comprises two display arrays 30 and 30′. Display array 30 is constructed by sustaining electrodes X1 to Xp, scan electrodes Y1 to Yp, and address electrodes D1 to Dm. Display array 30′ is constructed by sustaining electrodes X′1 to X′p, scan electrodes Y′1 to Y′p, and address electrodes D′1 to D′m.
A scan driver 32 controls the scan electrodes Y1 to Yp and Y′1 to Y′p. A sustaining driver 31 controls the electrodes X1 to Xp and X′1 to X′p. A data driver 33 controls the address electrodes D1 to Dm, while a data driver 34 controls the address electrodes D′1 to D′m. In a frame, the data drivers 33 and 34 drive the respective address electrodes simultaneously to decrease the duration of each address period. Compared with the PDD 2 in FIG. 2, however, the PDP 3 in FIG. 3 has more data drivers, resulting in increased size and cost.
SUMMARY
Plasma display panels are provided. An exemplary embodiment of a plasma display panel comprises a display array and an electrode driver. The display array is constructed by a plurality of sustaining electrodes, a plurality of scan electrodes, and a plurality of address electrodes. The scan electrodes are parallel to the sustaining electrodes, and each scan electrode is disposed between two sustaining electrodes. Each address electrode intersects the sustaining electrodes and the scan electrodes at a distance. The electrode driver drives a first scan electrode and a second scan electrode adjacent to the first scan electrode. In a first period, the discharge occurs between the first scan electrode and a first sustaining electrode on one side of the first scan electrode to display a first image. In a second period different from the first period, discharge occurs between the first scan electrode and a second sustaining electrode on the other side of the first scan electrode to display a second image.
Driving methods are provided. An exemplary embodiment of a driving method is applied in a plasma display panel. The plasma display panel comprises a plurality of sustaining electrodes, a plurality of scan electrodes, and a plurality of address electrodes. The scan electrodes are parallel to the sustaining electrodes, and each scan electrode is disposed between two sustaining electrodes. Each address electrode intersects the sustaining electrodes and the scan electrodes at a distance. An embodiment of the driving method comprises driving a first scan electrode and a second scan electrode adjacent to the first scan electrode simultaneously to discharge between the first scan electrode and a first sustaining electrode on one side of the first scan electrode to display a first image, and driving the first and second scan electrodes simultaneously to discharge between the first scan electrode and a second sustaining electrode on the other side of the first scan electrode to display a second image.
DESCRIPTION OF THE DRAWINGS
The invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings, given by way of illustration only and thus not intended to be limitative of the invention.
FIG. 1 shows the timing for driving one frame of a conventional plasma display panel.
FIG. 2 is shows a conventional plasma display panel.
FIG. 3 shows a conventional plasma display panel utilizing dual scans.
FIG. 4 shows an embodiment of a plasma display panel.
FIG. 5 shows an arrangement of display units of the plasma display panel of FIG. 4.
FIGS. 6 and 7 show two fields according to the arrangement of the display units of FIG. 5.
FIG. 8 shows an arrangement of display units of the plasma display panel of FIG. 4.
FIGS. 9 and 10 show two fields according to the arrangement of the display units of FIG. 8.
FIG. 11 shows an embodiment of a plasma display panel.
FIG. 12 shows an arrangement of display units of the plasma display panel of FIG. 11.
FIGS. 13 and 14 show two fields according to the arrangement of the display units of FIG. 12.
FIGS. 15 to 18 show four fields according to the arrangement of the display units of FIG. 12.
FIG. 19 shows an embodiment of a plasma display panel.
DETAILED DESCRIPTION
Plasma display panels (PDPs) are provided. In some embodiments, as shown in FIG. 4, a PDP 4 comprises a display array 40, a sustaining driver 41, a scan driver 41, and a data driver 43. The display array 40 comprises a plurality of display units and is constructed by a plurality of sustaining electrodes, a plurality of scan electrodes, and a plurality of address electrodes. The scan electrodes are parallel to the sustaining electrodes. The address electrode intersects the scan electrodes and the sustaining electrodes at a distance. In the embodiment shown in FIG. 4, six sustaining electrodes X1 to X6, six scan electrodes Y1 to Y6, and six address electrodes D1 to D6 are provided as an example. The scan electrodes Y1 to Y6 and the sustaining electrodes X1 to X6 are disposed alternately. A sustaining driver 41 controls the sustaining electrodes X1 to X6. A scan driver 42 controls the scan electrodes Y1 to Y6 through three link scan electrodes Z1 to Z3. The link scan electrode Z1 is coupled to the scan electrodes Y1 and Y2, the link scan electrode Z2 is coupled to the scan electrodes Y3 and Y4, and the link scan electrode Z3 is coupled to the scan electrodes Y5 and Y6, that is, two adjacent scan electrodes are coupled to each other by the corresponding link scan electrode. In other words, the scan driver 42 controls the scan electrodes Y1 and Y2 at the same time, controls the scan electrodes Y3 and Y4 at the same time, and controls the scan electrodes Y5 and Y6 at the same time. The data driver 43 controls the address electrodes D1 to D6. In the embodiment of FIG. 4, the display units of the display array 40 are arranged in delta structure, as shown in FIG. 5.
In this embodiment, one frame is divided into a first field and second field, each having a plurality of sub-fields. Each sub-field includes three operating periods, that is, an erase period, an address period and a sustain period. It is assumed that the PDP 4 displays an image with a single gray-level. In each sub-field of the first field, the data driver 43 provides an address pulse with address voltage to the address electrodes D1 to D6, the scan driver 42 drives the link scan electrodes Z1 to Z3 sequentially, and the sustaining driver 41 drives the sustaining electrodes X1, X3, and X5 simultaneously. Referring to FIG. 6, discharge occurs between the scan electrode Y1 and the sustaining electrode X1, between the scan electrode Y2 and the sustaining electrode X3, between the scan electrode Y3 and the sustaining electrode X3, between the scan electrode Y4 and the sustaining electrode X5, and between the scan electrode Y5 and the sustaining electrode X5. The discharged display units of the display array 40 irradiate to form the first field, that is, the PDP 4 displays a first image.
In each sub-field of the second field, the data driver 43 provides the address pulse with the address voltage to the address electrodes D1 to D6, the scan driver 42 drives the link scan electrodes Z1 to Z3 sequentially, and the sustaining driver 41 drives the sustaining electrodes X2, X4, and X6 simultaneously. Referring to FIG. 7, discharge occurs between the scan electrode Y1 and the sustaining electrode X2, between the scan electrode Y2 and the sustaining electrode X2, between the scan electrode Y3 and the sustaining electrode X4, between the scan electrode Y4 and the sustaining electrode X4, between the scan electrode Y5 and the sustaining electrode X6, and between the scan electrode Y6 and the sustaining electrode X6. The discharged display units of the display array 40 irradiate to form the second field, that is, the PDP 4 displays a second image. One frame with a single gray-level is composed of the first and second images.
In some embodiments, except for the arrangement of the display array, the structure and control timing of the PDP are the same as those of the PDP 4 in FIG. 4. As shown in FIG. 8, the arrangement of the display array is different from that of the display array 40 in FIG. 4. Referring to FIGS. 9 and 10, the discharged display units of each field are in pairs. In the first field as shown in FIG. 9, for example, the discharge occurs between the scan electrodes Y2 and Y3 and the sustaining electrode X3 to form a plurality of pairs of discharged display units. In the second field as shown in FIG. 10, for example, the discharge occurs between the scan electrodes Y1 and Y2 and the sustaining electrode X3 to form a plurality of pairs of discharged display units.
In some embodiments, as shown in FIG. 11, a PDP 11 is provided. To describe the embodiment clearly, the elements of the PDP 11 same as those of the PDP 4 are identified with the same reference numerals. Twelve sustaining electrodes X1 to X12, six scan electrodes Y1 to Y6, and six address electrodes D1 to D6 are provided as an example. The difference between the PDP 11 and the PDP 4 is the structure of the display array. In the display array 40 of FIG. 4, the scan electrodes Y1 to Y6 and the sustaining electrodes X1 to X6 are disposed alternately. In a display array 110 of FIG. 110, two sustaining electrodes are disposed between two scan electrodes. As shown in FIG. 12, the display units of the display array 110 are arranged in delta structure. In the embodiment of FIG. 12, twelve sustaining electrodes X1 to X12, six scan electrodes Y1 to Y6, and six address electrodes D1 to D6 are provided as an example.
According to the embodiment, one frame is divided into a first field and second field, each having a plurality of sub-fields. Each sub-field includes three operating periods, that is, the erase period, the address period, and the sustain period. It is assumed that the PDP 11 displays an image with a single gray-level. In each sub-field of the first field, the data driver 43 provides an address pulse with address voltage to the address electrodes D1 to D6, the scan driver 42 drives the link scan electrodes Z1 to Z3 sequentially, and the sustaining driver 41 drives the sustaining electrodes X1, X3, X5, X7, X9, and X11 simultaneously. Referring to FIG. 13, the discharged display units of the display array 110 irradiate to form the first field, that is, the PDP 11 displays a first image.
In each sub-field of the second field, the data driver 43 provides the address pulse with the address voltage to the address electrodes D1 to D6, the scan driver 42 drives the link scan electrodes Z1 to Z3 sequentially, and the sustaining driver 41 drives the sustaining electrodes X2, X4, X6, X8, X10, and X12 simultaneously. Referring to FIG. 14, the discharged display units of the display array 110 irradiate to form the second field, that is, the PDP 11 displays a second image. One frame with a single gray-level is composed of the first and second images.
In the structure of the PDP 11, one frame can be divided to first, second, third, and fourth fields, each having a plurality of sub-fields. Each sub-field includes three operating periods, that is, the erase period, the address period, and the sustain period. It is assumed that the PDP 11 displays an image with a single gray-level. In each sub-field of the first field, the data driver 43 provides an address pulse with address voltage to the address electrodes D1 to D6, the scan driver 42 drives the link scan electrodes Z1 to Z3 sequentially, and the sustaining driver 41 drives the sustaining electrodes X1, X5, and X9 simultaneously. Referring to FIG. 15, the discharged display units of the display array 110 irradiate to form the first field, that is, the PDP 11 displays a first image.
In each sub-field of the second field, the data driver 43 provides the address pulse with the address voltage to the address electrodes D1 to D6, the scan driver 42 drives the link scan electrodes Z1 to Z3 sequentially, and the sustaining driver 41 drives the sustaining electrodes X2, X6, and X10 simultaneously. Referring to FIG. 16, the discharged display units of the display array 110 irradiate to form the second field, that is, the PDP 11 displays a second image.
In each sub-field of the third field, the data driver 43 provides the address pulse with the address voltage to the address electrodes D1 to D6, the scan driver 42 drives the link scan electrodes Z1 to Z3 sequentially, and the sustaining driver 41 drives the sustaining electrodes X3, X7, and X11 simultaneously. Referring to FIG. 17, the discharged display units of the display array 110 irradiate to form the third field, that is, the PDP 11 displays a third image.
In each sub-field of the fourth field, the data driver 43 provides the address pulse with the address voltage to the address electrodes D1 to D6, the scan driver 42 drives the link scan electrodes Z1 to Z3 sequentially, and the sustaining driver 41 drives the sustaining electrodes X4, X8, and X12 simultaneously. Referring to FIG. 18, the discharged display units of the display array 110 irradiate to form the fourth field, that is, the PDP 11 displays a fourth image. One frame with a single gray-level is composed of the first, second, third, and fourth images.
According to the above embodiments, since each link scan electrode is coupled to two scan electrodes, the number of electrodes coupled to the scan driver can be decreased by half, thereby decreasing the number of scan drivers in large size PDPs.
In some embodiments according to the PDP 11 in FIG. 11, since the discharging display units are disposed in the same column in each field, as shown FIGS. 12 to 17, two adjacent address electrodes can be coupled to each other. Referring to FIG. 19, a PDP 19 is provided. In FIG. 9, the electrodes D1 and D2 are coupled to a link address electrode C1, the electrodes D3 and D4 are coupled to a link address electrode C2, and the electrodes D5 and D6 are coupled to a link address electrode C3. Thus, a data driver 192 is coupled to only three link address electrodes C1 to C3. The number of link address electrodes is half of that address electrodes. Compared with the conventional PDP, the number of data drivers is decreased.
According to some embodiments, when the PDPs of the embodiments are applied in large plasma display devices, the number of scan drivers and that of data electrodes are decreased, resulting in decreased size and cost.
While the invention has been described in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Patent Application
20060114182
