Patent Application
20250154657
The present invention relates to a two-layer coating film structure formed on a surface of a ceramic or metal substrate to reduce etching by plasma and a manufacturing method thereof.
It is generally known that for process components exposed to plasma during the semiconductor process, etching occurs preferentially in locally recessed areas (grooves; hereinafter referred to as pits) on the surface of the process components, and as time passes, etching progresses to the entire process components, and etching that starts locally spreads to the entire surface of the process components (Byung-Kuk Lee et al., Non-Patent Document 1).
In addition, a protective layer against plasma etching has been formed by coating the surfaces of the process components exposed to plasma during the semiconductor process with a material that is resistant to plasma (e.g. Y2O3, Junichi Iwasawa et al., Non-Patent Document 2).
As an example, the technology disclosed in Korea Patent No. 10-2213756 (Patent Document 1) is a technology for forming a plasma protective coating layer on the surface of a substrate (process component) using a thermal spray method. However, there have been disadvantages that coating layers formed by the thermal spray method always contain cracks and pores, and plasma etching begins locally from these cracks and pores as starting points and spreads to the entire process component.
In addition, the technology disclosed in Korea Patent No. 10-0938474 (Patent Document 2) is a technology for forming a coating layer with no cracks and almost no pores on the surface of a process component using an aerosol deposition (AD) method to produce a protective layer against plasma etching.
The technology disclosed in Korea Patent Publication No. 10-2013-0044170 (Patent Document 3) is a technology for providing intersecting scratches with a depth of 1 to 2 μm on the surface of an aerosol deposition layer, in addition to the technology disclosed in Patent Document 2 for forming an aerosol deposition layer exposed to plasma.
The technology disclosed in Korea Patent No. 10-1563130 (Patent Document 4) is a technology for removing valleys and peaks on the surface of process components, forming a coating film, and then removing valleys and peaks on the surface of this coating film, in addition to the technology disclosed in Patent Document 3, and so this is a technology that exhibits more improved plasma resistance than the technologies disclosed in Patent Documents 1, 2, and 3.
The coating films (layers) of Patent Documents 1 to 4 are commonly produced by applying a technology for spaying and coating powder: Patent Document 1 is by a thermal spray method; Patent Documents 2 and 3 are by an aerosol deposition method, and Patent Document 4 is by a spray-coating method other than a thermal spray method.
Meanwhile, coating methods other than a thermal spray method for forming a plasma protective layer include ion-assisted deposition (IAD), plasma reactive deposition (PRD), plasma enhanced chemical vapor deposition (CVD), plasma enhanced evaporation, physical vapor deposition (PVD), and plasma immersion ion process (PIIP) technology (Korea Patent No. 10-1309716, Patent Document 5), and other methods for forming a plasma protective layer include plasma-enhanced CVD (PECVD), PVD, CVD, and atomic layer deposition (ALD) technologies (Korea Patent Publication 10-2016-0143532, Patent Document 6).
The technologies of Patent Documents 1 to 6 commonly include a single-layer plasma protection layer formed on the surface of a process component exposed to plasma.
Meanwhile, there are technologies in which an additional coating layer is formed between the surface of a process component exposed to plasma and a plasma protection layer.
The technology disclosed in Korea Patent 10-1108692 (Patent Document 7) is a technology for forming an aerosol deposition layer of Patent Document 2 on the thermal spray coating layer of Patent Document 1 to have plasma resistance, and a unique feature thereof is that in the processing of the surface of the coating layer formed on the process component, the roughness (average surface roughness of 0.4 to 2.3 μm) was increased through sand blasting so that the aerosol deposition layer adheres well to the thermal spray coating layer.
The technology disclosed in Korea Patent No. 10-2182690 (Patent Document 8) is a technology for forming a thermal spray coating layer on the surface of a process component exposed to plasma, forming a surface molten layer by melting a part of the surface of the thermal spray coating layer, and forming a surface supplementary layer on the molten layer by an aerosol deposition method.
The technology disclosed in Korea Patent No. 10-1817779 (Patent Document 9) is the same as the technology disclosed in Patent Document 7 in the sense that the aerosol deposition layer of Patent Document 2 is formed on the thermal spray coating layer of Patent Document 1 to achieve plasma resistance, but it is different from the technology disclosed in Patent Document 7 in the sense that the thermal spray coating layer and the aerosol deposition layer are subjected to hydration treatment.
The technology disclosed in Korea Patent No. 10-2019-0057753 (Patent Document 10) is the same as the technology disclosed in Patent Document 7 in the sense that the aerosol deposition layer of Patent Document 2 is formed on the thermal spray coating layer of Patent Document 1 to achieve plasma resistance, but it is different from the technology disclosed in Patent Document 7 in the sense that the surface of the thermal spray coating layer is polished.
As mentioned above, the technologies disclosed in Patent Documents 7 to 10 are common technologies for reducing locally initiated plasma etching by forming a thermal spray coating film (layer) (Patent Document 1) with pores and cracks and an aerosol deposition layer (Patent Documents 2 and 3) reducing the pores and cracks on the surface of process components exposed to plasma.
The purpose of the present invention is to provide a plasma-resistant two-layer coating film structure including a first coating layer formed on a surface of a ceramic substrate and a second coating layer formed on the first coating layer to significantly reduce plasma etching.
To solve the technical problem, the present invention provides a plasma-resistant two-layer coating film structure including: a ceramic or metal substrate having pits on a surface thereof; a first coating layer which is a ceramic coating layer formed without cracks on the surface of the substrate by a spray coating method other than thermal spray, the layer being coated to fill the pits on the surface of the substrate, fine pits accompanying ceramic particle bonding being formed on the surface, and the layer including ceramic polycrystalline bodies having a crystallite size of less than 300 nm; and a second coating layer which is a plasma resistant ceramic film coated by one method of chemical vapor deposition (CVD), physical vapor deposition (PVD), and atomic layer deposition (ALD), the layer being formed to have a surface roughness (Ra) of 0.2 μm or less without a separate grinding process and coated to cover the fine pits to form a surface in which positions that may serve as starting points of plasma etching are minimized, and the layer being crystalline or in a mixed state where both a crystalline phase and an amorphous phase are present.
A semiconductor process component may be applied as the substrate.
The first coating layer may be formed of one or more of Al2O3, Y2O3, Tm2O3, Gd2O3, Dy2O3, Er2O3, and Sm2O3 to be free of cracks and have pores in an amount of 1% by volume or less and a thickness of 20 μm or less.
The second coating layer may be formed as a ceramic film including yttrium (Y) or a ceramic film including a metal oxide. Specifically, the second coating layer may be formed of one or more of Y2O3, YF3, yttrium oxyfluoride (YOF), yttrium aluminum (YAG) yttrium aluminum perovskite (YAP), and yttrium aluminum monoclinic (YAM) or may be formed of one or more of Tm2O3, Gd2O3, Dy2O3, Er2O3, and Sm2O3 to be free of pores and have a thickness of 15 μm or less. The second coating layer may be formed to have surface hardness (Vickers hardness, Hv) of Hv 500 to Hv 1,500.
The present invention provides a manufacturing method of a plasma-resistant two-layer coating film structure, including: (a) a step of forming a first coating layer by spraying ceramic powder by a spray coating method other than thermal spray onto a ceramic or metal substrate having pits on a surface thereof so that the layer is coated to fill the pits on the surface of the substrate, fine pits accompanying ceramic particle bonding being formed on the surface and the layer including ceramic polycrystalline bodies having a crystallite size of less than 300 nm; and (b) a step of forming a second coating layer which is coated by one method of chemical vapor deposition (CVD), physical vapor deposition (PVD), and atomic layer deposition (ALD) to cover the fine pits to form a surface in which positions that may serve as starting points of plasma etching are minimized, the layer being crystalline or in a mixed state where both a crystalline phase and an amorphous phase are present and made of a ceramic film including yttrium (Y) or a metal oxide and having surface roughness (Ra) of 0.2 μm or less.
The method may further include Step (a-0) of grinding the surface of the substrate before the Step (a), and in the Step (a-0), the surface of the substrate may be ground to have a surface roughness (Ra) of 0.2 μm or less.
The method may further include Step (a-1) of grinding the surface of the first coating layer between the Step (a) and the Step (b), and in the Step (a-1), the surface of the first coating layer is ground to have a surface roughness (Ra) of 0.2 μm or less.
The method may further include Step (a-2) of increasing the thickness of the first coating layer; and Step (a-3) of grinding the surface of the first coating layer with the increased thickness, following the Step (a-1). In the Step (a-2), the thickness of the first coating layer may be increased also by a spray coating method other than thermal spray. In the Step (a-3), the surface of the first coating layer with the increased thickness may be ground to have a surface roughness (Ra) of 0.2 μm or less.
The method may further include Step (c) of heat-treating a two-layer coating film structure, following the Step (b).
By forming a plasma-resistant two-layer coating film structure on the surface of a ceramic or metal substrate according to the present invention, the following effects can be obtained.
1. A first coating layer is formed on the surface of a substrate where pits of several micrometers (μm) to tens of micrometers are present, a plasma resistant ceramic membrane is formed by ceramic coating on the first coating layer on which fine pits (starting points where etching by plasma may be concentrated) that are relatively small compared to the pits on the surface of the substrate are present, and a second coating layer with no or significantly reduced pits where plasma etching may be concentrated is formed so that the plasma resistance of the substrate are ensured.
2. Semiconductor process components on which the plasma-resistant two-layer coating film structure is formed have reduced particle adhesion in processes where plasma is applied.
3. Through the above-described plasma etching and particle reduction, semiconductor manufacturing and processing are be conducted continuously and stably, thereby improving the production yield.
4. The product defect rate is reduced after manufacturing and processing of semiconductors or the like.
5. The external cleaning cycle due to replacement of ceramic or metal substrate is extended.
A plasma-resistant two-layer coating film structure including: a ceramic or metal substrate having pits on a surface thereof;
The technical concept of the present invention may be clearly compared with the above-described Patent Documents 1 to 10.
The above-described Patent Document 1 is a thermal spray method, and a coating layer formed by this technology includes cracks and pores, and plasma etching through the cracks and pores is significant.
The above-mentioned Patent Documents 2 to 4 attempt to implement plasma resistance in a single layer by powder spray coating other than thermal spray. According to this group of technologies, an effect of preventing almost all pores and cracks from occurring in a coating layer is implemented, but fine pits are formed on the surface due to bonding between powder particles during the coating process. The fine pits become weak points where plasma etching is concentrated, and the width and depth of the pits increase at those points as starting points, thereby affecting the substrate.
The above-mentioned Patent Documents 5 and 6 are technologies for implementing plasma resistance by forming a single coating layer using a method other than a powder spray coating method. According to this group of technologies, dense coating is achieved, but the coating layer is formed as a thin film with a small thickness, so the coating layer is formed according to the shape of the pits rather than filling the pits on the surface of a substrate, and the morphological features of this coating layer serve as vulnerability to plasma.
The above-mentioned Patent Documents 7 to 10 attempt to implement plasma resistance with a double layer (thermal spray coating layer+aerosol coating layer) by powder spray coating. On the surface of the aerosol coating layer, which becomes a second layer coating layer, the problem of generating fine pits as described in Patent Documents 2 to 4 is present, and since cracks and pores are inevitably accompanied by the thermal spray coating layer, which becomes a first layer coating layer, the first layer coating layer may not sufficiently prevent the spread of etching that starts from the fine pits formed on the second layer coating layer.
On the contrary, in a plasma-resistant two-layer coating film structure of the present invention, a first coating layer is formed by powder spray coating other than thermal spray, and a second coating layer is formed by methods such as CVD, PVD, and ALD in which a coating layer is formed to be relatively dense (e.g., laminated in units of atoms) compared to the first coating layer.
The present invention allows a first coating layer to fill pits on the surface of a substrate even when there are relatively large pits of several micrometers (μm) to tens of micrometers on the surface of the substrate, and fine particles formed on the surface of the first coating layer are covered with a densely coated second coating layer, thereby minimizing the points where plasma etching is concentrated on the surface of the second coating layer and resulting in significantly superior plasma etching resistance compared to the prior arts (Patent Documents 1 to 10).
Hereinafter, the present invention will be described together with the attached drawings.
The present invention provides a plasma-resistant two-layer coating film structure including: a ceramic or metal substrate having pits on a surface thereof; a first coating layer which is a ceramic coating layer formed without cracks on the surface of the substrate by a spray coating method other than thermal spray, the layer being coated to fill the pits on the surface of the substrate, fine pits accompanying ceramic particle bonding being formed on the surface, and the layer including ceramic polycrystalline bodies having a crystallite size of less than 300 nm; and a second coating layer which is a plasma resistant ceramic film coated by one method of CVD, PVD, and ALD, the layer being formed to have a surface roughness (Ra) of 0.2 μm or less without a separate grinding process and coated to cover the fine pits to form a surface in which positions that may serve as starting points of plasma etching are minimized, and the layer being crystalline or in a mixed state where both a crystalline phase and an amorphous phase are present.
The plasma-resistant two-layer coating film structure of the present invention may be manufactured as described in ‘II. Manufacturing method of a plasma-resistant two-layer coating film structure,’ which will be described later.
The structure of the present invention consists of a first coating layer and a second coating layer sequentially laminated on a ceramic or metal substrate as illustrated in
As shown in
The first coating layer is a ceramic film including ceramic polycrystalline bodies having a crystallite size of less than 300 nm.
That the first coating layer includes ceramic polycrystalline bodies means that the first coating layer may be formed to be entirely formed to be polycrystalline or may be partially amorphous.
In other words, by the powder spray coating method, which is a method of forming the first coating layer, powder particles may collide with the substrate at a high speed (or initial speed) or the particles may be crushed by collisions between the powder particles, causing the particles to lose crystallinity and change to an amorphous phase, so that an amorphous phase is partially present between crystals.
In addition, unlike a coating film formed by melting ceramic powder particles by a thermal spray coating method, the polycrystalline bodies of the first coating layer are formed as ceramic powder particles are crushed by collision between the particles and the substrate and between the particles, forming polycrystalline bodies having a crystallite size of less than 300 nm.
The crystallite size of the polycrystalline bodies may be confirmed through a transmission electron microscopy (TEM) photograph, and a component analysis of the ceramic film may be confirmed through an energy dispersive X-ray (EDX) analysis.
The first coating layer may be formed of one or more of Al2O3, Y2O3, Tm2O3, Gd2O3, Dy2O3, Er2O3, and Sm2O3.
Meanwhile, unlike a powder spray coating method, ceramic films formed by a PVD, CVD, or ALD method are generally formed according to the pits on the surface of a substrate as shown in
However, as shown in
In addition, a first coating layer according to the present invention has a thickness of 20 μm or less. The thickness of the first coating layer may be confirmed through a scanning electron microscope (SEM) photograph.
On the other hand, as shown in
In addition, the first coating layer includes pores in an amount of 1% by volume or less. There are no pores, or even when there are pores, the amount is 1% by volume or less. The presence of pores in the first coating layer may be confirmed by a SEM or TEM photograph.
The second coating layer is a plasma-resistant ceramic film formed on the first coating layer. To ensure plasma resistance, it may be formed as a ceramic film including yttrium (Y) or a ceramic film including a metal oxide.
A ceramic film including yttrium (Y) may be formed of one or more of Y2O3, YF3, yttrium oxyfluoride (YOF), yttrium aluminum (YAG, Y3Al5O12) yttrium aluminum perovskite (YAP, YAlO3), and yttrium aluminum monoclinic (YAM, Y4Al2O9).
The ceramic film including a metal oxide may be formed of one or more of Al2O3, Y2O3, Tm2O3, Gd2O3, Dy2O3, Er2O3, and Sm2O3.
The second coating layer may be entirely crystalline, or may be in a mixed state where both a crystalline phase and an amorphous phase are present. When the ceramic film is formed by a method such as CVD, PVD, or ALD, a film that is in a mixed state where both a crystalline phase and an amorphous phase are present may be observed, and when the film in such a state is heat-treated, it becomes an overall crystalline film. Whether the ceramic film of the second coating layer is crystalline or in a mixed state where both a crystalline phase and an amorphous phase are present may be confirmed using a TEM photograph or a selected area (electron) diffraction (SAD, SAED) pattern.
As described above, the first coating layer is coated to fill the pits on the surface of a substrate, but fine pits are formed on the surface, and the fine pits of the first coating layer are covered by the second coating layer so that positions that may serve as starting points of plasma etching are minimized, thereby improving plasma resistance.
The second coating layer is formed to have a thickness of 15 μm or less, but the surface hardness (Vickers hardness, Hv) is Hv 500 to Hv 1,500. As the surface hardness increases, plasma resistance (plasma etching resistance) tends to improve. The second coating layer is formed to have a surface roughness (Ra) of 0.2 μm or less.
The present invention also provides a manufacturing method of a plasma-resistant two-layer coating film structure, including: (a) a step of forming a first coating layer by spraying ceramic powder by a spray coating method other than thermal spray onto a ceramic or metal substrate having pits on a surface thereof so that the layer is coated to fill the pits on the surface of the substrate, fine pits accompanying ceramic particle bonding being formed on the surface and the layer including ceramic polycrystalline bodies having a crystallite size of less than 300 nm; and (b) a step of forming a second coating layer which is coated by one method of chemical vapor deposition (CVD), physical vapor deposition (PVD), and atomic layer deposition (ALD) to cover the fine pits to form a surface in which positions that may serve as starting points of plasma etching are minimized, the layer being crystalline or in a mixed state where both a crystalline phase and an amorphous phase are present and made of a ceramic film including yttrium (Y) or a metal oxide and having surface roughness (Ra) of 0.2 μm or less.
The above-described section of ‘I. Plasma-resistant two-layer coating film structure’ described the characteristics of the plasma-resistant two-layer coating film structure provided by the present invention and the phenomena and effects caused by the characteristics. Hereinafter, a manufacturing method of the plasma-resistant two-layer coating film structure will be described.
The plasma-resistant two-layer coating film structure according to the present invention is manufactured by forming a first coating layer and a second coating layer in the process sequence as shown in [
The Step (a) is a step of forming a first coating layer by spray coating ceramic powder onto a ceramic or metal substrate. As described above, the substrate may be applied to semiconductor processing components.
In the Step (a), the first coating layer may be formed by applying a spray coating method (ALD method, etc.) other than thermal spray.
Before the Step (a), Step (a-0) of grinding the surface of the substrate may further be included to make the pit depth of the surface of the substrate shallow, and in the Step (a-0), the surface of the substrate may be ground to have a surface roughness (Ra) of 0.2 μm or less.
Between the Step (a) and the Step (b), Step (a-1) of grinding the surface of the first coating layer may further be included to make the depth of the find pits on the surface of the first coating layer shallower and make the width narrower. Even in the Step (a-1), the surface of the first coating layer may be ground to have a surface roughness (Ra) of 0.2 μm or less.
Following the Step (a-1), Step (a-2) of increasing the thickness of the first coating layer and Step (a-3) of grinding the surface of the first coating layer with the increased thickness may further be included. In the Step (a-2), the thickness of the first coating layer may be increased also by a spraying coating method other than thermal spray, and in the Step (a-3), the surface of the first coating layer with the increased thickness may be ground to have a surface roughness (Ra) of 0.2 μm or less so that the depth of the fine pits on the first coating layer with the increased thickness is minimized.
The Step (b) is a step of forming a second coating layer consisting of a ceramic film including yttrium (Y) or a ceramic film including a metal oxide by a spray coating method other than thermal spray coating on the first coating layer.
In the Step (b), a second coating layer may be formed by one method of CVD, PVD, and ALD, and the layer being may be formed to have a surface roughness (Ra) of 0.2 μm or less without a separate grinding process
In the Step (b), the second coating layer may be formed to have a thickness of 15 μm or less and a surface hardness (Vickers hardness, Hv) of Hv 500 to Hv 1,500. As the surface hardness increases, plasma resistance (plasma etching resistance) tends to improve.
Various modifications and variations of the present invention are possible without departing from the gist of the present invention, and the present invention may be used in various fields. Therefore, the claims of the present invention include modifications and variations falling within the true scope of the previous invention.
A plasma-resistant two-layer coating film structure and a manufacturing method thereof provided by the present invention can be applied to semiconductor industry.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2022-0036361 | Mar 2022 | KR | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/KR2023/003657 | 3/20/2023 | WO |
