Claims
- 1. A plastic substrate structure on which thin film transistor are formed comprising:a plastic substrate; and a protective layer disposed on said plastic substrate, said protective layer including: a gas barrier layer of silicon nitride disposed directly on said plastic substrate; and a refractory buffer layer of silicon dioxide disposed on said gas barrier layer.
- 2. The substrate structure of claim 1, wherein said gas barrier layer is 50 nm in thickness.
- 3. The substrate structure of claim 1, wherein said refractory buffer layer is 1 μm in thickness.
- 4. The substrate structure of claim 1 further comprising:a gate electrode disposed on said protective layer; and a gate insulator disposed on said gate electrode, said gate insulator including: a first insulator of silicon dioxide film disposed on said gate electrode; and a second insulator of silicon nitride film disposed on said first insulator.
- 5. The substrate structure of claim 1 wherein said protective layer is disposed between said plastic substrate and the thin film transistors formed on said plastic substrate.
Priority Claims (2)
Number |
Date |
Country |
Kind |
P09-191538 |
Jul 1997 |
JP |
|
P10-011496 |
Jan 1998 |
JP |
|
CROSS-REFERENCES TO RELATED APPLICATIONS
This application is a divisional of U.S. application Ser. No. 09/116,119, filed Jul. 16, 1998, now U.S. Pat. No. 6,376,290 entitled “Method of Forming Semiconductor Thin Film and Plastic Substrate.”
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