Patent Application
20110094574
The present invention relates generally to solar cells and, in particular, to a polarization resistant solar cell design.
Photovoltaic cells, commonly referred to as solar cells, are well known semiconductor devices that convert photons into electrical energy.
To enhance the performance of a conventional solar cell, typically a dielectric layer 109 is deposited on the front surface of the solar cell. Dielectric layer 109 serves dual purposes. First, it acts as an anti-reflection (AR) coating, thereby increasing the percentage of incident light that passes into cell 100, resulting in improved conversion efficiency. Second, it forms a passivation layer on the surface of layer 103. In some solar cells, dielectric layer 109 is comprised of a pair of layers; an inner passivation layer and an outer AR layer.
Solar cells are becoming commonplace in a wide range of applications, both due to the increase in energy costs and the growing environmental concerns associated with traditional energy sources. The switch to solar energy has been aided by the gradually improving performance of solar cells and the steady decrease in cell cost. In a typical application, for example a solar array for use on a residential or commercial roof-top or in a solar farm, a large number of solar panels are electrically connected together, each solar panel comprised of a large array of solar cells.
When a solar panel or an array of solar panels is put into operation, a high voltage in excess of 100V may exist between the panel frame or external grounding and one or more terminals of the individual devices. As a result, an electric field is generated that may create a charge on the dielectric layer or layers used in the fabrication of the cell, for example, passivation and AR layer 109 of
The present invention provides a solar cell that is resistant to the polarization effect, the solar cell using a dual layer dielectric stack disposed on the front surface of the cell. The dielectric stack consists of a passivation layer disposed directly on the front cell surface and comprised of either SiOx or SiON, and an outer AR coating comprised of SiCN.
A further understanding of the nature and advantages of the present invention may be realized by reference to the remaining portions of the specification and the drawings.
In accordance with the invention, a two layer dielectric stack is applied to the front surface of cell 200. The dielectric stack is comprised of an inner passivation layer 209 applied directly to layer 203, and an outermost AR layer 211. Passivation layer 209 may be fabricated from either a silicon oxide, i.e., SiOx, or silicon oxynitride, i.e., SiON. AR coating layer 211 is fabricated from amorphous silicon carbon nitride (SiCN). The inventors have found that the use of these two dielectric layers substantially reduces, if not altogether eliminates, the polarization effect typically experienced by the solar cells contained within a module.
In order to achieve the desired level of surface passivation, the thickness of passivation layer 209 is in the range of 1 to 100 nanometers, preferably in the range of 1 to 50 nanometers, and more preferably in the range of 2 to 30 nanometers. If layer 209 is comprised of SiON, rather than SiOx, then the amount of oxygen and nitrogen in the layer is defined by the fraction of oxygen within the layer, i.e., the ratio between oxygen and the sum of oxygen and nitrogen (i.e., O/(O+N)). Preferably the fraction of oxygen is in the range of 0.01 to 0.99, more preferably in the range of 0.1 to 0.9, and still more preferably in the range of 0.4 to 0.9.
AR layer 211, comprised of SiCN as previously noted, has a thickness in the range of 1 to 200 nanometers, preferably in the range of 20 to 120 nanometers, and more preferably in the range of 40 to 100 nanometers. The combined thickness of layers 209 and 211 is in the range of 2 to 300 nanometers with a refractive index in the range of 1.5 to 2.4. In at least one embodiment, SiCN layer 211 is hydrogenated.
It will be appreciated that any of a variety of techniques may be used to form layer 203, form dielectric layers 209 and 211, and apply contacts 205 and 207, and that the present design is not limited to a specific fabrication methodology. In an exemplary process in which layer 209 is comprised of SiOx layer 209 is formed using thermal oxidation, chemical oxidation or CVD oxide deposition. In an exemplary process in which layer 209 is comprised of SiON, layer 209 is deposited using an in-situ silicon oxynitride deposition process (e.g., CVD deposition of SiON). In an alternate process, the SiON layer is formed by first depositing an oxide layer, preferably greater than 4 nanometers in thickness, on top of silicon layer 203, for example using thermal oxidation, chemical oxidation or CVD oxide deposition. Next, a nitride layer is deposited in such a way that the silicon oxide transforms into silicon oxynitride of the desired thickness and composition. Alternately, the previously grown oxide layer can be annealed in a nitrogen environment, thereby transforming the silicon oxide to the desired silicon oxynitride.
It should be understood that identical element symbols used on multiple figures refer to the same structure, or structures of equal functionality. Additionally, the accompanying figures are only meant to illustrate, not limit, the scope of the invention and should not be considered to be to scale.
As will be understood by those familiar with the art, the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. Accordingly, the disclosures and descriptions herein are intended to be illustrative, but not limiting, of the scope of the invention.
This application claims the benefit of the filing date of U.S. Provisional Patent Application Ser. No. 61/279,842, filed Oct. 27, 2009, the disclosure of which is incorporated herein by reference for any and all purposes.
| Number | Date | Country | |
|---|---|---|---|
| 61279842 | Oct 2009 | US |
