Patent Application
20250030383
The present disclosure relates to a power amplification module.
The Doherty amplifier circuit is a high-efficiency power amplifier. The Doherty amplifier circuit is configured such that a carrier amplifier that operates without necessarily depending on the power level of an input signal and a peak amplifier that operates in a case where the power level of the input signal is high are connected in parallel. With such a configuration, the Doherty amplifier circuit can improve the efficiency compared to a normal power amplifier.
The Doherty amplifier circuit described in Patent Document 1 includes a carrier amplifier that operates in Class AB and a peak amplifier that operates in Class C. In the Doherty amplifier circuit, a base bias current lower than the base bias current of the carrier amplifier is supplied to the peak amplifier. In a case where an input signal of the Doherty amplifier circuit is increased, the peak amplifier starts to operate, thereby lowering the load of the carrier amplifier and outputting a large power. In this way, in the Doherty amplifier circuit described in Patent Document 1, the operation is switched depending on the power level of the input signal. Therefore, the gain characteristic and the phase characteristic with respect to the output signal are changed in a case where the peak amplifier starts to operate. For this reason, there is a problem in that the distortion of the output signal is caused, the leakage power to the adjacent channel is increased, or the error vector amplitude is increased. This is caused by the fact that, in a case where the peak amplifier starts to operate, the current flowing to the bias circuit that supplies the bias current to the peak amplifier is small. Therefore, the peak amplifier cannot follow a change in the input signal.
The present disclosure provides a power amplification module including a Doherty amplifier circuit that improves a delay in the response of a bias circuit in a peak amplifier.
A power amplification module according to one aspect of the present disclosure includes a carrier amplifier circuit; a carrier bias circuit that supplies a bias to the carrier amplifier circuit; a peak amplifier circuit; and a peak bias circuit that includes a first transistor having a collector or a drain connected to a reference potential and that supplies a bias to the peak amplifier circuit from an emitter or a source of the first transistor. The peak bias circuit is electrically connected to a current output circuit that outputs a predetermined current from the emitter or the source of the first transistor.
According to the present disclosure, it is possible to provide the power amplification module including the Doherty amplifier circuit that improves a delay in the response of the bias circuit in the peak amplifier.
Hereinafter, embodiments of the present disclosure will be described with reference to drawings. Here, circuit elements having the same reference signs indicate the same circuit elements, and duplicate descriptions thereof will be omitted.
The power amplification module 100 includes, for example, a power amplifier circuit 110, a current output circuit 120, and a current control circuit 130.
The power amplifier circuit 110 is, for example, a Doherty amplifier circuit. The power amplifier circuit 110 outputs a signal obtained by amplifying an input signal to a predetermined amplitude level. The power amplifier circuit 110 is a circuit that operates in a wide power range by changing a load impedance with the operation of the Doherty amplifier circuit.
The current output circuit 120 is, for example, a circuit that controls a bias circuit of a peak amplifier to cause a certain current to flow to the bias circuit in order to eliminate that the bias circuit of the peak amplifier has a large output impedance in a case where a peak amplifier circuit of the Doherty amplifier circuit operates.
The current control circuit 130 is, for example, a circuit that supplies a certain current to the current output circuit 120.
Hereinafter, the configurations of the power amplifier circuit 110, the current output circuit 120, and the current control circuit 130 will be described.
As shown in
The drive stage amplifier circuit 111 amplifies, for example, an input radio frequency (RF) signal RFin and outputs an amplified signal. The frequency of the signal RFin is, for example, about several GHz. The drive stage amplifier circuit 111 is not particularly limited but is configured with, for example, a bipolar transistor such as a heterojunction bipolar transistor (HBT) or a transistor such as a metal-oxide-semiconductor field effect transistor (MOSFET). The same applies to a transistor that is the carrier amplifier 113 and the peak amplifier 115, which will be described below.
Hereinafter, as an example, a transistor will be described as a bipolar transistor. However, the transistor may be the metal-oxide-semiconductor field effect transistor (MOSFET).
In a case where the transistor is the metal-oxide-semiconductor field effect transistor, in the following, “current” is replaced with “voltage”, “gate” is replaced with “base”, “collector” is replaced with “drain”, and “emitter” is replaced with “source”.
The distributor 112 distributes, for example, the amplified signal output from the drive stage amplifier circuit 111 to a signal RF1 input to the carrier amplifier 113 and a signal RF2 input to the peak amplifier circuit 115. Here, the signal RF2 is a signal delayed by approximately 90 degrees with respect to the phase of the signal RF1 through the first phase shifter 117. Here, it is assumed that the term “approximately 90 degrees delayed” includes those delayed by 45 degrees to 135 degrees. The distributor 112 may be, for example, a distribution constant circuit such as a coupling line 3 dB coupler or a Wilkinson type distributor.
The carrier amplifier 113 amplifies, for example, the signal RF1 input through the capacitor 113a to output an amplified signal. The carrier amplifiers 113 are configured to include, for example, a transistor. In addition, a load (not shown) is connected to a collector of the carrier amplifier 113, and the impedance is R in a case where the peak amplifier 115 does not operate, and the impedance is R/2 in a case where the peak amplifier operates (the peak amplifier is saturated). The carrier amplifier 113 is biased, for example, in Class A, Class AB, or Class B. That is, the carrier amplifier 113 amplifies the input signal RF1 to output an amplified signal without necessarily depending on the power level of the input signal.
The carrier bias circuit 114 is, for example, a circuit that supplies a bias current to a base of the carrier amplifier 113. The carrier bias circuit 114 includes, for example, a transistor 114a, a diode 114b, a diode 114c, and a resistor 114d. The transistor 114a has a collector supplied with a power supply voltage Vcc, a base electrically connected to the current control circuit 130, and an emitter electrically connected to the base of the carrier amplifier 113 through the resistor 114d. The bias current supplied to the base of the carrier amplifier 113 is output from the emitter of the transistor 114a. The diode 114b and the diode 114c are electrically connected in series, an anode of the diode 114b is connected to the base of the transistor 114a, and a cathode of the diode 114c is connected to the ground. The diode 114b and the diode 114c set the base potential of the transistor 114a. The diode 114b and the diode 114c may be a transistor in which a base and a collector are diode-connected.
The peak amplifier 115 amplifies, for example, the signal RF2 input through the capacitor 115a to output an amplified signal. The peak amplifier 115 is configured to include, for example, a transistor. The peak amplifier 115 is biased, for example, in Class C. The peak amplifier 115 may be biased in Class A, Class AB, or Class B.
The peak bias circuit 116 is, for example, a circuit that supplies a bias current to a base of the peak amplifier 115. The peak bias circuit 116 includes, for example, a transistor 116a, a diode 116b, a diode 116c, and a resistor 116d. The transistor 116a has a collector supplied with the power supply voltage Vcc, a base electrically connected to the current control circuit 130, and an emitter electrically connected to the base of the peak amplifier 115 through the resistor 116d. The bias current supplied to the base of the peak amplifier 115 is output from the emitter of the transistor 116a. The diode 116b and the diode 116c are electrically connected in series, an anode of the diode 116b is connected to the base of the transistor 116a, and a cathode of the diode 116c is connected to the ground. The diode 116b and the diode 116c set the base potential of the transistor 116a.
The first phase shifter 117 is connected to, for example, the base of the peak amplifier 115. The first phase shifter 117 is, for example, a ¼ wavelength line.
The second phase shifter 118 is, for example, a ¼ wavelength line that is electrically connected to the collector of the carrier amplifier 113. Accordingly, the high efficiency of the carrier amplifier 113 can be realized by changing the load impedance as viewed from an output end of the carrier amplifier 113.
The synthesis unit 119 synthesizes, for example, the amplified signal output from the carrier amplifier 113 and output through the second phase shifter 118 with the amplified signal output from the peak amplifier 115, to output an output signal Pout to the output terminal 102.
The current output circuit 120 controls the peak bias circuit 116 such that, for example, a current is caused to flow to the transistor 116a of the peak bias circuit 116 in a case where the peak amplifier 115 does not perform an amplification operation.
The current output circuit 120 includes, for example, a transistor 121, a transistor 122, a resistor 123, and a resistor 124.
The transistor 121 is, for example, a transistor in which a base and a collector are diode-connected. The transistor 121 has, for example, a collector supplied with a reference current I3 from the current control circuit 130, an emitter electrically connected to the ground (reference potential) through the resistor 123, and a base electrically connected to a base of the transistor 122.
The transistor 122 has a collector electrically connected to the emitter of the transistor 116a of the peak bias circuit 116, a base electrically connected to the base of the transistor 121, and an emitter electrically connected to the ground (reference potential) through the resistor 124.
That is, the current output circuit 120 forms a current mirror circuit with the transistor 121 and the transistor 122. Accordingly, the current output circuit 120 can cause a current Ioffset to flow to the emitter of the transistor 116a of the peak bias circuit 116 in accordance with the reference current Is supplied from the current control circuit 130 and the ratio between the resistance value of the resistor 123 and the resistance value of the resistor 124. For this reason, the current output circuit 120 can cause a current to flow to the transistor 116a in a case where the peak amplifier 115 does not perform an amplification operation. Accordingly, since the current output circuit 120 can reduce the output impedance of the peak bias circuit 116 before the peak amplifier 115 performs the amplification operation, the delay in the response of the peak bias circuit 116 can be prevented.
It is optional that the current output circuit 120 includes the resistor 123 and the resistor 124. In this case, by adjusting the transistor 121, the transistor 122, and the reference current I3, a desired current Ioffset can be caused to flow to the transistor 116a.
The current control circuit 130 is, for example, a circuit that supplies a reference current, which is a certain current, to the carrier bias circuit 114, the peak bias circuit 116, and the current output circuit 120.
The current control circuit 130 includes, for example, a control unit 131, a first current source 132, a second current source 133, and a third current source 134.
The control unit 131 is, for example, a circuit that controls the currents output from each of the first current source 132, the second current source 133, and the third current source 134.
The first current source 132 is, for example, a current source that supplies a reference current I1 to the carrier bias circuit 114. The carrier bias circuit 114 supplies a bias current to the carrier amplifier 113 based on the reference current I1.
The second current source 133 is, for example, a terminal for supplying a reference current I2 to the peak bias circuit 116. The peak bias circuit 116 supplies a bias current to the peak amplifier 115 based on the reference current I2.
The third current source 134 is, for example, a terminal for supplying a reference current I3 to the current output circuit 120.
That is, the current control circuit 130 supplies a certain current according to each of the carrier bias circuit 114, the peak bias circuit 116, and the current output circuit 120. The power amplification module 100 can supply an appropriate current according to each of the carrier bias circuit 114, the peak bias circuit 116, and the current output circuit 120.
Next, the operation of the power amplification module 100 will be described with reference to
The input signal RFin is input to the drive stage amplifier circuit 111 through an input terminal 101. The drive stage amplifier circuit 111 amplifies the input signal RFin to output an amplified signal. The amplified signal is distributed into the signal RF1 and the signal RF2 by the distributor 112. The signal RF1 is input to the carrier amplifiers 113 through the capacitor 113a. The signal RF2 of which the phase is delayed by 90 degrees by the first phase shifter 117 is input to the peak amplifier 115 through the capacitor 115a.
The carrier bias circuit 114 supplies a bias current for Class A, Class AB, or Class B operation to the carrier amplifier 113 through the resistor 114d. The base bias of the carrier bias circuit 114 is generated by supplying a reference current I1 to the diode 114b and the diode 114c from the current control circuit 130. That is, since a current flows to the carrier amplifier 113 even in a case where the power level of the input signal RFin is low, the current also flows to the transistor 114a.
The peak bias circuit 116 supplies a bias current for Class C operation to the peak amplifier 115 through the resistor 116d. The base bias of the peak bias circuit 116 is generated by supplying a reference current I2 to the diode 116b and the diode 116c from the current control circuit 130. That is, since no current flows to the peak amplifier 115 in a case where the power level of the input signal RFin is low, no current flows to the transistor 116a. Accordingly, since the output impedance of the peak bias circuit 116 is high, the time constant is slow, which causes a problem that the envelope of the amplitude of the input signal RFin cannot be followed.
Thus, in the power amplification module 100, the current output circuit 120 is provided to cause a certain current Ioffset to flow to the transistor 116a of the peak bias circuit 116 without necessarily depending on the power level of the input signal RFin. Specifically, the current output circuit 120 outputs (draws) the certain current Ioffset from the emitter of the transistor 116a of the peak bias circuit 116 without necessarily depending on the power level of the input signal RFin. That is, with the power amplification module 100 in operation, the transistor 116a is always in an ON state without necessarily depending on the power level of the input signal RFin. In other words, even in a period in which the peak amplifier 115 is not supplied with a current and does not operate, the transistor 116a of the peak bias circuit 116 is supplied with a current. Accordingly, in the power amplification module 100, the output impedance of the peak bias circuit 116 can be reduced even in a case where the peak amplifier 115 starts to operate.
Here, a mechanism for causing the current Ioffset to flow to the transistor 116a of the peak bias circuit 116 will be described. The current output circuit 120 forms a current mirror circuit. The current output circuit 120 supplies a reference current I3 to the collector of the transistor 121 from the current control circuit 130. Then, the current output circuit 120 can cause the current Ioffset according to the ratio of the resistances of the resistor 123 and the resistor 124 to flow to the transistor 116a.
Next, a power amplification module 100a according to a first modification example will be described with reference to
As shown in
Specifically, the carrier bias circuit 114 includes the diode 114b and the diode 114c in which a collector and a base are diode-connected. In the power amplification module 100a, to form the current output circuit 120a, the emitter of the diode 114c is electrically connected to the ground through the resistor 125, and the transistor 126 is provided. The transistor 126 has a base electrically connected to a base of the diode 114c, a collector electrically connected to the emitter of the transistor 116a, and an emitter electrically connected to the ground through the resistor 127. That is, the transistor 126 forms the diode 114c and the current mirror circuit. Accordingly, in the power amplification module 100a, the transistor 126 can cause the certain current Ioffset to flow to the transistor 116a without necessarily depending on the power level of the input signal RFin.
In the power amplification module 100a, the third output terminal 134 of the current control circuit 130 in the power amplification module 100 can be reduced by making the reference current I3 supplied to the current output circuit 120 common with the reference current I1 supplied to the carrier bias circuit 114. Hence, the power amplification module 100a is configured with a smaller circuit than the power amplification module 100.
Next, a power amplification module 100b according to a second modification example will be described with reference to
As shown in
Specifically, the transistor 116a of the peak bias circuit 116 has a base electrically connected to the base of the transistor 114a of the carrier bias circuit 114, a collector supplied with the power supply voltage Vcc, and an emitter electrically connected to the base of the peak amplifier 115 through the resistor 116d. That is, since the peak amplifier 115 has a base potential set by the diodes 114b and 114c, the bias condition for Class C is not established.
Thus, in the power amplification module 100b, the peak amplifier 115 can be operated in Class C by connecting the current output circuit 120 to the emitter of the transistor 116a of the peak bias circuit 116 to draw the current Ioffset from the emitter of the transistor 116a.
Accordingly, in the power amplification module 100b, the second output terminal 133 of the current control circuit 130 and the diodes 116b and 116c in the power amplification module 100 can be removed while operating the peak amplifier 115 in Class C. Hence, the power amplification module 100b is configured with a smaller circuit than the power amplification module 100.
Next, a power amplification module 100c according to a third modification example will be described with reference to
As shown in
The current output circuit 120c controls the peak bias circuit 116 such that a current is caused to flow to the transistor 116a of the peak bias circuit 116, for example, in a case where the peak amplifier 115 does not perform an amplification operation.
The current output circuit 120c includes, for example, a transistor 121c, a transistor 122c, a transistor 123c, a resistor 124c, and a resistor 125c.
The transistor 121c is, for example, a transistor in which a base and a collector are diode-connected. The transistor 121 has, for example, a collector supplied with a reference current I1 the current control circuit 130, a base electrically connected to the bases of the carrier amplifier 113 and the peak amplifier 115, and an emitter electrically connected to the emitter of the transistor 122c.
The transistor 122c is, for example, a transistor in which a base and a collector are diode-connected. The transistor 122c has an emitter electrically connected to the ground through a resistor 124c, and a base electrically connected to a base of the transistor 123c.
The transistor 123c has a base electrically connected to the base of the transistor 122c, a collector electrically connected to the emitter of the transistor 116a, and an emitter electrically connected to the ground through the resistor 125c.
That is, the current output circuit 120c sets the base potential of the transistor 114a and the transistor 116a by the transistor 121c and the transistor 122c that are diode-connected. In addition, the current output circuit 120c forms a current mirror circuit with the transistor 122c and the transistor 123c. Accordingly, the current output circuit 120c can cause the current Ioffset to flow to the emitter of the transistor 116a of the peak bias circuit 116 in accordance with the reference current I1 supplied from the current control circuit 130.
Accordingly, in the power amplification module 100c, the current output circuit 120c is connected to the emitter of the transistor 116a to draw the current Ioffset to operate the peak amplifier 115 in Class C. In addition, the current output circuit 120c can cause a current to flow to the emitter of the transistor 116a even in a case where the peak amplifier 115 does not perform an amplification operation.
Next, a power amplification module 200 according to a second embodiment will be described with reference to
As shown in
The current output circuit 220 includes, for example, a transistor 221, a transistor 222, a resistor 223, a resistor 224, and a resistor 225. Since each of the transistor 221, the resistor 223, and the resistor 224 is the same as each of the transistor 121, the resistor 123, and the resistor 124, the descriptions thereof will be omitted.
The transistor 222 has, for example, a collector electrically connected to the node 215b through a resistor 225, a base electrically connected to a base of the transistor 221, and an emitter electrically connected to the ground through a resistor 224. That is, the transistor 222 draws the current Ioffset from the emitter of the transistor 216a through the resistor 225. In the power amplification module 200, the resistor 225 may be a resistor showing a resistance value close to 0Ω, or it is not necessary that the current output circuit 220 includes the resistor 225.
Next, the operation of the power amplification module 200 will be described. A diode-connected bipolar transistor is turned on at a voltage of about 1.3 V. That is, the base potential of the transistor 216a is about 2.6 V in a case where the reference current I2 flows. Therefore, the emitter potential of the transistor 216a is about 1.3 V. Then, the peak amplifier 215 is turned on in a case where the input signal RFin is small. Thus, the power amplification module 200 is configured such that the current output circuit 220 draws the current Ioffset through the resistor 216d connected in series between an emitter of the transistor 216a and a node 215b, in order to appropriately operate the peak amplifier 215. Accordingly, in the power amplification module 200, the peak amplifier 215 can be appropriately operated in Class C by using the voltage drop of the resistor 216d while causing a current to flow to the transistor 216a.
Next, a case where a plurality of the peak amplifiers 215 are configured in the power amplification module 200 will be described with reference to
As shown in
The collector of the transistor 222 of the current output circuit 220 is electrically connected to each of the nodes 215b through each of the resistors 225. That is, each transistor 222 draws the current Ioffset from the emitter of the transistor 216a through each of the resistors 216d and each of the resistors 225.
In this way, by configuring the plurality of peak amplifiers 215 and isolation-supplying the base bias from the transistor 216a to each of the plurality of peak amplifiers 215 via an individual resistor 216d interposed therebetween, it is possible to suppress the thermal runaway due to the variation in the current driving capability of the transistors constituting the peak amplifiers. In order to draw the current Ioffset from the emitter of the transistor 216a while maintaining the effect of suppressing the thermal runaway, in the present embodiment, the current Ioffset is drawn from the emitter of the transistor 216a through each of the resistors 216d, instead of directly drawing the current Ioffset from the emitter of the transistor 216a. Moreover, in the power amplification module 200, the current Ioffset is also drawn from the transistor 222 through the resistor 225 in addition to the resistor 216d. Accordingly, there is an effect of reducing the interference received by the transistor 222 in a case where the RF signal is applied to the base 215b of the transistor 215 via the capacitor 215a.
Accordingly, in the power amplification module 200, a current can always be caused to flow to the transistor 216a of the peak bias circuit 216. Hence, in the power amplification module 200, the output impedance of the peak bias circuit 216 can be kept low even in a case where a current suddenly flows to the transistor of the peak amplifier.
In addition, in the power amplification module 200, a deep Class C bias can be applied to each of the plurality of peak amplifiers 215. Hence, in the power amplification module 200, since the peak amplifiers can be operated only in a case where the input signal is large, the power consumption can be reduced.
Next, a power amplification module 300 according to a third embodiment will be described with reference to
As shown in
Next, an example in which a plurality of the peak amplifiers 315 are configured in the power amplification module 300 will be described with reference to
As shown in
One end of each of the resistors 320a1, 320a2, and 320a3 is electrically connected to each of the nodes 315b, and the other end thereof is electrically connected to the ground. That is, each of the plurality of resistors 320a draws the current Ioffset from the emitter of the transistor 316a.
In this way, by configuring the plurality of peak amplifiers 315 and separately supplying the base bias from the transistor 216a to each of the plurality of peak amplifiers 215 through an individual resistor 216d, it is possible to suppress the thermal runaway due to the variation in the current driving capability of the transistors constituting the peak amplifiers. In order to draw the current Ioffset from the emitter of the transistor 216a while maintaining the effect of suppressing the thermal runaway, in the present embodiment, the current Ioffset is drawn from the emitter of the transistor 216a by connecting the resistor 320a constituting the current output circuit to each of the resistors 216d, instead of directly drawing the current Ioffset from the emitter of the transistor 216a.
Accordingly, in the power amplification module 300, a current can be caused to always flow to the transistor 316a of the peak bias circuit 316. Hence, in the power amplification module 300, the output impedance of the peak bias circuit 316 can be kept low even in a case where a current suddenly flows to the transistor of the peak amplifier.
In addition, in the power amplification module 300, a deep C class bias can be applied to each of the plurality of peak amplifiers 315. Hence, in the power amplification module 300, since the peak amplifier can be operated only in a case where the input signal is large, the power consumption can be reduced.
Next, another example in which a plurality of the peak amplifiers 315 are configured in the power amplification module 300 will be described with reference to
As shown in
Next, a power amplification module 400 according to a fourth embodiment will be described with reference to
As shown in
The transistor 421 has a base electrically connected to the current control circuit 430, a collector supplied with the power supply voltage Vcc, and an emitter electrically connected to a base of the transistor 426 through the resistor 425. A reference current I3 is supplied from a third output terminal 433 of the current control circuit 430 to a base of the transistor 421. One end of each of the diode 422, the diode 423, and the resistor 424, which are electrically connected in series, is electrically connected to the base of the transistor 421, and the other end thereof is electrically connected to the ground. The base potential of the transistor 421 is set by the diode 422, the diode 423, and the resistor 424.
The transistor 426 has a base electrically connected to the emitter of the transistor 421, a collector electrically connected to an emitter of a transistor 416a of a peak bias circuit 416, and an emitter electrically connected to the ground through the resistor 427. In addition, the input signal RF2 is input to the base of the transistor 426 through a capacitor 428.
Next, the operation of the power amplification module 400 will be described. In the power amplification module 400, the current Ioffset is caused to flow from the emitter of the transistor 416a to the collector of the transistor 426 in accordance with the reference current I3 input to the base of the transistor 421. Moreover, in the power amplification module 400, a current ISB that is a self-bias current is caused to flow from the emitter of the transistor 416a to the collector of the transistor 426 in accordance with the input signal RF2 input to the base of the transistor 426. That is, in the power amplification module 400, since the current ISB is increased in a case where the power level of the input signal RF2 is increased, it is possible to suppress the operation of a peak amplifier 415 in the low input signal RF2.
Here, the current ISB is adjusted by the capacitance value of the capacitor 428 and the resistance value of the resistor 427. That is, the current output circuit 420 adds the current ISB flowing by the self-bias effect to the current Ioffset in a case where the power level of the input signal RF2 is increased by inputting the input signal RF2 input to the peak amplifier 415 to the transistor 426.
Next, a power amplification module 400a according to a fourth modification example will be described with reference to
As shown in
An example of the configuration of the limiter circuit 440 will be described with reference to
As shown in
The reference voltage circuit 441 includes, for example, a transistor 441a, a resistor 441b, and a resistor 441c. A reference current IL is input to the collector of a transistor 441a and is electrically connected to a base of the transistor 442. An emitter of the transistor 441a is electrically connected to the ground. The resistor 441b electrically connects a base and the collector of the transistor 441a. The resistor 441c electrically connects the base and the emitter of the transistor 441a. That is, the reference voltage circuit 441 generates a voltage αVbe, which is α times a base-emitter voltage Vbe of the transistor 441a, at a collector of the transistor 442. The “α times” is a multiple obtained by dividing the sum of the resistance value of the resistor 442b and the resistance value of the resistor 442c by the resistance value of the resistor 442c.
The transistor 442 has a collector electrically connected to the emitter of the transistor 416a, and an emitter electrically connected to the collector of the transistor 426 through the resistor 443. The potential of the emitter of the transistor 442 is (α−1)Vbe. The transistor 444 has a collector and a base electrically connected to the emitter of the transistor 442, and an emitter electrically connected to the ground.
That is, in the limiter circuit 440, in a case where the collector current of the transistor 426 is increased, the voltage drop of the resistor 443 is increased. In this case, the potential of the collector of the transistor 426 is lowered. For this reason, an increase in current flowing to the collector of the transistor 442 is suppressed. Here, the transistor 444 operates as a protection circuit in a case where the power level of the input signal RF2 is increased.
In the above description, the limiter circuit 440 is described as a circuit different from the current output circuit 420. However, for convenience, the limiter circuit 440 is merely described as being a circuit different from the current output circuit 420, and the present disclosure is not limited to this. For example, the current output circuit 420 may be an integrated circuit including the limiter circuit 440.
Next, a limiter circuit in which a connection position of the resistor 443 in the limiter circuit 440 shown in
Next, a power amplification module 400b according to a fifth modification example will be described with reference to
As shown in
Specifically, the transistor 421 of the current output circuit 420 has a base electrically connected to a base of a transistor 414a of the carrier bias circuit 414, a collector connected to the power supply voltage Vcc, and an emitter electrically connected to the base of the transistor 426 through the resistor 425. That is, since the transistor 421 has a base potential set by the diodes 414b and 414c, the transistor 421 operates under the same bias condition as the carrier bias circuit 414.
In addition, in the power amplification module 400b, the transistor 426 has an emitter electrically connected to the ground directly. In addition, the limiter circuit 440 is provided such that, for example, the collector of the transistor 426 is electrically connected to a base of the peak amplifier 415 through a resistor 445, and the emitter of the transistor 416a is electrically connected to the collector of the transistor 426 indirectly through the resistor 445. In this way, the limiter circuit 440 can also be applied to a case where the current Ioffset is drawn from the emitter of the transistor 416a shown in the power amplification module 200 according to the second embodiment via a ballast resistor. In this case, since the deep Class C bias can be applied to the peak amplifier 415, the peak amplifier 415 can be completely turned off to reduce the power consumption.
Next, a power amplification module 500 according to a fifth embodiment will be described with reference to
As shown in
The current output circuit 520 includes, for example, transistors 521 to 527, resistors 528a to 528e, and a capacitor 529.
The transistor 521 is, for example, a transistor in which a base and a collector are diode-connected. The transistor 521 has, for example, a collector electrically connected to an emitter of the transistor 522, an emitter electrically connected to the ground through a resistor 528a, and a base electrically connected to a base of the transistor 523.
The transistor 522 is, for example, a transistor in which a base and a collector are diode-connected. The transistor 522 has, for example, a collector electrically connected to the third output terminal 534 of the current control circuit 530, an emitter electrically connected to the collector of the transistor 521, and a base electrically connected to a base of a transistor 524 and a base of a transistor 525.
The transistor 523 has, for example, a collector electrically connected to the limiter circuit 540 to be supplied with the current Ioffset, an emitter electrically connected to the ground through a resistor 528b, and a base electrically connected to the base of the transistor 521.
The transistor 524 has, for example, a collector supplied with the power supply voltage Vcc, an emitter electrically connected to a base of a transistor 526 through a resistor 528c, and a base electrically connected to the base of the transistor 522.
The transistor 525 has, for example, a collector supplied with the power supply voltage Vcc, an emitter electrically connected to a base of the transistor 527 through a resistor 528d, and a base electrically connected to the base of the transistor 522.
The transistor 526 has, for example, a collector electrically connected to the limiter circuit 540, an emitter electrically connected to the ground (reference potential) through the resistor 528e, and a base electrically connected to the emitter of the transistor 524 through the resistor 528c. The input signal RF2 is input to the base of the transistor 526 through a capacitor 529.
The transistor 527 has, for example, a collector electrically connected to the limiter circuit 540, an emitter electrically connected to the ground through a resistor 528f, and a base electrically connected to the emitter of the transistor 525 through the resistor 528d.
The limiter circuit 540 includes, for example, transistors 541 and 542, resistors 543 and 545, and diodes 544 and 546. The diodes 544 and 546 may be transistors in which a base and a collector are diode-connected.
The transistor 541 has a collector supplied with the power supply voltage Vcc, an emitter electrically connected to the collector of the transistor 523, and a base electrically connected to the collector of the transistor 526. In addition, an emitter of the transistor 541 is electrically connected to the emitter of the transistor 542. In addition, the transistor 541 has a collector electrically connected to an anode of the diode 544, and a base electrically connected to a cathode of the diode 544 through the resistor 543.
The transistor 542 has a collector electrically connected to an emitter of a transistor 516a, an emitter electrically connected to the collector of the transistor 523, and a base electrically connected to the collector of the transistor 527. In addition, the emitter of the transistor 542 is electrically connected to the emitter of the transistor 541. In addition, the base of the transistor 542 is electrically connected to a cathode of the diode 546 through the resistor 545. The power supply voltage Vcc is supplied to an anode of the diode 546.
That is, the limiter circuit 540 is a differential pair of circuits formed of the transistor 541 and the transistor 542.
It is not necessary that the limiter circuit 540 includes the diode 544 and the diode 546.
Next, the operation of the power amplification module 500 will be described.
In the power amplification module 500, the input signal RF2 is input to the base of the transistor 526 through the capacitor 529. A bias is supplied to the base of the transistor 526 through the transistor 524 and the resistor 528c. A bias is supplied to the base of the transistor 527 through the transistor 525 and the resistor 528d. The base potential of the transistor 541 of the limiter circuit 540 is determined by the collector current of the transistor 526 and the characteristics of the resistor 543 and the diode 544. The base potential of the transistor 542 of the limiter circuit 540 is determined by the collector current of the transistor 527 and the characteristics of the resistor 545 and the diode 546.
Here, the operation of the current output circuit 520 and the limiter circuit 540 in a situation where the peak amplifier 515 does not operate will be described. In a case where a current flowing to the transistor 526 is the same as a current flowing to the transistor 527, and the impedance of the resistor 543 and the diode 544 and the impedance of the resistor 545 and the diode 546 are the same impedance, the base potential of the transistor 541 is equal to the base potential of the transistor 542.
Then, a current that is half of the current Ioffset flowing to the collector of the transistor 523 flows to the emitter of the transistor 516a.
Then, as the power level of the input signal RF2 increases, the current flowing to the collector of the transistor 526 increases, and a current flowing to the emitter of the transistor 516a is equal to the current Ioffset. In this way, in the power amplification module 500, the current Ioffset is controlled in accordance with the base potential of the differential pair of transistors 541 and 542. In this case, since the current Ioffset is not controlled in accordance with the collector potential of the transistor 426, it is possible to suppress an increase in diffusion capacitance between the base and the collector of the transistor 426 and to prevent a delay in a case where the collector potential of the transistor 426 is raised. Therefore, the response speed of the limiter circuit 540 is increased.
In addition, in the above description, the base potential of the transistor 541 and the base potential of the transistor 542 are described as being equal to each other, but the present disclosure is not limited to this. For example, in the power amplification module 500, by adjusting the resistance value of the resistor 545 and the bias condition of the transistor 527, a current flowing to the transistor 516a in a case where the peak amplifier 515 does not operate can be adjusted.
In addition, in the above description, the emitter of the transistor 541 may be electrically connected to the emitter of the transistor 542 through a resistor. Accordingly, the response speed of the limiter circuit 540 can be adjusted.
Next, a power amplification module 500a according to a sixth modification example will be described with reference to
The power amplification module 500a is configured such that the collector of the transistor 541 is electrically connected to the emitter of the transistor 516a, and the power supply voltage Vcc is supplied to the collector of the transistor 542, compared to the power amplification module 500.
In the power amplification module 500a, as the input signal RF2 increases, the current flowing to the transistor 516a decreases and finally does not flow. That is, the power amplification module 500a has a configuration effective in a case where the peak amplifier 515 can sufficiently largely secure the bias current by the self-bias effect.
A power amplification module 100 according to an exemplary embodiment of the present disclosure includes a carrier amplifier 113, a carrier bias circuit 114 that supplies a bias to the carrier amplifier 113, a peak amplifier 115, and a peak bias circuit 116 that includes a transistor 116a (first transistor) having a collector or a drain connected to a reference potential and that supplies a bias to the peak amplifier 115 from an emitter or a source of the transistor 116a (first transistor), and the peak bias circuit 116 is electrically connected to a current output circuit 120 that outputs a predetermined current from the emitter or the source of the transistor 116a (first transistor). Accordingly, the power amplification module 100 improves the delay in the response of the bias circuit in the peak amplifier.
In addition, the power amplification module 100 according to the exemplary embodiment of the present disclosure further includes the current output circuit 120. Accordingly, the power amplification module 100 improves the delay in the response of the bias circuit in the peak amplifier.
In addition, the current output circuit 120 of the power amplification module 100 according to the exemplary embodiment of the present disclosure includes a transistor 121 (second transistor) that has a collector or a drain supplied with a reference current I3 (first current) from the current control circuit 130 and an emitter or a source electrically connected to the reference potential and that is diode-connected, and a transistor 122 (third transistor) having a base or a gate electrically connected to a base or a gate of the transistor 121 (second transistor), a collector or a drain electrically connected to the emitter or the source of the transistor 116a (first transistor) and an emitter or a source electrically connected to the reference potential. Accordingly, in the power amplification module 100, since the output impedance of the peak bias circuit 116 can be reduced before the peak amplifier 115 performs an amplification operation, it is possible to prevent the delay in the response of the peak bias circuit 116.
In addition, the transistor 121 (second transistor) of the power amplification module 100 according to the exemplary embodiment of the present disclosure has an emitter or a source electrically connected to the reference potential through a resistor 123 (first resistor), and the transistor 122 (third transistor) has an emitter or a source electrically connected to the reference potential through a resistor 124 (second resistor). Accordingly, in the power amplification module 100, since the output impedance of the peak bias circuit 116 can be reduced before the peak amplifier 115 performs an amplification operation, it is possible to prevent the delay in the response of the peak bias circuit 116.
In addition, an emitter or a source of a transistor 216a (first transistor) of a power amplification module 200 according to an exemplary embodiment of the present disclosure is electrically connected to a node 215b through a resistor 216d (third resistor), the node 215b being electrically connected to an input terminal of the peak amplifier 215, and a collector or a drain of a transistor 222 (third transistor) of the current output circuit 220 is electrically connected to the node 215b through a resistor 225 (fourth resistor). Accordingly, in the power amplification module 200, since the deep Class C bias can be applied to each of a plurality of the peak amplifiers 215, the peak amplifier can be operated only in a case where the input signal is large. Therefore, the power consumption can be reduced.
In addition, the carrier bias circuit 114 of a power amplification module 100a according to an exemplary embodiment of the present disclosure includes a transistor 114a (fourth transistor) having a collector or a drain connected to the reference potential, and in the current output circuit 120a, a collector or a drain of a transistor 114c (second transistor) is supplied with a reference current I1 (first current) from the current control circuit 130 through a diode-connected transistor 114b (fifth transistor), and a base or a gate of a transistor 114a (fourth transistor) is electrically connected to a base or a gate of the transistor 114b (fifth transistor). Accordingly, the power amplification module 100a can be configured with a small circuit.
In addition, the carrier bias circuit 114 of a power amplification module 100b according to an exemplary embodiment of the present disclosure includes a transistor 114a (fourth transistor) having a collector or a drain connected to the reference potential, and a base or a gate supplied with a reference current I2 (second current) different from the reference current I1 (first current) from the current control circuit 130, and in the current output circuit 120, a base or a gate of the transistor 116a (first transistor) is electrically connected to the base or the gate of the transistor 114a (fourth transistor). Accordingly, the power amplification module 100b can be configured with a small circuit.
In addition, the carrier bias circuit 114 of a power amplification module 100c according to an exemplary embodiment of the present disclosure includes a transistor 114a (fourth transistor) having a collector or a drain connected to the reference potential and a base or a gate supplied with the reference current I1 (first current) from the current control circuit 130, the base or the gate of the transistor 114a (fourth transistor) is electrically connected to a base or a gate of the transistor 116a (first transistor), and the current output circuit 120 further includes a transistor 121c (fifth transistor) that has an emitter or a source electrically connected to a collector or a drain of a transistor 122c (second transistor), a collector or a drain supplied with the reference current I1 (first current) from the current control circuit 130, and a base or a gate electrically connected to the base or the gate of the transistor 114a (fourth transistor) and the base or the gate of the transistor 116a (first transistor) and that is diode-connected. Accordingly, in the power amplification module 100c, even in a case where the peak amplifier 115 does not perform an amplification operation, a current can be caused to flow to the emitter of the transistor 116a. Therefore, it is possible to reduce the output impedance of the peak bias circuit 116 in a case where the peak amplifier 115 starts to operate.
In addition, a current output circuit 320 of a power amplification module 300 according to an exemplary embodiment of the present disclosure is a resistor 320a (resistance element) having one end electrically connected to an emitter or a source of a transistor 316a (first transistor) and the other end connected to the reference potential. Accordingly, the power amplification module 300 can cause a current to always flow to the transistor 316a of the peak bias circuit 316 by a small number of elements.
In addition, a peak amplifier 315 of the power amplification module 300 according to the exemplary embodiment of the present disclosure includes a transistor 315 (sixth transistor) having an emitter or a source connected to the reference potential, and the other end of the resistor 320a (resistance element) of the current output circuit 320 is electrically connected to the emitter or the source of the transistor 315 (sixth transistor). Accordingly, wiring for connecting each of the resistors 320a to the ground is facilitated.
In addition, a peak amplifier 415 of a power amplification module 400 according to an exemplary embodiment of the present disclosure includes a transistor 415 (sixth transistor) having a base or a gate to which an input signal is input through a capacitor 415a (first capacitor), the current output circuit 420 includes a transistor 421 (seventh transistor) having a collector or a drain connected to the reference potential and a base or a gate supplied with a current from a current control circuit 430, and a transistor 426 (eighth transistor) having a base or a gate electrically connected to an emitter or a source of the transistor 421 (seventh transistor) through a resistor 425 (fifth resistor) and a collector or a drain electrically connected to an emitter or a source of a transistor 416a (first transistor), and the base or the gate of the transistor 426 (eighth transistor) is electrically connected to the base or the gate of the transistor 415 (sixth transistor) such that the input signal is input through a capacitor 428 (second capacitor). Accordingly, in the power amplification module 400, since the current ISB is increased in a case where the power level of the input signal RF2 is increased, it is possible to suppress the operation of the peak amplifier 415 in the low input signal RF2.
In addition, the power amplification module 400 according to the exemplary embodiment of the present disclosure further includes a limiter circuit 440 that is electrically connected in series between the emitter or the source of the transistor 416a (first transistor) and the collector or the drain of the transistor 426 (eighth transistor) and limits a current flowing to the collector or the drain of the transistor 426 (eighth transistor). Accordingly, since the power amplification module 400 can suppress an increase in current flowing to the collector of the transistor 442, the operation of the peak amplifier 415 can be appropriately controlled even in a case where the input signal RF2 is increased.
In addition, the carrier bias circuit 414 of a power amplification module 400b according to an exemplary embodiment of the present disclosure includes a transistor 414a (fourth transistor) having a base or a gate supplied with a current from the current control circuit 430, and the transistor 421 (seventh transistor) has a base or a gate electrically connected to the base or the gate of the transistor 414a (fourth transistor). Accordingly, in the power amplification module 400b, since the number of diodes can be reduced, and the third output terminal 433 for supplying the reference current I3 to the current output circuit 420 is unnecessary, the size of the circuit can be reduced.
In addition, a limiter circuit 440 of the power amplification module 400 according to the exemplary embodiment of the present disclosure includes a transistor 442 (ninth transistor) having a base or a gate electrically to a reference voltage circuit 441 (voltage setting circuit) for setting a reference voltage and an emitter or a source electrically connected to the collector or the drain of the transistor 426 (eighth transistor) through a resistor 443 (sixth resistor). Accordingly, since the power amplification module 400 can suppress an increase in current flowing to the collector of the transistor 442, the operation of the peak amplifier 415 can be appropriately controlled even in a case where the input signal RF2 is increased.
In addition, the limiter circuit 440 of the power amplification module 400 according to the exemplary embodiment of the present disclosure includes a transistor 442 (ninth transistor) having a base or a gate electrically connected to a reference voltage circuit 441 (voltage setting circuit) for setting a reference voltage and an emitter or a source electrically connected to the collector or the drain of the transistor 426 (eighth transistor) through a resistor 443 (sixth resistor). Accordingly, since the power amplification module 400 can suppress an increase in current flowing to the collector of the transistor 442, the operation of the peak amplifier 415 can be appropriately controlled even in a case where the input signal RF2 is increased.
In addition, a power amplification module 500 according to an exemplary embodiment of the present disclosure further includes a limiter circuit 540 including a transistor 541 (tenth transistor) having a collector or a drain supplied with a power supply voltage and the collector or the drain and a base or a gate electrically connected through a resistor 543 (seventh resistor), and a transistor 542 (eleventh transistor) having a collector or a drain electrically connected to an emitter or a source of a transistor 516a (first transistor) and a base or a gate supplied with the power supply voltage through a resistor 545 (eighth resistor), and an emitter or a source electrically connected to an emitter or a source of the transistor 541 (tenth transistor), the current output circuit 520 includes a transistor 526 (twelfth transistor) having a base or a gate supplied with a reference current I3 from the current control circuit 530 and electrically connected to a base or a gate of a transistor 515 (sixth transistor) such that an input signal RF2 is input through a capacitor 529 (second capacitor), a collector or a drain electrically connected to a base or a gate of the transistor 541 (tenth transistor), and an emitter or a source electrically connected to the reference potential, and a transistor 527 (thirteenth transistor) having a base or a gate supplied with the reference current I3 from the current control circuit 530, a collector or a drain electrically connected to a base or a gate of the transistor 542 (eleventh transistor), and an emitter or a source electrically connected to the reference potential, and the transistor 523 (third transistor) has a collector or a drain electrically connected to an emitter or a source of the transistor 542 (eleventh transistor). Accordingly, in the power amplification module 500, since the current Ioffset is controlled in accordance with the base potential of the differential pair transistors 541 and 542, the response speed of the limiter circuit 540 is increased.
In addition, a power amplification module 500a according to an exemplary embodiment of the present disclosure further includes a limiter circuit 540 including a transistor 541 (tenth transistor) having a collector or a drain electrically connected to an emitter or a source of a transistor 516a (first transistor), a base or a gate supplied with a power supply voltage through a resistor 545 (seventh resistor), and a transistor 542 (eleventh transistor) having a collector or a drain supplied with the power supply voltage and the collector or the drain and a base or a gate electrically connected through a resistor 543 (eighth resistor), and an emitter or a source electrically connected to an emitter or a source of the transistor 541 (tenth transistor), the current output circuit 520 includes a transistor 526 (twelfth transistor) having a base or a gate supplied with a reference current I3 from the current control circuit 530 and electrically connected to a base or a gate of a transistor 515 (sixth transistor) such that an input signal is input through a capacitor 529 (second capacitor), a collector or a drain electrically connected to a base or a gate of the transistor 541 (tenth transistor), and an emitter or a source electrically connected to the reference potential, and a transistor 527 (thirteenth transistor) having a base or a gate supplied with the reference current I3 from the current control circuit 530, a collector or a drain electrically connected to a base or a gate of the transistor 542 (eleventh transistor), and an emitter or a source electrically connected to the reference potential, and the transistor 523 (third transistor) has a collector or a drain electrically connected to the emitter or the source of the transistor 541 (tenth transistor). Accordingly, the power amplification module 500a has a configuration effective in a case where the peak amplifier 515 can sufficiently largely secure the bias current by the self-bias effect.
The embodiments described above are intended to facilitate the understanding of the present disclosure and not to be construed as limiting the present disclosure. The present disclosure can be modified or improved without necessarily departing from the spirit of the present disclosure, and the present disclosure also includes equivalents thereof. That is, even configurations in which a person skilled in the art appropriately makes design changes to the embodiments are included in the scope of the present disclosure as long as the configurations have the features of the present disclosure. The elements provided in the embodiments, the arrangement thereof, and the like are not limited to those exemplified, and can be appropriately modified.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2022-065875 | Apr 2022 | JP | national |
This is a continuation of International Application No. PCT/JP2023/014512 filed on Apr. 10, 2023 which claims priority from Japanese Patent Application No. 2022-065875 filed on Apr. 12, 2022. The contents of these applications are incorporated herein by reference in their entireties.
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/JP2023/014512 | Apr 2023 | WO |
| Child | 18909281 | US |
