Power amplifier and a method for operating a power amplifier

Description

The invention relates to a power amplifier with at least one power transistor.

The invention furthermore relates to a method for operating a power amplifier which contains at least one power transistor.

Transistor amplifiers are used even at very high frequencies When designing the circuit, it is known for consideration to be given not only to the transistor characteristics at high frequencies but also to the radio-frequency characteristic of components and lines. All the complex four-pole parameters of the transistor are thus taken into account in radio-frequency circuits.

It is furthermore known, when designing integrated radio-frequency power amplifiers, for it to be necessary to find a compromise between a high voltage resistance (beakdown) and a high switching speed (high efficiency). If it is intended to achieve good characteristics at low operating voltages, a high transit frequency is required, with a high current gain.

The article “Impact-lonization Induced Instabilities in High-Speed Bipolar Transistors and their Influence on the Maximum Usable Output Voltage” by M. Rickelt and H.-M. Rein describes that the breakdown characteristic of a bipolar transistor depends on the doping and thickness of a collector region of the transistor. The article furthermore describes that a collector current I

c

rises sharply as the collector-emitter voltage V

CE

rises (breakdown). Circuits for setting quiescent currents in a transistor are known from Meinke, Gundlach: Taschenbuch der Hochfrequenztechnik [Radio Frequency Technology Manual], 5th edition, Berlin, Springer, pages F34-F35, 1992.

Furthermore, a radio frequency amplifier circuit using power transistors is known from DE 35 86 368 T2. In this known amplifier circuit, a path which conducts direct current is provided between the operating potential source and the reference ground potential, through a first transistor and a second transistor connected in series. The operating potential of the source is in consequence split between the transistors on the basis of the detect-current series path, so that each transistor has an equal share of the direct current power, while separate, parallel alternating current signal paths are provided by each transistor, and are combined at the output.

The invention is bad on the object of providing a power amplifier of this generic type, which has high gain. The power amplifier according to the invention should preferably have a transit frequency which is as high as possible.

According to the invention, this object is achieved in that a power amplifier of this generic type is designed such that the power transistor is connected such that it is operated in the breakdown region, and such that a control loop is provided, by means of which charge carriers produced in the breakdown are carried away from one output of the operational amplifier.

The invention provides for a power amplifier with one or more power transistors to be operated such that at least one of the power transistors is in a breakdown region. The breakdown region is designed such that the respective power transistor is not destroyed by it.

The invention makes use of the fact that the gradient of the collector current I

c

is dependent on the auxiliary voltage (bias voltage). A change in the source impedance of the bias drive, in particular a low-impedance bias drive, considerably reduces the rise in the collector current I

c

, so that the operational reliability is improved considerably, even at high operating voltages.

It is particularly advantageous to design the power transistor such that the control loop contains at least one transistor.

One particularly expedient embodiment of the power amplifier, or of the method for its operation, is distinguished in that the transistor in the control loop is connected in parallel with the power transistor.

It is particularly advantageous to design the power amplifier, or to carry out the method for its operation, such that the control loop has a long time constant in comparison to a time constant for charge carrier multiplication, and combination with at least one diode results in improved operational reliability in the breakdown region.

The subject matter of the invention is furthermore to carry out a method for operation of at least one transistor such that the transistor is operated at a constant operating point I

c

.

In this case, it is advantageous for the operating point to be set by means of a control loop. The loop gain of the control loop is preferably kept low, in order to provide better stability. If driven by radio frequency signals, a rise in a mean quiescent current is expediently deliberately allowed. This makes it possible for the power amplifier to operate more efficiently at radio frequencies. For example, in the case of a radio frequency drive, a rise in the mean base voltage by, for example, 25 mV results in the collector current rising by a factor of 2.7.

Further advantages, special features and expedient developments of the invention can be found from the dependent claims and the following description of preferred exemplary embodiments with reference to the drawings, in which:

FIG. 1

shows a circuit arrangement for quiescent current adjustment, and

FIG. 2

shows an operational amplifier with a push-pull output for low supply voltages.

The circuit arrangement illustrated in

FIG. 1

is preferably a part of an integrated radio frequency power amplifier. The circuit arrangement has a number of power transistors T

1

, T

2

, T

3

and T

4

. The number of power transistors is variable, and is expediently matched to the power gain to be achieved.

The power transistors T

1

, T

2

, T

3

and T

4

are connected such that they can be operated in the breakdown region. The quiescent current is largely independent of the breakdown characteristic of the power transistors T

1

, T

2

, T

3

and T

4

.

The power transistors T

1

, T

2

, T

3

and T

4

are preferably high-speed bipolar transistors with a high gain and a high switching speed. The power transistors T

1

, T

2

, T

3

and T

4

have a low breakdown voltage.

A preferred method of operation will be described in the following text with reference to the circuit arrangement illustrated in

FIG. 1

, by means of which method of operation the transistors are operated in the region of moderate charge carrier multiplication. The circuit arrangement is designed such that the stability and reliability are increased in the operating region of moderate charge carrier multiplication.

The power transistors T

1

and T

2

form a driver stage, whose quiescent current is adjusted by means of a control loop. The control loop comprises an operational amplifier U

1

with transistors T

7

, T

8

. The control loop also contains a further transistor T

5

, which is operated as a “measurement transistor” and provides a measure for the quiescent current in the transistors T

1

and T

2

.

The present concept results in a stable operating point I

c

=CONSTANT via a suitable control loop, in particular via a control loop which contains at least one operational amplifier. This operational amplifier has a complementary output, in particular a push-pull output with NPN transistors T

7

, T

8

, and T

9

, T

10

, by means of which the bases of T

7

, T

8

and T

9

, T

10

are driven such that they have a low impedance. In consequence V

BE

=f(V

CE

), with the collector current I

c

being constant. A range of output characteristics for which I

c

=CONSTANT thus curves upward only at a higher V

CE

than would be the case if V

BE

=CONSTANT or I

E

=CONSTANT. With I

c

=CONSTANT, the invention approximates the ideal case of J

E

=0. The invention thus provides for the drive condition I

E

=0, with which no power amplification can be achieved, to be replaced by a condition with which power amplification is achieved, but with the conditions otherwise being largely the same.

The circuit preferably contains diodes D

1

, D

2

which also result in a low dynamic internal resistance with a considerably shorter time constant than that of the control loop, thus improving the operational reliability in the breakdown region.

The nominal value is preset by means of a control current I

NON

, which is converted by means of a resistor R

3

to a comparison voltage. In order to determine an actual value of the current through the power transistors T

1

and T

2

, the transistor T

5

is connected in parallel with the power transistors T

1

and T

2

. In the illustrated case, the emitter surface area relationships are set such that the collector current which flows through the transistor T

5

is less than the collector current which flows through the power transistors T

1

and T

2

. Preferably, I

c

(T

1

)=I

c

(T

2

)=6×I

c

(T

5

). The collector current I

c

(T

5

) through the transistor T

5

is converted across a resistor R

4

to a voltage, and is compared with a nominal value. The control loop is closed by the operational amplifier U

1

.

Since the transistors T

1

, T

2

, T

5

are operated in the breakdown region, their output family of characteristics (

FIG. 1

) is curved upward. The increase in the curvature and the point (VCE) at which the curvature starts are substantially dependent on the internal impedance of the base drive and on the absolute value of the collector current at the knee voltage (small VCE).

However, since T

5

has a resistor R

4

in the collector line while T

1

and T

2

do not, their output families of characteristics are not the same (curvature and threshold voltage different), since the collector voltage applied to T

1

, T

2

, T

5

is not the same. (This could also be achieved by means of a resistor R

c

=1/6*R

4

in the collector lines T

1

, T

2

; however, this is deliberately avoided in order to avoid the efficiency of the power amplifier being made worse.) The family of characteristics for T

5

may, however, be matched by means of a resistor R

1

in the base line of T

5

to the family of characteristics of T

1

, T

2

, as a result of which the I

c

of T

5

is an accurate measure of the I

c

in T

1

and T

2

; this is despite the transistors being operated in the breakdown region (region of the curvature in the output family of characteristics).

The curvature of the output family of characteristics is shifted toward a higher V

CE

when the internal impedance of the drive source of T

1

, T

2

is low, as close as possible to 0 Ohms. It is therefore expedient to use a special operational amplifier U

1

. One such operational amplifier U

1

is shown by way of example in FIG.

2

. The operational amplifier U

1

has a push-pull output T

1

, T

2

.

The main features of the operational amplifier arm operation at low supply voltages from 2.5 V, a low output impedance, and a suitable output, in particular an NPN push-pull output.

In order to further reduce the preferably dynamic internal impedance of the control source T

7

, T

8

for the bases of T

1

,

12

, a diode D

1

is connected in parallel with the bases T

1

, T

2

, preferably via the center tap of the transformers. This contributes to further increasing the stability.

The quiescent current adjustment of the output stage T

3

, T

4

is carried out using the same principle as for the driver stage T

1

, T

2

; however, the currents are greater by a factor of approximately 10 to 20.

The operational amplifier U

1

whose fundamental principles arm illustrated in

FIG. 1

is illustrated in detail in FIG.

2

.

In order to improve the circuit characteristics further, further transistors and resistors have been used in the embodiment illustrated in

FIG. 2

a

and

FIG. 2

b.

R

3

, R

4

, T

7

, T

8

and R

5

, R

6

, T

9

, T

10

in

FIG. 1

correspond to R

12

, R

16

, T

1

, T

2

in FIG.

2

.

T

5

, R

1

and T

6

, R

2

in

FIG. 2

correspond to TMT and R

25

in FIG.

2

.

The transistors T

1

, T

2

and T

3

, T

4

in

FIG. 1

are illustrated as “marked double transistors” in

FIG. 2

(on the right, adjacent to R

24

).

The diodes D

1

and D

2

in

FIG. 1

are not shown in FIG.

2

.

The operational amplifier (OPV) has a reference network, which can be switched off, for adjusting the OPV's own quiescent currents. The reference network comprises T

27

, T

26

, T

25

, T

23

, T

24

, T

15

, T

16

, R

6

, R

7

, R

8

and generates a current I

CONST

which is largely independent of the supply voltage (VCC). The circuit of the reference network is prior art, and can be implemented in a wide range of forms. The reference network can be switched off by means of R

1

, R

2

, T

32

, T

31

, R

3

, T

30

, R

4

, T

28

, R

5

, T

29

, T

29

supplies a current which is largely independent of VCC and which can be activated by the power down input with a switching threshold of 1.2 V. The collector current of T

29

supplies the bias current for the reference network. I

CONST

is mirrored by T

21

, T

17

, T

18

and T

8

, and is used further in scaled form.

The inverting input of the OPV is the base of T

13

. The non-inverting input of the OPV is the base of T

14

. The comparison voltages across the resistors R

12

and R

16

(I-Nom and I-Act) arm passed on via the emitter followers T

13

and T

14

, and the OPV core T

12

and T

11

. Both emitter followers T

13

, T

14

carry a quiescent current of I

CONST

/2. An output current is supplied to the base of T

10

, corresponding to the difference input voltage at the bases of T

11

and T

12

. T

10

drives the base of the output transistor T

1

. The complementary path for T

1

comprises T

2

, R

20

, T

3

, R

19

and T

4

.

When the OPV supplies a positive output current, T

1

is active. When the OPV supplies a negative output current, T

2

is active. T

3

is connected in cascade with T

1

. When the current through T

1

(and T

3

) is high, the high BE voltage across T

3

in consequence reduces the base voltage of T

4

and hence of T

2

(T

2

is inactive).

Conversely, T

2

becomes active (via T

3

, T

4

) and T

1

is inactive. This results in a simple complementary output T

1

, T

2

, composed exclusively of NPN transistors. The cascade voltage U

const

of T

3

is produced by the network T

8

, T

5

, T

6

, T

7

, R

22

, R

23

, T

9

. C

2

guarantees that T

2

becomes active earlier than T

1

when the supply voltage is switched on. This protects the RF power transistors (T

1

, T

2

and T

3

, T

4

in

FIG. 2

) against being destroyed when the supply voltage is switched on, that is to say on power up.

C

1

is used for frequency compensation of the OPV (prior art). R

18

, D

1

, D

2

improves the dynamic response.

R

17

reduces the power-down decay time.

R

9

, R

19

, C

3

, T

22

, R

11

form a simple voltage/current converter for the nominal value preset I-NOM. The control voltage is supplied at the “BIAS CONTROL” pin.

The output family of characteristics of the “measurement transistor” TMT (in comparison to the output family of characteristics of T

1

,

72

and T

3

, T

4

in FIG.

2

), which is modified by R

16

, is matched by means of R

25

.

The circuit also contains further resistors R

10

, R

14

, R

15

, R

17

and a transistor T

19

.

List of Reference Symbols

D

1

Diode

D

2

Diode

R

3

Resistor

R

4

Resistor

R

5

Resistor

R

6

Resistor

R

8

Resistor

R

9

Resistor

R

10

Resistor

R

11

Resistor

R

13

Resistor

R

14

Resistor

R

15

Resistor

R

16

Resistor

R

17

Resistor

R

18

Resistor

R

19

Resistor

R

20

Resistor

R

21

Resistor

R

22

Resistor

R

23

Resistor

R

24

Resistor

T

1

Transistor

T

2

Transistor

T

3

Transistor

T

4

Transistor

T

5

Transistor

T

6

Transistor

T

7

Transistor

T

8

Transistor

T

9

Transistor

T

10

Transistor

T

13

Transistor

T

15

Transistor

T

19

Transistor

T

21

Transistor

T

22

Transistor

T

23

Transistor

T

24

Transistor

T

25

Transistor

T

26

Transistor

T

27

Transistor

T

28

Transistor

T

29

Transistor

T

30

Transistor

T

31

Transistor

T

32

Transistor

Claims

1. A high frequency power amplifier comprising:at least one power transistor, in which the power transistor is connected such that it is operated in the breakdown region; a control loop, the control loop comprising at least one operational amplifier; and wherein charge carriers produced in the breakdown are carried away from one output of the at least one operational amplifier.
2. The power amplifier as claimed in claim 1, in which the control loop contains at least one transistor.
3. The power amplifier as claimed in claim 2, in which the transistor in the control loop is connected in parallel with the power transistor.
4. The high frequency power amplifier as claimed in claim 1, in which the control loop has a long time constant in comparison to a time constant for charge carrier multiplication, the power amplifier further comprising at least one diode resulting in improved operational reliability in the breakdown region.
5. A method for operating a power amplifier, the power amplifier including at least one power transistor, the method comprising:operating the power amplifier in the breakdown region; producing charge carriers during operation of the power amplifier in the breakdown region; and carrying the charge carriers away from one output of the operational amplifier.
6. The high frequency power amplifier as claimed in claim 2 in which the control loop has a long time constant in comparison to a time constant for charge carrier multiplication, the power amplifier further comprising at least one diode resulting in improved operational reliability in the breakdown region.
7. The high frequency power amplifier as claimed in claim 3, in which the control loop has a long time constant in comparison to a time constant for charge carrier multiplication, the power amplifier further comprising at least one diode resulting in improved operational reliability in the breakdown region.

Priority Claims (1)

Number	Date	Country	Kind
199 58 442	Dec 1999	DE

PCT Information

Filing Document	Filing Date	Country	Kind
PCT/DE00/04051		WO	00

Publishing Document	Publishing Date	Country	Kind
WO01/41300	6/7/2001	WO	A

US Referenced Citations (7)

Number	Name	Date	Kind
3898575	Hanspector	Aug 1975	A
4384217	Tsividis	May 1983	A
5164679	Dittmer	Nov 1992	A
5623228	Arbel	Apr 1997	A
5856760	Lam et al.	Jan 1999	A
5929502	Beasom	Jul 1999	A
6563381	Strong	May 2003	B1

Foreign Referenced Citations (3)

Number	Date	Country
35 86 368	Jan 1993	DE
1 328 016	Sep 1963	FR
59 012 609	Jan 1984	JP

Non-Patent Literature Citations (3)

Entry
Patent Abstract of Japan vol. 008, No. 095 (E-242), May 2, 1984, Tokyo Shibaura Denki KK.
Meinki; Gundlach; Taschenbuch der Hochfrequenztechnik, 5, Auflage, Berlin: Springer, 1992, SF34-SF35.
M. Rickelt und H.-M Rein “Impact-Ionization Induced Instabilities in High-Speed Bipolar Transistors and their Influence on the Maximum Usable Output Voltage”.

Power amplifier and a method for operating a power amplifier

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