The present invention relates to the field of microwave power amplifiers for use in electronic systems, e.g. in radio base stations (RBS) used in wireless communication systems.
The Doherty Power Amplifiers (DPA) architecture was introduced by W. H. Doherty in 1936, with the aim to realize power stages with almost constant and higher efficiency behaviour for a well determined range of output power. A main application for Doherty amplifiers is communication systems.
The standard topology of the DPA is shown in
The relation between the main input power signal P1 and the auxiliary input power signal P2 at the output ports of the IPS for the above described DPA is much less than one, i.e. the auxiliary input power signal P2 is much greater than the main input power signal P1 at the output ports of the IPS because the auxiliary amplifier branch is biased in class C and the main amplifier branch in class AB which results in a lower gain in the auxiliary amplifier branch which means that the auxiliary input power signal P2 has to be much greater than the main input power signal P1 at the output ports of the IPS in order for the power output of the branches to be balanced, i.e. to be approximately equal at saturation of the DPA, i.e. when the DPA is delivering its maximum output power signal Pout.
The Doherty amplifier is well known to the skilled person and therefore not further discussed here. Basics of the DPA can e.g. be found in “The Doherty Power Amplifier,” chapter 6 pp. 107-132, by P. Colantonio, F. Giannini, R. Giofrè, L. Piazzon, in the book “Advanced Microwave Circuits and Systems,” Ed. Vitaliy Zhurbenko, April 2010 (ISBN: 978-953-307-087-2).
The impedance inverter network IIN is typically implemented through a lambda-quarter transmission line (i.e. a transmission line with 90° of electrical length at the centre frequency of the operating bandwidth of the DPA).
The phase compensation network PCN is typically realized by the same structure as used for the IIN, and arranged in the auxiliary amplifier branch.
The input power splitter IPS, is required to split the input power signal Pin towards the main and auxiliary amplifiers with a proper power splitting factorization. For low levels of the input power signal Pin only the main amplifier is operating, while the auxiliary amplifier is properly kept off. When the input power signal Pin is increased and the main amplifier is reaching its saturation, the auxiliary amplifier is turned on increasing the current flowing into the load ZL and consequently increasing the voltage at the common node 107. The resulting higher impedance seen from the IIN output port 129 is transformed into a smaller impedance, in the typical case with a lambda-quarter IIN into a smaller impedance sometimes called an inverted impedance, at the main amplifier output end 125, thus allowing the main amplifier to further increase the output power signal Pout delivered, up to the saturation of both amplifiers.
The operating region, when both the main and auxiliary amplifiers are in operation, is usually referred as the Doherty power region, and it is properly controlled by suitable design parameters, in order to maintain almost constant and high amplifier efficiency for a required output back-off (OBO) region. The OBO is the amount of back-off from the maximum power output of the DPA needed for the required amplitude modulation of the output power signal Pout from the DPA. The DPA efficiency is defined as the AC power of the output power signal Pout over the load ZL in relation to the required DC (Direct Current) power supplied to the DPA. Power Added Efficiency, PAE, is defined as the difference between the AC power of the output power signal Pout over the load ZL and the AC power delivered to the DPA via the input power signal Pin divided with the DC power supplied to the DPA. The terms OBO, efficiency and PAE are also valid for any type of power amplifier. The DC power is required for operation of the amplifiers of the DPA which is well known to the skilled person.
In the original DPA both the main and the auxiliary amplifiers were based on class B or AB biasing condition, while the proper turning on condition of the auxiliary amplifier was assured by suitable switch control circuitry. Class A, B, AB and C amplifiers are well known to the skilled person and therefore not further discussed here.
In actual implementations, the main amplifier is often operated in class AB bias condition, while the auxiliary amplifier is operating in class C, with the aim to be kept off for low levels of the input power signal Pin, thus avoiding switching elements and losses associated with switching.
The standard DPA topology, while assuring a higher efficiency for a defined OBO than conventional solutions, suffers from a great gain decrease compared to conventional solutions such as a classical combination of two identical amplifiers realized with the same technology as for the main and the auxiliary amplifiers. Such an example of prior art, a combination of two identical amplifiers, is shown in
This relatively low gain of the DPA is mainly related to two causes:
There is thus a need for an improved power amplifier with a high gain and simultaneously a high efficiency compared to prior art solutions.
The object of the invention is to reduce at least some of the mentioned deficiencies with the prior art solutions and to provide:
The object is achieved by a power amplifier arranged to receive an input power signal Pin at an input port of a three port Input Power Splitter, IPS, comprising also a first and a second output port. The IPS is arranged to deliver a main input power signal P1 at the first output port to an input end of a main amplifier branch comprising a main amplifier coupled in series with an Impedance Inverter Network, IIN, having an IIN input port and an IIN output port. The IPS is further arranged to deliver an auxiliary input power signal P2 at the second output port to an input end of an auxiliary amplifier branch comprising an auxiliary amplifier. An output end of the main amplifier is connected to an output end of the auxiliary amplifier branch via the IIN. The output end of the auxiliary amplifier branch defines a common node. The power amplifier is arranged to deliver an output power signal Pout to the common node wherein the power amplifier is arranged to operate within at least one frequency range, each frequency range defining a bandwidth with a centre frequency and wherein a Phase Compensation Network, PCN, is arranged in the main amplifier branch between the first output port of the IPS and an input end of the main amplifier. The output end of the main amplifier is connected to the IIN input port, the IIN output port being connected to the common node and wherein further a Nonlinear Driver Amplifier, NDA, is arranged in the auxiliary amplifier branch between the second output port of the IPS and an input end of the auxiliary amplifier. The output end of the auxiliary amplifier is connected to the common node. The PCN is arranged to adjust the phase of the main input power signal P1 in the main amplifier branch to be in phase with the auxiliary input power signal P2 in the auxiliary amplifier branch at the common node. The NDA is arranged to increase the gain in the auxiliary amplifier branch.
The object is further achieved by a method for power amplification where an input port of a three port Input Power Splitter, IPS, receives an input power signal Pin. The IPS also has a first and a second output port. The IPS delivers a main input power signal P1 at the first output port to an input end of a main amplifier branch having a main amplifier coupled in series with an Impedance Inverter Network, IIN, having an IIN input port and an IIN output port. The IPS further delivers an auxiliary input power signal P2 at the second output port to an input end of an auxiliary amplifier branch with an auxiliary amplifier. An output end of the main amplifier is connected to an output end of the auxiliary amplifier branch via the IIN. The output end of the auxiliary amplifier branch defines a common node. The power amplifier delivers an output power signal Pout to the common node wherein the power amplifier is operating within at least one frequency range, each frequency range defining a bandwidth with a centre frequency and wherein a Phase Compensation Network, PCN, is inserted in the main amplifier branch between the first output port of the IPS and an input end of the main amplifier. The output end of the main amplifier is connected to the IIN input port, the IIN output port being connected to the common node and wherein further a Nonlinear Driver Amplifier, NDA, is inserted in the auxiliary amplifier branch between the second output port of the IPS and an input end of the auxiliary amplifier. The output end of the auxiliary amplifier is connected to the common node. The PCN adjusts the phase of the main input power signal P1 in the main amplifier branch to be in phase with the auxiliary input power signal P2 in the auxiliary amplifier branch at the common node. The NDA increases the gain in the auxiliary amplifier branch.
The input and output ports, as well as the input and output ends, of the power amplifier and of all components of the power amplifier, are all referred to a reference point or a reference plane having a reference potential, e.g. a ground plane or a ground point. This is equivalent to all components having an additional input and output port, or input and output end, connected to the reference point or reference plane, e.g. the ground point or the ground plane. This reference point or reference plane is henceforth called a ground.
The invention also provides a node in a wireless communication system, the node comprising a power amplifier according to any one of claims 1-10.
Additional advantages are achieved by implementing one or several of the features of the dependent claims.
a schematically shows a second example of an impedance inverter network (IIN).
b schematically shows a third example of an impedance inverter network (IIN).
a and 8b shows in diagrams an example of performance behaviour of the power amplifier of the invention and a standard DPA.
The invention will now be described with reference to the enclosed drawings,
The input and output ports, as well as the input and output ends, of the power amplifier and of all components of the power amplifier are all referred to a reference point or a reference plane having a reference potential, e.g. a ground plane or a ground point. This is equivalent to all components having an additional input and output port, or input and output end, connected to the reference point or reference plane, e.g. the ground point or the ground plane. This reference point or reference plane is henceforth, as mentioned above, called a ground.
The OBO is the amount of back-off from the maximum power output of the power amplifier needed for the required amplitude modulation of the output power signal Pout from the power amplifier. The power amplifier efficiency is defined as the AC power of the output power signal Pout over the load ZL in relation to the required DC power supplied to the power amplifier. Power Added Efficiency, PAE, is defined as the difference between the AC power of the output power signal Pout over the load ZL and the AC power delivered to the power amplifier via the input power signal Pin divided with the DC power supplied to the power amplifier. The DC power is required for operation of the active components of the power amplifier, as e.g. different amplifiers (see
A basic topology of the new power amplifier of the invention is shown in
In terms of performance, the new power amplifier drastically increases the gain with about 3-6 dB, depending on the adopted technology, compared to the standard DPA approach, mainly for the following reasons:
The basic topology of the new power amplifier based on the DPA is shown in
The power amplifier 300 is arranged to deliver the output power signal Pout to a load ZL connected to the power amplifier and having a first end and a second end, the first end being connected to the common node 307 and the second end to a ground 308. For practical realizations the value of ZL should be real in order to maximize the output power signal Pout.
The invention is based on that a Nonlinear Driver Amplifier, NDA, 309 is arranged in the auxiliary amplifier branch 305 between the second output port 322 of the IPS 301 and an input end 326 of the auxiliary amplifier, the output end of the auxiliary amplifier being connected to the common node 307. The NDA is biased in deep class C bias condition. It is important that the NDA is non linear and biased in class C, which means that the NDA will only be in operation above a turn on point when the Doherty power region is entered. This has the effect that for the low power region when only the main amplifier branch is in operation the efficiency of the power amplifier of the invention is the same as the efficiency of a standard Doherty amplifier as shown in
The NDA is arranged in order to increase the power gain in the power amplifier and consequently also to improve the PAE.
The main amplifier is preferably operating in a class AB bias condition and the auxiliary amplifier is preferably operating in a class B or C bias condition.
The invention is further based on that a Phase Compensation Network, PCN, 310 is arranged in the main amplifier branch 302 between the first output port 321 of the IPS 301 and an input end 327 of the main amplifier, the output end 325 of the main amplifier 303 being connected to the IIN input port 328, the IIN output port 329 being connected to the common node 307.
The basic topology of
The PCN is arranged to adjust the phase of the main input power signal P1 in the main amplifier branch 302 to be in phase with the auxiliary input power signal P2 in the auxiliary amplifier branch 305 at the common node 307 and the NDA 309 is, as mentioned, arranged to increase the gain in the auxiliary amplifier branch 305. In the main amplifier branch the main amplifier phase shifts 180 degrees with reference to the input port 320 of the IPS. The IIN adds a further phase shift, in most applications substantially 90 degrees. Other phase shifts are possible as will be described in association with
To accomplish a standard 50 ohm termination in practical realizations, usually an Impedance Transforming Network, ITN, 401 is arranged in series with the 50 ohm termination 402 between the common node 307 and a first end of the 50 ohm termination, the second end of which is connected to the ground 308. This is illustrated in
The relation between the main input power signal P1 and the auxiliary input power signal P2 in the power amplifier of the invention is greater than 1 at the output ports of the IPS, i.e. the main input power signal P1 is greater than the auxiliary input power signal P2 at the output ports of the IPS. This has the effect to increase the contribution of the main amplifier gain on the overall gain of the new power amplifier, while reducing the contribution of the auxiliary amplifier branch, thus allowing to reach a gain level similar to the one obtainable with a simple combination of two identical amplifiers as shown in
For realization of both the main and the auxiliary amplifiers any suitable type of semiconductor and active device (i.e. bipolar or field effect based) can be used. The overall structure of the power amplifier can be implemented both in hybrid (MIC, Microwave Integrated Circuit) or monolithic (MMIC, Monolithic Microwave Integrated Circuit) technology. The components as such included in the topology of the new power amplifier can be designed for operation within one or several frequency ranges as is well known to the skilled person. Both the main amplifier and the auxiliary amplifier, as well as the other components of the power amplifier, can thus be arranged to operate within at least one frequency range, each frequency range defining a bandwidth with a centre frequency, thus allowing the power amplifier to be arranged to operate within at least one frequency range, each frequency range defining a bandwidth with a centre frequency. In
The IIN can be accomplished in many ways as is well known to the skilled person. In general terms the IIN can be defined as is illustrated in
where the elements A, B, C and D in a transmission matrix are complex values calculated for each centre frequency for each element.
are column vectors. When the power amplifier is operating within several frequency ranges the element A assumes the same value at each centre frequency. Similarly the other elements also assume the same value at each centre frequency, however each of the elements have individual and, mostly, different values.
The IIN input and output ports correspond to the input and output plus ports of
The transmission matrix above accounts for the losses of the passive elements adopted for the implementation of the IIN. Assuming passive and lossless elements for the implementation of the IIN, the relationship between the currents and voltages across the IIN network can be represented with the transmission matrix as follows:
In equation (2) the elements A and D are equal to zero and the elements B and C are two constant purely imaginary values at each centre frequency. The effectiveness of the adopted topology for the implementation of the IIN depends on how much equation (1) approaches equation (2).
The phase shift of the IIN depends on the values of the elements B and C. Typically the phase shift is substantially 90 degrees at the centre frequency/ies for most of the practical implementations of the invention, which means that for typical realizations the IIN inverts the impedance, hence the name IIN. If the phase shift of the IIN is not exactly 90°, then a complex transformation is performed by the IIN, i.e. a purely resistive load at the output ports (504/505) is transformed into a complex impedance seen at the input ports (502/503). In this case, the main amplifier of the power amplifier will operate in a sub-optimum condition, i.e. with a complex load instead of a purely resistive load. Consequently, less active output power will be delivered from the main amplifier, and a power loss in both AC and DC power is introduced by a dissipation in the main amplifier due to a partial overlap between voltage and current waveforms across the main amplifier, thus resulting in reducing the performance achievable by the main amplifier. The phase shift should thus ideally be 90° at the centre frequency/ies. The invention can however also be implemented with somewhat degraded performance for phase shifts being substantially 90° at the centre frequency/ies, here defined as being within a range of ±30% from 90°, preferably within ±15% but most preferably within ±10%. The phase shift can also be odd multiples of 90°, this has however the drawback of increasing the size of the IIN and further to introduce losses and reduce power amplifier performance. These ranges are valid for all examples and embodiments of the invention.
In case of adopting active components for the implementation of the IIN, the values of the elements B and C in (1) and (2) can be real.
There are several possibilities to realize the IIN using passive elements.
The lambda quarter solution of the IIN can also be implemented by using its equivalent lumped implementation, thus accomplishing an equivalent transmission line. The two networks typically adopted are shown in
a and 7b shows examples of Impedance Inverter Networks, IINs for a power amplifier operating within a bandwidth B with a centre frequency f0 where, in
where f0 is the centre frequency and Zc the characteristic impedance of the equivalent transmission line, resulting in a transmission matrix:
These two standard approaches can be modified in several ways in order to optimize for certain circuit implementation.
In
In
The IIN input and output ports correspond to the input and output plus ports of
The currents and voltages in equation (1) and (2) and the currents (except in the explanation of the abbreviations AC and DC) and voltages mentioned in the description, claims and figures are, unless otherwise stated, the alternating voltage and alternating current at the centre frequency in the frequency range in question.
Expressions defining amounts of power or power signals such as e.g. input power, output power, power output, input power signal Pin, output power signal Pout, main input power signal P1, auxiliary input power signal P2, first input power signal P1 and second input power signal P2, mentioned in the description and claims concern AC (Alternating Current) power or AC signals at the centre frequency in the frequency range in question, unless otherwise stated. General terms like e.g. power, power splitter, Input Power Splitter, power combiner, power gain, power amplification and power amplifier also concerns AC power unless otherwise stated.
The ITN can be realized as an IIN or as any network performing a load transformation from 50 ohm to ZL. The most typical solutions are based on networks similar to the ones adopted for the IIN structure, and in particular the distributed lambda quarter transmission line shown in
Similarly, the PCN network can be realized as an IIN with one of the possible solutions described for the IIN.
The IPS can be realized with any kind of power splitter structure as a T-junction, a resistive divider or as a Wilkinson type of power splitter.
The IPS and PCN can be integrated in a single structure by using 90° hybrid structures, realized as branch line, coupled lines or any other solution well known to the skilled person. These hybrid structures 330/430 are schematically shown in
a and 8b shows, as mentioned earlier, an example of performance behaviour of the new power amplifier and a standard DPA, in terms of gain, efficiency and PAE.
a shows the gain in dB on the y-axis 802 as a function of the OBO on the x-axis 801 for the power amplifier with graph 804 and a standard DPA with graph 805. The gain of the power amplifier of the invention is in this example about 5 dB above the gain of the standard DPA (2 dB between each division). The OBO is in dB below a maximum power output of the power amplifier being equal to a maximum output power signal Pout over the load ZL.
b shows the efficiency and PAE in percentage on the y-axis 803 as a function of the OBO on the x-axis 801. Graph 807 shows the PAE of the invention and graph 806 the PAE of the standard DPA. As can be seen the PAE of the power amplifier of the invention is above the PAE of the DPA, especially around an efficiency peak, called the first efficiency peak, at around OBO 7.5 dB, where the PAE difference in this example is almost 20% (20% between each division). Graph 808 shows the efficiency of the power amplifier of the invention and graph 809 the efficiency of the standard DPA. As can be seen these two graphs coincide below the first efficiency peak, i.e. for output back offs, OBOs, greater than the OBO at the first efficiency peak. Above the first efficiency peak, i.e. for OBOs less than the OBO at the first efficiency peak, the efficiency of the standard DPA is slightly above the efficiency of the power amplifier of the invention, in this example with about 5-10%.
The invention also provides a method for power amplification which is illustrated in the block diagram of
In a first method step a Phase Compensation Network, PCN, is inserted 901 in the main amplifier branch 302 between the first output port 321 of the IPS 301 and an input end 327 of the main amplifier. The output end 325 of the main amplifier 303 is connected to the IIN input port 328, the IIN output port 329 being connected to the common node 307. The PCN is adjusting the phase of the main input power signal P1 in the main amplifier branch 302 to be in phase with the auxiliary input power signal P2 in the auxiliary amplifier branch 305 at the common node 307.
In a second method step a Nonlinear Driver Amplifier, NDA, 309 is inserted 902 in the auxiliary amplifier branch 305 between the second output port 322 of the IPS 301 and an input end 326 of the auxiliary amplifier. The output end of the auxiliary amplifier is connected to the common node 307. The NDA increases the gain in the auxiliary amplifier branch 305.
In a third method step the numbers of frequency ranges are selected, 903, for the actual application.
In a fourth method step the IIN is selected to be realized, 904, according to anyone of claims 4-6 and an ITN according to claim 3 is realized, 904, as an IIN.
In a fifth method step:
The different method steps do not necessarily have to be performed in the order described above. As an example, step 2 can be performed before step 1 and step 4 before step 3.
In summary the invention also provides a method for power amplification where an input port of a three port Input Power Splitter, IPS, 301 receives an input power signal Pin. The IPS also has a first 321 and a second 322 output port. The IPS delivers a main input power signal P1 at the first output port to an input end 323 of a main amplifier branch 302 having a main amplifier 303 coupled in series with an Impedance Inverter Network, IIN 304, having an IIN input port 328 and an IIN output port 329, and an auxiliary input power signal P2 at the second output port 322 to an input end 324 of an auxiliary amplifier branch 305 with an auxiliary amplifier 306. An output end 325 of the main amplifier 303 is connected to an output end of the auxiliary amplifier branch 305 via the IIN 304. The output end of the auxiliary amplifier branch 305 defines a common node 307. The power amplifier delivers an output power signal Pout to the common node 307 wherein the power amplifier is operating within at least one frequency range, each frequency range defining a bandwidth with a centre frequency and wherein a Phase Compensation Network, PCN, 310 is inserted, 901, in the main amplifier branch 302 between the first output port 321 of the IPS 301 and an input end 327 of the main amplifier. The output end 325 of the main amplifier 303 is connected to the IIN input port 328, the IIN output port 329 being connected to the common node 307 and wherein further a Nonlinear Driver Amplifier, NDA, 309 is inserted, 902, in the auxiliary amplifier branch 305 between the second output port 322 of the IPS 301 and an input end 326 of the auxiliary amplifier. The output end of the auxiliary amplifier is connected to the common node 307. The PCN 310 adjusts the phase of the main input power signal P1 in the main amplifier branch 302 to be in phase with the auxiliary input power signal P2 in the auxiliary amplifier branch 305 at the common node 307 and the NDA 309 increases the gain in the auxiliary amplifier branch 305.
In one example of the method the number of frequency ranges are selected, 903, for the actual application.
In one example of the method the IIN is selected to be realized, 904, according to anyone of claims 4-6 and an ITN according to claim 3 is realized, 904, as an IIN.
In one example of the method:
The invention also provides a node in a wireless communication system, wherein the node comprises a power amplifier according to any one of claims 1-10. The wireless communication system can e.g. be based on 3G (Third generation mobile telecommunication), 4G (Fourth generation mobile telecommunication), LTE (Long term evolution) or WiMax (Worldwide interoperability for microwave access). The invention is however not restricted to a certain type of wireless communication system but can also be used in any other wireless communication applications or electronic systems requiring power amplification.
The invention is not limited to the embodiments and examples described above, but may vary freely within the scope of the appended claims.
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/EP2011/060215 | 6/20/2011 | WO | 00 | 12/20/2013 |