Patent Application
20250175128
The present disclosure relates to a power amplifier.
High-output operation and high-linearity operation are required of a power amplifier for a cellular base station in, e.g., the 4th generation mobile communication system (4G) and the 5th generation mobile communication system (5G) in order to deliver a less distorted radio wave, i.e., a signal with a low error rate at the time of reception over a long distance. Also, high-efficiency operation is strongly required for reduction in power consumption of the base station itself.
To respond to the above-described requirements, a Doherty amplifier capable of high-efficiency operation even at average output power lower by 7 to 9 dB than peak output power is adopted as a current power amplifier for a cellular base station. The Doherty amplifier can significantly improve efficiency at the time of backoff operation as compared with a general single-chain amplifier. However, linearity of an output signal with respect to an input signal, i.e., how linear input-output relationships in amplitude and phase characteristics are deteriorates. For this reason, a Digital Pre-distorter (DPD) is placed in front of an amplifier, and the inverse of a component which is to be distorted by the amplifier is input to the amplifier in advance, thereby performing amplification operation while compensating for linearity deterioration. The compensation is made while output signals from the amplifier are sequentially monitored via a coupler (directional coupler). To give an appropriate amplitude and phase to an inverse component to be input to an amplifier, the DPD is provided with an analog attenuator, an analog phase shifter, or a function equivalent thereto as needed in addition to a digital signal processing function and a digital/analog conversion function.
Si-LDMOSs have been the mainstream as transistors used in power amplifiers for base stations. However, along with practical use of GaN HEMTs, GaN HEMTs which are operable at a power supply voltage of 40 to 50 V higher than 28 V for LDMOSs and are more capable of high-efficiency operation are starting to be applied. Many GaN HEMTs are applied especially to Doherty power amplifiers for 5G base stations in the 3 to 4 GHz band higher in frequency than a band of frequencies not more than 2 GHZ (see, e.g., PTL 1).
A GaN Doherty power amplifier has a strong memory effect arising from trapping in a GaN HEMT and suffers the problem of a current amplification state changing depending on a past amplification state. It is well known that, for example, if low power is amplified immediately after high power is amplified, a gain or a phase changes.
To suppress distortion in a signal in consideration of the above-described memory effect, a DPD for a base station makes distortion compensation in consideration of the memory effect. However, product development frequently experiences a case example where distortion compensation does not work well even with use of the DPD. Examples of the case example include a case where an input-output amplitude characteristic (AM-AM) and phase characteristic (AM-PM) of a Doherty power amplifier change rapidly within a given output power range or the amounts of change are large. For this reason, a circuit is designed such that DPD compensation works well, the amounts of change fall within predetermined ranges, and such that changes are slow.
The inventors experienced, in design and evaluation of a Doherty power amplifier, a defective condition where a DPD worked as designed in a large part of a desired frequency band but did not work well in the vicinity of an end of the band.
Various analyses have showed that the cause is a memory effect arising from a momentary drain voltage of a GaN HEMT. A case where a DPD does not make distortion compensation well is a case where the amounts of change in input-output amplitude characteristic (AM-AM) and phase characteristic (AM-PM) fall outside compensation ranges, as described earlier. The amount of compensation for a change in phase characteristic is tightly restricted. For this reason, if a phase characteristic changes greatly, it is effective to implement a phase change suppression function in a power amplifier to suppress a phase change and keep the phase change within a compensation range for a DPD (see, e.g., PTL 1).
A diode linearizer is suited to implement the above-described function in a power amplifier at a low price. Since a diode linearizer can gently change a pass amplitude and phase in accordance with input power by a diode linearizer, the diode linearizer can suppress amplitude and phase changes.
However, since a pass loss is different in principle of operation between a case where a diode linearizer functions and a case where the diode linearizer does not function, an actual gain of a power amplifier changes. This causes the problem of increase of a difference in actual gain of a power amplifier product.
The present disclosure has been made to solve the above-described problem, and has as its object to obtain a power amplifier capable of reducing a gain variation.
A power amplifier according to the present disclosure includes: an amplifier using a GaN HEMT; a diode linearizer and a variable attenuator which are connected in series to an input of the amplifier; a peak detector detecting a peak value of a drain voltage of the amplifier; and a controller making the diode linearizer function as a linearizer to reduce an attenuation amount of the variable attenuator if the peak value exceeds a threshold.
In the present disclosure, a diode linearizer and a variable attenuator are connected in series to the input of an amplifier, and if a peak value of a drain voltage of the amplifier exceeds a threshold, the diode linearizer is made to function. For this reason, even if a digital pre-distorter cannot make distortion compensation well due to a memory effect arising from a momentary drain voltage of the amplifier, the linearizer can suppress deterioration of linearity. Thus, a distortion characteristic which is generally required of a base station can be achieved by distortion compensation by the digital pre-distorter. If the diode linearizer functions, since a gain decreases, an attenuation amount of the variable attenuator is reduced. This allows reduction in gain variation of a power amplifier.
A power amplifier according to the embodiments of the present disclosure will be described with reference to the drawings. The same components will be denoted by the same symbols, and the repeated description thereof may be omitted.
In the power amplifier module PAM, a carrier amplifier Trc and a peak amplifier Trp which are connected in parallel to each other constitute a Doherty amplifier. A driver amplifier Trd is connected to the input of the Doherty amplifier. GaN HEMTs are used as the carrier amplifier Trc, the peak amplifier Trp, and the driver amplifier Trd.
An input matching unit INM is connected to a gate of the driver amplifier Trd. A power division unit DIS divides an output signal from the driver amplifier Trd and inputs respective divided output signals to a gate of the carrier amplifier Tre and a gate of the peak amplifier Trp. The power division unit DIS also functions as an interstage matching unit.
A line TRL1 is connected between the power division unit DIS and the gate of the peak amplifier Trp. A line TRL2 is connected between a drain of the carrier amplifier Trc and a drain of the peak amplifier Trp. A line TRL3 is connected between the drain of the peak amplifier Trp and the output terminal PAOUT. A line TRL4 is connected between the drain of the carrier amplifier Trc and a power supply terminal Vdd. A capacitance Col is shunt-connected to a junction point of the line TRL4 and the power supply terminal Vdd. A line TRL5 is connected between the drain of the peak amplifier Trp and the power supply terminal Vdd. A capacitance Co2 is shunt-connected to a junction point of the line TRL5 and the power supply terminal Vdd. A line TRL6 is connected between the drain of the driver amplifier Trd and the power supply terminal Vdd. A capacitance Co3 is shunt-connected to a junction point of the line TRL6 and the power supply terminal Vdd. The lines TRLI to TRL6 change a phase by 90° to convert impedance. For example, the line TRL3 converts a result of power synthesis of an output signal from the carrier amplifier Tre and an output signal from the peak amplifier Trp into an output impedance of 50 Ω.
The line TRL4 is a feeder line which applies a phase rotation of 90° with respect to a fundamental frequency fo. The capacitances Co are bypass capacitances for sufficiently reducing impedance of the power supply terminal Vdd in the vicinity of the fundamental frequency fo and making nearly a short circuit. For this reason, impedance from the drain of the carrier amplifier Trc with a feeder line in view is sufficiently high in the vicinity of the fundamental frequency fo. Thus, a feeder line is designed not to have influence in terms of a high frequency downstream from the drain of the carrier amplifier Trc. The same applies to feeder lines for the peak amplifier Trp and the driver amplifier Trd.
Drain voltages of the carrier amplifier Trc, the peak amplifier Trp, and the driver amplifier Trd pulse at the fundamental frequency fo, and an average value of each drain voltage is a power supply voltage. Note that a momentary voltage is determined by load impedance of a transistor and varies greatly from a lowest value of about 0.5 to 2 V to a highest value about 2 to 2.5 times the power supply voltage. A coupling capacitance Cc1 monitors the drain voltage of the carrier amplifier Trc. A peak detector DET detects a peak value of the drain voltage of the carrier amplifier Trc that is monitored by the coupling capacitance Cc1.
A diode linearizer LNZ and a variable attenuator VATT are connected in series between the input terminal PAIN and the input matching unit INM. A controller CTL generates voltages Vo2a and Vo2b in accordance with an output voltage Vo1 of the peak detector DET and provides the voltages Vo2a and Vo2b to the diode linearizer LNZ and the variable attenuator VATT, respectively.
If the voltage Vo2a is high, and a large amount of current flows to the diode D1, an input power level at which the diode linearizer LNZ functions as a linearizer rises. To make the diode linearizer LNZ function as a linearizer within a desired input power range, the voltage Vo2a is set to Vo2aL that is low to allow an appropriate amount of current to flow to the diode D1. Note that, since the current Idio does not flow unless the voltage exceeds a Schottky barrier Vbi (0.7 to 0.8 V) of the diode D1, Vo2aL is set to satisfy Vo2aL>Vbi. If the voltage Vo2a is Vo2aH that is high, a large current flows to the diode D1 to disable a function as a linearizer. The gain Gp is lower if the diode linearizer functions as a linearizer and is higher if the diode linearizer does not function as a linearizer. Note that, since the gain Gp of the amplifier is affected by an insertion loss by an amount corresponding to an on resistance of the diode D1 even if the diode linearizer LNZ does not function, the gain Gp of the amplifier decreases slightly as compared with a case without the diode linearizer LNZ.
When the voltage Vo2b is 0 V, the voltage Vc is also 0 V. In this case, a gate-source voltage of FET1 becomes 0 V. Assuming that thresholds for FET1, FET2, and FET3 are −2 V, FET1 is turned on. Most RF signals pass through FET1 without passing through the resistor R1, and an insertion loss is caused only an ON resistance between the drain and the source of FET1 and is small. Gate-source voltages of FET2 and FET3 become 0 V to completely turn on FET2 and FET3. Thus, a x attenuator composed of the resistors R1, R2, and R3 is constructed in an equivalent sense.
The voltage Vc increases in a positive direction with increase in the voltage Vo2b. In this case, since a source potential of FET1 increases in the positive direction, the gate-source voltage increases in a negative direction. Since a channel resistance between the drain and the source of FET1 increases, FET1 approaches an off state. In this case, many RF signals pass through the resistor R1 to increase attenuation. An attenuation amount becomes the highest, e.g., about 14 dB, when the voltage Vo2b is a given positive voltage.
If a voltage division ratio between the variable resistor R5 and the resistor R6 is set to 1:1 when the voltage Vo2b is +6 V, the voltage Vc becomes +3 V. Since a gate voltage of FET1 is fixed at 0 V, the gate-source voltage of FET1 becomes −3 V to turn off FET1. The gate-source voltages of FET2 and FET3 become −3 V to turn off FET2 and FET3. Thus, power which leaks to GND via the resistors R3 and R4 is minimized.
As described above, an attenuation amount of the variable attenuator VATT is changed in accordance with the magnitude of the voltage Vo2b. Specifically, an attenuation amount of an RF signal which passes through the variable attenuator VATT increases with increase in the voltage Vo2b.
When the voltage Vo2a is low, an insertion loss of the diode linearizer LNZ increases. Since the voltage Vo2b is low, the attenuation amount of the variable attenuator VATT decreases. On the other hand, when the voltage Vo2a is high, the insertion loss of the diode linearizer LNZ decreases. Since the voltage Vo2b is high, the attenuation amount of the variable attenuator VATT increases. That is, if the peak value of the drain voltage of the carrier amplifier Trc exceeds the threshold Va, the controller CTL makes the diode linearizer LNZ function as a linearizer to reduce the attenuation amount of the variable attenuator VATT. On the other hand, if the peak value of the drain voltage of the carrier amplifier Trc falls below the threshold Va, the controller CTL does not make the diode linearizer LNZ function as a linearizer to increase the attenuation amount of the variable attenuator VATT.
Assume that an insertion loss of the diode linearizer LNZ at the desired Pin when the diode linearizer LNZ functions as a linearizer is A (dB) and that an insertion loss when the diode linearizer LNZ does not function as a linearizer is A0 (dB). For simplicity, a minimum attenuation amount of the variable attenuator VATT is assumed to be 0 dB. When the diode linearizer LNZ does not function as a linearizer, the attenuation amount of the variable attenuator VATT may be set to |A-A0| (dB). Note that A and A0 have negative values in dB.
As described above, the controller CTL controls the diode linearizer LNZ so as to change a gain and a phase of a signal which passes through the diode linearizer LNZ if the peak value of the drain voltage exceeds the threshold and so as not to change a gain and a phase of a signal which passes through the diode linearizer LNZ if the peak value of the drain voltage does not exceed the threshold. The controller CTL also controls the variable attenuator VATT such that an attenuation amount of a signal which passes through the variable attenuator VATT if the peak value of the drain voltage exceeds the threshold is smaller than an attenuation amount of a signal which passes through the variable attenuator VATT if the peak value of the drain voltage does not exceed the threshold.
Effects of the present embodiment will be described in comparison with a comparative example.
In 4G and 5G, if a modulation bandwidth is 20 MHz, the number of subcarriers is 12×100=1200. Since 64 is 26, 6 bits can be sent by one subcarrier at one time. 1200 units×6 bits=7.2 kbits. One subcarrier sends 14000 symbols per second, and 7.2 k×14000=about 100 Mbits/sec can be sent in the 20 MHz band.
In 64-QAM, an amplitude changes from ±1 to ±3 to ±5 to ±7 from a center O in a direction of the I-ch, and changes in a direction of the Q-ch in the same manner. For example, a value A indicates a modulated value with an amplitude of sqrt(7{circumflex over ( )}2+7{circumflex over ( )}2)=sqrt(49*2)=sqrt (2)·7and a phase of 45°. A value B indicates a modulated value with an amplitude of sqrt (3{circumflex over ( )}2+1{circumflex over ( )}2)=sqrt(10) and a phase of about 18°. Note that since the I-ch and the Q-ch are the same with cosine and sine, an amplitude of a cosine carrier is set to +7, and an amplitude of a sine carrier is set to +7 to obtain a value of A (+7·cos (ωt)-(+7).sin (107 t)). Similarly, an amplitude of a cosine carrier may be set to 3, and an amplitude of a sine carrier may be set to 1 to obtain a value of B (+3·.cos (ωt)-(+1)·sin (ωt)). Such modulation is individually performed on 12 subcarriers.
To accurately demodulate 1024 subcarriers modulated by 64-QAM or 256-QAM as described above, it is necessary to accurately transmit the amplitudes and the phases shown in
An example of AM-AM/AM-PM characteristics when a modulation signal as described above is input to the power amplifier according to the comparative example will be described.
A defective condition experienced by the inventors will be described.
The above-described defective condition is sometimes experienced if a change in gain is sharp, and the amount of change is large or if a phase change is large as in
Under the circumstances, cause investigation was performed with a suspicion that there was a cause other than circuit design. As a result, it was experimentally confirmed that, when a modulation wave was input to a single GaN HEMT while power supply-side impedance and load impedance were set at ones equivalent to those in an amplifier module, a large amplitude shift and a large phase shift occurred as the input power level became relatively high.
An example of a transient response delay of a drain current will be described below.
A drain voltage of a GaN HEMT at the time of simultaneous amplification of many subcarriers subjected to multilevel modulation sometimes has a very high peak output, as described earlier. It is inferred that, if a transient response of a drain current is delayed at this time, the drain current does not rise, a gain becomes low at low input power, as shown in
The challenge is to suppress changes in AM-AM/AM-PM to the degree that distortion compensation by a Digital Pre-distorter DPD functions appropriately. It is thus conceivable to place, in front of a power amplifier module, the diode linearizer shown in
However, it is found from characteristics of a PAM with the linearizer in
In the present embodiment, the variable attenuator VATT is mounted in the power amplifier to suppress the above-described gain difference.
As has been described above, in the present embodiment, a diode linearizer and a variable attenuator are connected in series to the input of an amplifier, and if a peak value of a drain voltage of the amplifier exceeds a threshold, the diode linearizer is made to function. For this reason, even if a Digital Pre-distorter cannot make distortion compensation well due to a memory effect arising from a momentary drain voltage of the amplifier, the linearizer can suppress deterioration of linearity. Thus, a distortion characteristic which is generally required of a base station can be achieved by distortion compensation by the Digital Pre-distorter. If the diode linearizer functions, since a gain decreases, an attenuation amount of the variable attenuator is reduced. This allows reduction in gain variation of a power amplifier.
Since the diode linearizer LNZ and the variable attenuator VATT are very simple analog circuits, the diode linearizer LNZ and the variable attenuator VATT can each be implemented not only by a GaN HEMT but also by a GaAs FET/HEMT and are suitable for size reduction and cost reduction. Note that, since the same configuration can be implemented by using a group IV Si-based semiconductor, a power amplifier according to the present embodiment is not limited to group III-V.
In PTL 1 as well, a drain voltage of an FET of a power amplifier is monitored, and a phase shifter compensates for AM-PM in accordance with the monitored drain voltage. However, if implementation using analog circuits is presupposed, AM-AM may change simultaneously with compensation of AM-PM. Thus, the present embodiment that compensates for both the AM-PM and the AM-AM has a larger compensation effect. A gain deviation between presence and absence of activation of the diode linearizer LNZ can also be suppressed.
Note that, although Doherty amplifiers are the mainstream as practical power amplifiers for base stations, a similar phenomenon occurs due to a trapping effect of a transistor itself, and a Digital Pre-distorter may not be able to make distortion compensation for an amplifier other than a Doherty amplifier. The present embodiment is thus effective for a case where an amplifier is not a Doherty amplifier.
Generally, a peak value of a drain voltage of a carrier amplifier Trc at a final stage is higher than the peak value of the drain voltage of the driver amplifier Trd. Note that, depending on the circuit design, a peak value of a drain voltage of a GaN HEMT in the driver amplifier Trd may become excessively high to become a major factor for a transient response characteristic delay of a drain current. In this case, the present embodiment is effective, and the same effects as those of the first embodiment can be obtained.
Note that although only one driver amplifier Trd is provided in
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2022/030255 | 8/8/2022 | WO |
