This application claims priority to Chinese Patent Application No. 201410755052.X, filed on Dec. 11, 2014, the contents of which are incorporated by reference herein.
The subject matter herein generally relates to a power control circuit of an electronic device.
Electronic devices, for example, computers, may automatically power on when a power supply is changed. Thus, the electronic device may improperly booted.
Implementations of the present technology will now be described, by way of example only, with reference to the attached figures.
It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features. The description is not to be considered as limiting the scope of the embodiments described herein.
A definition that apply throughout this disclosure will now be presented.
The term “comprising” means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in a so-described combination, group, series, and the like.
The power control circuit 10 includes a manual switch S1, a time delay module 20, a control module 30, a first signal switch Q1, a first resistor R1 and a detection module 40. The manual switch S1, the time delay module 20, the control module 30 and a first resistor R1 all can connect to an output port Vin of the external power source 60. The first resistor R1 connects to the detection module 40. When the first resistor R1 connects to the output port Vin of the external power source 60, a high level signal is output to the detection module 40. The manual switch S1 connects to the first signal switch Q1 and the time delay module 20. When the manual switch S1 is pressed, the time delay module 20 makes the first signal switch Q1 receive a high level signal in a delay time. The first signal switch Q1 outputs a low level signal to the detection module 40 according to the received high level signal.
When the detection module 40 continuously detects a high level signal in a time period less than the delay time, the control module 30 outputs a high level control signal to the power control system 80. The power control system 80 shuts down a system power supply of the electronic device 100 according to the high level control signal. When the detection module 40 detects a low level signal in a time period less than the delay time, the control module 30 outputs a low level control signal to the power control system 80, the system power supply of the electronic device 100 is powered on according to the low level control signal.
In the embodiment, the time delay module 20 includes a capacitor C1 and a second resistor R2. One end of the capacitor C1 connects to the output port Vin of the external power source 60, and the other end of the capacitor C1 connects to the second resistor R2 and the manual switch S1. The other end of the second resistor R2 is grounded.
The manual switch S1 connects to the first signal switch Q1 through the third resistor R3. The first signal switch Q1 is a transistor. The third resistor R3 connects to a base of the transistor. An emitter of the transistor is grounded. A collector of the transistor connects to a detection port STATE of the detection module 40. When the manual switch S1 is pressed, the transistor turns on. Thus, the detection port STATE receives a low level, and the detection module 40 detects a low level control signal. The collector of the transistor is grounded through a voltage regulator tube D1.
The control module 30 includes a D-flip flop 70, a second signal switch Q2 and a third signal switch Q3. The D-flip flop 70 includes a setting pin S, a reset pin R and an output pin Q.
The setting pin S connects to an end of the capacitor C1 connected to the second resistor R2 and an end of the manual switch S1 connected to the first signal switch Q1. The output pin Q connects to the second signal switch Q2. The second signal switch Q2 further connects to the power control system 80. The power control system 80 further connects to the output port Vin of the external power source 60 through a fourth resistor R4. When the second signal switch Q2 receives a high level signal from the output pin Q, the second signal switch Q2 outputs a low level control signal to the power control system 80.
In the embodiment, the output pin Q connects to the second signal switch Q2 through a fifth resistor R5. The second signal switch Q2 is a transistor. A base of the transistor connects to the output pin Q. An emitter of the transistor is grounded. A collector of the transistor connects to the power control system 80. When the transistor receives a high level signal from the output pin Q, the transistor turns on. Thus, the power control system 80 receives a low level control signal. The reset pin R connects to the third signal switch Q3 and is grounded through a sixth resistor R6. The reset pin R further connects to the output port Vin of an external power source 60 through a seventh resistor R7. When the third signal switch Q3 receives a high level signal, the third signal switch Q3 outputs a low level signal.
When changing the power supply of the electronic device 100, the detection module 40 detects the high level of the detection port STATE. If the manual switch S1 is pressed, the setting pin S connects to the output port Vin of the external power source 60. Thus, the setting pin S is in a high level, that is, S=1. Because the reset pin R connects to output port Vin of the external power source 60, when the third signal switch Q3 is cut-off, the reset pin R also is in a high level, that is, R=1.
After a time period time less than the delay time, if the detection module 40 detects the detection port STATE in a high level, it illustrates that the first signal switch Q1 is cut-off and the manual switch S1 is not pressed. The system of the electronic device 100 is to be powered off. After a period time more than the delay time, the third signal switch Q3 receives a low level signal. Thus, the third signal switch Q3 is cut-off and the reset pin R receives a high level signal, that is, R=1. After a period time more than the delay time, the setting pin S receives a low level, that is, S=0.
The embodiments shown and described above are only examples. Even though numerous characteristics and advantages of the present technology have been set forth in the foregoing description, together with details of the structure and function of the present disclosure, the disclosure is illustrative only, and changes may be made in the details, including in matters of shape, size, and arrangement of the parts within the principles of the present disclosure, up to and including the full extent established by the broad general meaning of the terms used in the claims.
Number | Date | Country | Kind |
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201410755052.X | Dec 2014 | CN | national |