Patent Application
20250216475
This application is based upon and claims priority to Japanese Patent Application No. 2023-223534, filed on Dec. 28, 2023, the entire contents of which are incorporated herein by reference.
The present disclosure relates to power converters and islanding operation detection methods.
Conventionally, an islanding operation detection device that detects an islanding operation of distributed power sources is known from Japanese Laid-Open Patent Publication No. 2007-215392, and Japanese Laid-Open Patent Publication No. 2017-51063, for example.
Inverters capable of coordinating with a power grid include a current controlled inverter that controls input-output current on the AC side, and a voltage controlled inverter that controls an output voltage on the AC side. However, an islanding operation detector applied to the current controlled inverter cannot be applied to the voltage controlled inverter, such as a grid forming inverter (GFM inverter) or the like.
Accordingly, it is an object in one aspect of the embodiments to provide a power converter and an islanding operation detection method capable of detecting an islanding operation of a voltage controlled inverter, such as the GEM inverter or the like.
According to one aspect of the embodiments, a power converter of a first aspect includes an inverter including an inverter circuit configured to convert a DC power into an AC power, and a reactor provided between the inverter circuit and an interconnection point; and a control device configured to control the inverter as a voltage controlled inverter, wherein the inverter outputs an output voltage superimposed with a harmonic to the interconnection point, and the control device generates a first signal obtained by multiplying a signal of the harmonic to an output current measurement value of the inverter, generates a second signal by filtering the first signal, generates a third signal that is an absolute value of the second signal, generates a fourth signal by performing a lowpass filtering process on the third signal, and detects an islanding operation of the inverter based on the third signal and the fourth signal.
The object and advantages of the embodiments will be realized and attained by means of the elements and combinations particularly pointed out in the claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and not restrictive of the invention, as claimed.
[1] According to a first aspect of the present disclosure, a power converter includes an inverter including an inverter circuit configured to convert a DC power into an AC power, and a reactor provided between the inverter circuit and an interconnection point; and a control device configured to control the inverter as a voltage controlled inverter, wherein the inverter outputs an output voltage superimposed with a harmonic to the interconnection point, and the control device generates a first signal obtained by multiplying a signal of the harmonic to an output current measurement value of the inverter, generates a second signal by filtering the first signal, generates a third signal that is an absolute value of the second signal, generates a fourth signal by performing a lowpass filtering process on the third signal, and detects an islanding operation of the inverter based on the third signal and the fourth signal.
[2] According to a second aspect of the present disclosure, in the power converter according to [1] above, the control device may generate a fifth signal by multiplying a positive number less than 1 to the fourth signal, and detect the islanding operation of the inverter by comparing the third signal with the fifth signal.
[3] According to a third aspect of the present disclosure, in the power converter according to [2] above, the control device may determine that the inverter is in an islanding operation state in a case where the third signal is lower than the fifth signal.
[4] According to a fourth aspect of the present disclosure, in the power converter according to [2] or [3] above, the positive number may be greater than (maximum value of Y2)/(maximum value of Y1), where Y1 denotes an admittance between the interconnection point and a power grid, and Y2 denotes an admittance of a load connected to the interconnection point.
[5] According to a fifth aspect of the present disclosure, in the power converter according to any one of [1] to [4] above, the control device may generate the second signal from a moving average of the first signal.
[6] According to a sixth aspect of the present disclosure, in the power converter according to [5] above, a moving average time of a moving average filter that calculates the moving average of the first signal may be an integer multiple of a period of the signal of the harmonic or a time longer than the period of the signal of the harmonic.
[7] According to a seventh aspect of the present disclosure, in the power converter according to any one of [1] to [4] above, the control device may generate the second signal by performing a lowpass filtering process on the first signal.
[8] According to an eighth aspect of the present disclosure, in the power converter according to [7] above, a time constant of a lowpass filter that performs the lowpass filtering process on the first signal may be a time longer than the period of the signal of the harmonic.
[9] According to a ninth aspect of the present disclosure, in the power converter according to any one of [1] to [8] above, an amplitude of the harmonic superimposed on the output voltage may be smaller than a product of a reactance between the inverter circuit and the interconnection point and a harmonic current output limit value from the inverter circuit to the interconnection point.
[10] According to a tenth aspect of the present disclosure, an islanding operation detection method for a voltage controlled inverter including an inverter circuit configured to convert a DC power into an AC power, and a reactor provided between the inverter circuit and an interconnection point, includes causing the inverter to output an output voltage superimposed with a harmonic to the interconnection point; generating a first signal obtained by multiplying the signal of the harmonic to an output current measurement value of the inverter; generating a second signal by filtering the first signal; generating a third signal that is an absolute value of the second signal; generating a fourth signal by performing a lowpass filtering process on the third signal; and detecting an islanding operation of the inverter based on the third signal and the fourth signal.
Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the drawings, the same constituent elements or components are designated by the same reference numerals, and a redundant description thereof may be omitted.
The power converter 2 is a device that inputs the power to and outputs the power from the power grid 1. The power converter 2 includes an inverter 5 that inputs the power to and outputs the power from the power grid 1, and a control device 20 that operates the inverter 5 as a grid forming converter (GFM converter). Because the GEM inverter is required to function as a voltage source, the control device 20 controls the inverter 5 as a voltage controlled inverter.
The inverter 5 is a device that converts an input DC power into an AC power. The inverter 5 is an inverter based resource (IBR), for example, that converts the DC power generated from renewable energy, such as sunlight or the like, into the AC power, and operates in a state interconnected with the power grid 1. The inverter 5 includes a power conversion unit 6, a reactor L1, and a 5 switch 4.
The power conversion unit 6 converts an input DC power Pin (for example, the DC power generated from the renewable energy) into an AC power, according to a pulse width modulation signal (PWM pulse signal) VAC* which is an example of a command value supplied from the control device 20. The power conversion unit 6 outputs a voltage VAC corresponding to an AC voltage, according to the PWM pulse signal VAC*. The power conversion unit 6 is connected to the interconnection point N via the reactor L1, and is connected to the power grid 1 via the interconnection point N and the distribution line 10.
The reactor L1 is a passive device provided between the power conversion unit 6 and the interconnection point N. The reactor is also referred to as an inductor. The AC current output from the power conversion unit 6 via the reactor L1 flows to the interconnection point N as a current lout. The voltage VAC output from the power conversion unit 6 is converted into a sinusoidal voltage, as an output voltage vout of the inverter 5, by the reactor L1 and a capacitor C. Further, the reactor L1 and the capacitor C restrict a flow of a high-frequency current to the power grid 1.
The reactor L1 is a component having a reactance. The reactor L1 may be a reactor included in a filter, a leakage reactance of a transformer, or both of such a reactor and a transformer. Further, the reactor L1 is not limited to these components.
The switch 4 is connected between the power grid 1 and the power conversion unit 6. The switch 4 may be referred to as an interconnection switch.
In a case where the power converter 2 assumes an islanding operation state, the control device 20 detects this islanding operation state, and stops the operation of the inverter 5 or releases the switch 4 to stop the islanding operation state.
Specifically, while the power converter 2 is interconnected with the power grid 1, the load 11 is supplied with the power from both the power grid 1 and the power converter 2. When a circuit breaker 9 inserted in series to the distribution line 10 is released due to a system fault or the like in a state where the power converter 2 is performing an interconnection operation, the power supply from the power grid 1 is stopped. If the power converter 2 continues the islanding operation in a state where the power supply from the power grid 1 is stopped, a voltage continues to be applied to the power grid connected to the load 11, and thus, a security hazard may occur during operation of the power grid. For this reason, the power converter 2 has a function of detecting the islanding operation disconnected from the power grid 1 and performing a predetermined operation, such as cutting off the power supply to the load 11 or the like. Details of the islanding operation detection will be described later.
The inverter 5 is controlled by the control device 20 according to a voltage control (GEM control), and is a device that operates as a virtual synchronous generator (VSG), for example.
The control device 20 controls the output voltage vout of the inverter 5, by controlling the voltage VAC output from the power conversion unit 6. The output voltage vout corresponds to a voltage at the interconnection point N connected to the distribution line 10. The control device 20 generates a command value (for example, the PWM pulse signal VAC*) of the voltage VAC output by the power conversion unit 6, based on a measurement value of the output voltage vout at the interconnection point N and the output current iout flowing to the interconnection point N.
Functions of the control device 20 can be implemented by a processor, such as a central processing unit (CPU) or the like, which executes a program stored in a memory. The program may be stored in a non-transitory computer-readable storage medium, and the program which, when executed by a computer (or processor), may perform a process of the control device 20. The functions of the control device 20 can also be implemented by a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). Further, an analog circuit using an operational amplifier or the like may be used as a part of the control device 20.
The inverter 5 includes the power conversion unit 6, the reactor L1, the capacitor C, and the switch 4. The power conversion unit 6 includes a capacitor 7 and an inverter circuit 8.
The capacitor 7 smoothens a DC voltage input from an external device, such as a power generator that generates power using renewable energy, such as sunlight or the like. A DC voltage vdc corresponds to a voltage of the capacitor 7 (that is, a capacitor voltage).
The inverter circuit 8 is an inverter circuit that converts the DC power input from the external device, such as the power generator or the like, into the AC power. The inverter circuit 8 converts the DC voltage Vdc smoothened by the capacitor 7 into the voltage VAC corresponding to an AC voltage, and outputs the voltage VAC.
The control device 20B controls the inverter 5 according to the voltage control (GFM control). In this example, the control device 20B performs a virtual synchronous power generator control (VSG control) for controlling the inverter 5 so that the inverter 5 behaves like a synchronous power generator. For example, the control device 20B includes an active power controller 22, a reactive power controller 23, an instantaneous voltage controller 31, an adder 29, a PWM pulse generator 30, and an islanding operation detector 60.
The active power controller 22 generates a command value (a phase command value θref) of a phase θ of a three-phase output voltage vout to be output from the inverter 5 to the power grid 1, based on the VSG control. The phase command value θref is a phase of an output voltage command value vout,ref generated by the instantaneous voltage controller 31. The output voltage command value vout,ref is a command value of the three-phase output voltage vout to be output from the inverter 5 to the power grid 1.
The active power controller 22 generates the phase command value θref based on an active power command value Pref and an active power measurement value Pout, for example.
The active power command value Pref is a command value of an active power to be output from the inverter 5 to the power grid 1. The active power measurement value Pout is a measurement value of the active power actually output from the inverter 5 to the power grid 1. The active power measurement value Pout is a measurement value at the interconnection point N between the reactor L1 and the power grid 1.
In the following description, M denotes an inertia constant and D denotes a braking constant when the inverter 5 operates as the virtual synchronous generator.
The adder 22a outputs a value (Pref-Pout), obtained by subtracting the active power measurement value Pout from the active power command value Pref, to the adder 22b.
The adder 22b outputs a value, obtained by adding an input from the multiplier 22e to the input value (Pref-Pout) from the adder 22a, to the multiplier 22c.
The multiplier 22c outputs a value, obtained by multiplying 1/M to the input value from the adder 22b, to the integrator 22d.
The integrator 22d outputs a result, obtained by integrating the input value from the multiplier 22c, to the multiplier 22l.
The value obtained by the integration (or the value output from the integrator 22d) is a value obtained by integrating a frequency ω of the output voltages vout of the inverter 5 by a nominal frequency ωn of the power grid 1. In Japan, for example, the nominal frequency ωn is a value obtained by multiplying 2π to 50 Hz in eastern Japan, and is a value obtained by multiplying 2π to 60 Hz in western Japan.
The adder 22f outputs a value, obtained by subtracting the input value from the integrator 22d from 1, to the multiplier 22g. The input value to the adder 22f may be a value obtained by dividing the frequency ω of the output voltage vout measured at the interconnection node N by the nominal frequency ωn, instead of using the input value from the integrator 22d.
The multiplier 22g outputs a value, obtained by multiplying the braking constant D of the virtual synchronous generator (VSG) (in this example, the braking constant D of the inverter 5 which operates as the VSG) to the input value from the adder 22f, to the adder 22b.
The multiplier 22l outputs a value obtained by multiplying the nominal frequency on to the input value from the integrator 22d. The output value of the multiplier 22l corresponds to a command value of the frequency of the output voltage vout (that is, the frequency of the voltage VAC output from the inverter circuit 8) to be output from the inverter 5 to the power grid 1.
The integrator 22n integrates the input value from the multiplier 22l, and outputs the phase command value θref as an integration result.
In
The reactive power controller 23 generates the amplitude command value Vref, based on a reactive power command value Qref, a reactive power measurement value Qout, and the output voltage amplitude command value Vout,ref, for example.
The reactive power command value Qref is a command value of a reactive power to be output from the inverter 5 to the power grid 1. The reactive power measurement value Qout is a measurement value of the reactive power actually output from the inverter 5 to the power grid 1. The reactive power measurement value Qout is a measurement value at the interconnection point N between the reactor L1 and the power grid 1.
The output voltage amplitude command value Vout,ref is a command value of an amplitude of the output voltage vout to be output from the inverter 5 to the power grid 1.
The adder 23a outputs a value, obtained by subtracting the reactive power measurement value Qout from the reactive power command value Qref, to the multiplier 23b and the multiplier 23c.
The multiplier 23b outputs a value, obtained by multiplying a gain Kp,QV to an input value from the adder 23a, to the adder 23e. The gain Kp,QV is a parameter for performing a proportional control so as to minimize a difference between the reactive power measurement value Qout and the reactive power command value Qref. The gain Kp,QV is a proportional gain of a proportional integral controller (PI controller) for Q-V droop control, for example.
The multiplier 23c outputs a value, obtained by multiplying a gain Ki,QV to the input value from the adder 23a, to the integrator 23d. The gain Ki,QV is a parameter for performing an integral control so as to minimize the difference between the reactive power measurement value Qout and the reactive power command value Qref. The gain Ki,QV is an integral gain of a proportional integral controller (PI controller) for Q-V droop control, for example.
The integrator 23d outputs a result of a time integration of an input value from the multiplier 23c to the adder 23e.
The adder 23e outputs a value, obtained by adding an input value from the multiplier 23b and an input value from the integrator 23d, to the adder 23f.
The adder 23f outputs a value, obtained by adding an input value from the adder 23e and the amplitude command value Vout,ref of the output voltage vout, to the limiter 23g.
The limiter 23g limits an input value from the adder 23f, based on an upper limit value and a lower limit value that are set, and outputs the limited value as the amplitude command value Vref.
The limiter 23g outputs the input value from the adder 23f as it is when the input value from the adder 23f is greater than or equal to a lower limit value Vref,LLIM and is less than or equal to an upper limit value Vref,ULIM.
The limiter 23g outputs the upper limit value Vref,ULIM when the input value from the adder 23f is greater than the upper limit value Vref,ULIM. The limiter 23g outputs the lower limit value Vref,LLIM when the input value from the adder 23f is less than the lower limit value Vref,LLIM.
The output value of the limiter 23g corresponds to a command value (a voltage command value Vref) of the amplitude V of the three-phase output voltage vout to be output from the inverter 5 to the power grid 1.
In
The adder 31a outputs a value (θref−(2π/3)), obtained by subtracting (2π/3) from the phase angle command value θref, to the cosine function generator 31d.
The adder 31b outputs a value (θref+(2π/3)), obtained by adding the phase angle command value θref and (2π/3), to the cosine function generator 31e.
The multiplier 31f multiplies the amplitude command value Vref to an input value cos(θref) from the cosine function generator 31c, and outputs the multiplied value as an output voltage command value Vout,ref,a of an A-phase.
The multiplier 31g multiplies the amplitude command value Vref to an input value cos(θref−(2π/3)) from the cosine function generator 31d, and outputs the multiplied value as an output voltage command value Vout,ref,b of a B-phase.
The multiplier 31h multiplies the amplitude command value Vref to an input value cos(θref+(2π/3)) from the cosine function generator 31e, and outputs the multiplied value as an output voltage command value vout,ref,c of a C-phase.
The multiplexer 31i combines (or multiplexes) the output voltage command values vout,ref,a, vout,ref,b, and vout,ref,c of the respective phases into one signal, and outputs the output voltage command value vout,ref of the three-phase output voltage vref to be output from the inverter 5 to the power grid 1. In this example, the three signals are combined into one signal by the multiplexer 31i in order to facilitate processing of the three signals, but the three signals may be sent to the next stage (or block) as three separate signals without using the multiplexer 31i.
In
In
In
The multiplier 61 multiplies an amplitude Aν to a ν-th harmonic signal sν having an amplitude of 1, to generate a v-th harmonic Vν having the amplitude Aν, and outputs the v-th harmonic Vν to the adder 29. ν is a number greater than 1 (excluding multiples of 3), and is preferably a non-integer in order to improve an islanding operation detection accuracy. The ν-th harmonic signal sν is a signal having a frequency that is ν times a rated frequency (for example, 50 Hz or 60 Hz) of the power grid 1.
In
On the other hand, the multiplier 62 generates the first signal s1 by multiplying the output current measurement value iout to the first harmonic signal sν, and outputs the first signal s1 to the filter 63. The output current measurement value iout is a measurement value of a three-phase output current output from the inverter 5 to the power grid 1. Although the multiplier 62 generates the first signal s1 for three phases, the multiplier 62 may generate the first signal s1 for only one phase.
Because the ν-th harmonic vν is superimposed on the output voltage command value vout,ref in the adder 29, the ν-th component is mixed to the output current measurement value iout. The islanding operation detector 60 detects the islanding operation of the inverter 5 by evaluating an amplitude of the ν-th order component mixed to the output current measurement value iout.
The filter 63 generates a second signal s2 by filtering the first signal s1. The filter 63 extracts the ν-th order component included in the measured current value iout by performing a filtering process corresponding to a Fourier series expansion process on the first signal s1.
The filter 63 is a moving average filter that computes a moving average of the first signal s1, for example. A moving average time of the moving average filter is set to an integral multiple of the period of the ν-th harmonic signal sν, or to a time that is sufficiently long compared to the period of the ν-th harmonic signal sν, for example. The moving average time of the moving average filter is set to a time that is sufficiently short compared to a predetermined single operation detection time limit. By using the moving average filter as the filter 63, it is possible to extract a detection signal “b” in which pulsation of the ν-th order component is suppressed. The detection signal “b” will be described later.
The filter 63 may be a lowpass filter that performs a lowpass filtering process on the first signal s1 to generate the second signal s2 in which the high-frequency components of the first signal s1 are attenuated more than the low-frequency components of the first signal s1. In the case of the lowpass filter, a time constant thereof is set to a time that is sufficiently long compared to the period of the ν-th harmonic signal sν, for example. The time constant of the lowpass filter is set to a time that is sufficiently short compared to the predetermined single operation detection time limit. By using the lowpass filter for the filter 63, the detection signal “b”, which will be described later, in which the pulsation of the ν-th order component is suppressed, can be extracted.
The abs function generator 64 is an absolute value computing unit that generates a third signal s3 that is an absolute value of the second signal s2. The absolute value of the second signal s2 is computed because the second signal s2 may have a negative value.
The lowpass filter 65 performs the lowpass filtering process on the third signal s3, to output the third signal s3 in which the high-frequency components are attenuated more than the low-frequency components, as the detection signal “b”. In a case where the lowpass filter 65 is not provided, the detection signal “b” may be the same as the third signal s3.
The lowpass filter 66 generates a fourth signal s4 by performing a lowpass filtering process on the detection signal “b”. A time constant of the lowpass filter 66 is set to a time that is longer than the predetermined single operation detection time limit, for example.
The multiplier 67 generates a fifth signal “a” by multiplying a positive number c less than 1 to the fourth signal s4.
The determination unit 68 compares the detection signal “b” with the fifth signal “a” to determine (or detect) the islanding operation of the inverter 5. When the inverter 5 assumes the islanding state, a phenomenon occurs in which a harmonic admittance on an output side of the inverter 5 decreases. The determination unit 68 determines (or detects) the islanding operation of the inverter 5 by comparing the fifth signal “b” (or the third signal s3 in the case where the lowpass filter 65 is not provided) with the fifth signal “a” by utilizing this phenomenon.
As described above, the power converter 2 according to the first embodiment (that is, the islanding operation detection method performed by the islanding operation detector 60 of the control device 20B) can detect the islanding operation of the inverter 5 (or the power converter 2).
In the case where the islanding operation of the inverter 5 is detected by the islanding operation detector 60, the control device 20B takes measures, such as canceling the islanding operation of the inverter 5 (or the power converter 2) by releasing the switch 4 or stopping the inverter 5, for example.
The amplitude Aν of the harmonic vν superimposed on the output voltage command value vout,ref is set to a value that is smaller than a product of a “reactance X related to the ν-th order component” between the inverter circuit 8 and the interconnection point N, and a harmonic current output limit value Imax from the inverter circuit 8 to the interconnection point N, for example. Thus, while the inverter 5 is interconnected with the power grid 1, the ν-th harmonic current flowing out to the power grid 1 can be maintained less than or equal to the harmonic current output limit value Imax.
The positive number c less than 1 illustrated in
More specifically, in
In
ν is set to 2.8, and the positive number c is set to 0.4. The time constant of the lowpass filter 66 is set to 1.0 s.
After shifting to the islanding operation state, the detection signal “b” rapidly decreases. In contrast, the fifth signal “a” (=fourth signal s4×positive number c) is generated by the configuration illustrated in
The embodiments are described above, but the embodiments are presented as examples, and the present invention is not limited to the embodiments. The above described embodiments can be implemented in various other forms, and various combinations, omissions, substitutions, modifications, or the like can be made without departing from the scope spirit of the present invention. The embodiments, modifications, and equivalents thereof are included in the scope and spirit of the present invention.
For example, the amplitude command value Vref is not limited to being generated by the reactive power controller as in the embodiment described above, and may be generated through another control, such as a constant voltage control in which the amplitude command value Vref is set to a constant value, for example.
According to the disclosed technique, it is possible to provide a power converter and an islanding operation detection method capable of detecting an islanding operation of a voltage controlled inverter, such as the GEM inverter or the like.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2023-223534 | Dec 2023 | JP | national |
