Power converter including a charge pump employable in a power adapter

Abstract

A power converter including a charge pump employable in a power adapter. In one embodiment, the charge pump includes a voltage divider with a first diode having a terminal coupled to a terminal of a first capacitor and a second diode having a terminal coupled to a terminal of a second capacitor and another terminal coupled to another terminal of the first capacitor. The charge pump also includes a third diode coupled across the second diode and the second capacitor, and a charge pump power switch coupled across the first capacitor and the second diode.

Description

TECHNICAL FIELD

The present invention is directed, in general, to power electronics and, more specifically, to a power converter including a charge pump employable in a power adapter.

BACKGROUND

A switched-mode power converter (also referred to as a “power converter”) is a power supply or power processing circuit that converts an input voltage waveform into a specified output voltage waveform. DC-DC power converters convert a direct current (“dc”) input voltage into a dc output voltage. Controllers associated with the power converters manage an operation thereof by controlling conduction periods of power switches employed therein. Generally, the controllers are coupled between an input and output of the power converter in a feedback loop configuration (also referred to as a “control loop” or “closed control loop”).

Typically, the controller measures an output characteristic (e.g., an output voltage, an output current, or a combination of an output voltage and an output current) of the power converter, and based thereon modifies a duty cycle of a power switch of the power converter. The duty cycle “D” is a ratio represented by a conduction period of a power switch to a switching period thereof. Thus, if a power switch conducts for half of the switching period, the duty cycle for the power switch would be 0.5 (or 50 percent). Additionally, as the voltage or the current for systems, such as a microprocessor powered by the power converter, dynamically change (e.g., as a computational load on the microprocessor changes), the controller should be configured to dynamically increase or decrease the duty cycle of the power switches therein to maintain an output characteristic such as an output voltage at a desired value.

In a server or other high-end power supply applications, a microcontroller is typically used in connection with the primary side of the power train of the power converter to handle higher-level power management tasks. Most present-generation microcontrollers operate from a 3.3 volt (“V”) bias voltage source, and can consume up to 100 milliamps (“mA”) or more of bias current during an operation thereof. To provide a 3.3 V bias voltage source for the microcontroller, a dissipative power supply referred to as a linear regulator is typically coupled to a higher input voltage source such as a 12 V bias voltage source to produce the 3.3 V bias voltage for the microcontroller. In many power supply designs, the input voltage to the linear regulator is produced by an auxiliary power converter that provides supply voltages for housekeeping needs including both primary- and secondary-side housekeeping needs. For primary-side housekeeping needs, a 12-14 V bias voltage source is typically provided for a pulse-width modulation (“PWM”) control integrated circuit (“IC”) and for a driver IC to drive primary-side power switches. A linear regulator can directly reduce the 12-14 V bias voltage to the 3.3 V bias voltage. A drawback of a linear regulator, however, is its power loss, which can be as large as one watt (“W”), and is significant due to the large voltage drop produced by the linear regulator. In a high-efficiency power supply design, the power loss produced by such a linear regulator is an important loss component in view of a typical efficiency target at light load, as well as a need for careful thermal management of the linear regulator power dissipation.

In a conventional solution to convert 12-14 V down to 3.3 V, the linear regulator is replaced with a power converter such as a small dc-dc power converter to provide 3.3 V, or to provide a 5 V bias voltage followed by a low-dropout linear regulator. The dc-dc power converter typically provides high efficiency, which can be greater than 90%, but the cost and component count of the dc-dc power converter as well as the printed circuit board area that it occupies can be significant drawbacks of such a design.

Cost and efficiency compromises provided by conventional approaches to providing an auxiliary bias voltage in a power converter have become obstacles in the high-volume, competitive marketplaces now being served by such designs. Thus, despite continued size and cost reductions of components associated with power conversion, no satisfactory strategy has emerged to resolve the issues associated with providing a small, efficient, and low-cost bias voltage in a power converter for an internal housekeeping function. Accordingly, what is needed in the art is a circuit and related method to produce an internal bias voltage in a power converter that avoids the aforementioned obstacles, particularly for high-volume, low-cost manufacture of power adapters and other power supplies employing the same.

SUMMARY OF THE INVENTION

These and other problems are generally solved or circumvented, and technical advantages are generally achieved, by advantageous embodiments of the present invention, including a power converter including a charge pump employable in a power adapter. In one embodiment, the charge pump, and related method of forming and operating the same, includes a voltage divider with a first diode having a terminal coupled to a terminal of a first capacitor and a second diode having a terminal coupled to a terminal of a second capacitor and another terminal coupled to another terminal of the first capacitor. The charge pump also includes a third diode coupled across the second diode and the second capacitor, and a charge pump power switch coupled across the first capacitor and the second diode.

In another aspect, a power converter, and related method of forming and operating the same, includes a transformer including a primary winding, a secondary winding and a bias winding. The power converter also includes a power switch coupled to the primary winding, an auxiliary switch coupled to the secondary winding and a charge pump coupled to the bias winding as described herein. The power converter also includes a linear regulator coupled to the charge pump and a controller coupled to the linear regulator and the power switch. The power converter is employable in a power adaptor or other power supply as the application dictates.

The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter, which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

For a more complete understanding of the present invention, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

FIG. 1 illustrates a schematic diagram of an embodiment of a power adapter constructed according to the principles of the present invention;

FIG. 2 illustrates a schematic diagram of a switched-mode dc-dc power converter configured to divide a dc input bias voltage source by a factor of two to produce a bias voltage;

FIG. 3 illustrates a schematic diagram of a switched-mode dc-dc power converter that eliminates a need for one of the power switches illustrated in FIG. 2; and

FIGS. 4 and 5 illustrate schematic diagrams of embodiments of a charge pump employable in a power converter constructed according to the principles of the present invention.

Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated, and may not be redescribed in the interest of brevity after the first instance. The Figures are drawn to illustrate the relevant aspects of exemplary embodiments.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

The making and using of the present exemplary embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.

The present invention will be described with respect to exemplary embodiments in a specific context, namely, a charge pump employable in a power converter configured to produce a voltage (e.g., a bias voltage) that is a fraction of an ac input voltage. While the principles of the present invention will be described in the environment of a power converter, any application that may benefit from a charge pump including a power amplifier or a motor controller is well within the broad scope of the present invention.

A power converter is frequently employed in electronic power conversion applications such as a power supply (e.g., power adapter) for a desktop computer or server because of its high power conversion efficiency and low cost. In higher power applications such as for servers or motor controllers, full- or half-bridge switched-mode power converters are frequently employed. In lower power applications such as for laptop computers and printers, a flyback switched-mode power converter is frequently employed.

Turning now to FIG. 1, illustrated is a schematic diagram of an embodiment of a power adapter constructed according to the principles of the present invention. A power train (e.g., a flyback power train) of the power converter (also referred to as a “flyback power converter”) includes a power switch Q_main, coupled to a source of electrical power (e.g., an ac mains 110), an electromagnetic interference (“EMI”) filter 120, and an input filter capacitor C_in to provide a substantially filtered dc input voltage V_in, to a magnetic device (e.g., an isolating transformer or transformer T₁). Although the EMI filter 120 illustrated in FIG. 1 is positioned between the ac mains 110 and a bridge rectifier 130, the EMI filter 120 may contain filtering components positioned between the bridge rectifier 130 and the transformer T₁. The transformer T₁ has a primary winding N_p and a secondary winding N_s with a turns ratio that is selected to provide an output voltage V_out with consideration of a resulting duty cycle and stress on power train components.

The power switch Q_main (e.g., an n-channel field-effect transistor) is controlled by a controller (e.g., a pulse-width modulator (“PWM”) controller 140) that controls the power switch Q_main to be conducting for a duty cycle. The power switch Q_main conducts in response to gate drive signal V_G produced by the PWM controller 140 with a switching frequency (often designated as “f_s”). The duty cycle is controlled (e.g., adjusted) by the PWM controller 140 to regulate an output characteristic of the power converter such as an output voltage V_out, an output current I_out, or a combination thereof. A feedback path 150 enables the PWM controller 140 to control the duty cycle to regulate the output characteristic of the power converter. Of course, as is well known in the art, a circuit isolation element such as an opto-isolator may be employed in the feedback path 150 to maintain input-output isolation of the power converter. The ac voltage or alternating voltage appearing on the secondary winding N_s of the transformer T₁ is rectified by an auxiliary power switch (e.g., a diode D₁), and the dc component of the resulting waveform is coupled to the output through the low-pass output filter including an output filter capacitor C_out to produce the output voltage V_out. The transformer T₁ is also formed with a third winding (e.g., a bias winding) N_bias that will be described later hereinbelow.

During a first portion of the duty cycle, a current I_pri (e.g., an inductor current) flowing through the primary winding N_p of the transformer T₁ increases as current flows from the input through the power switch Q_main. During a complementary portion of the duty cycle (generally co-existent with a complementary duty cycle 1-D of the power switch Q_main), the power switch Q_main is transitioned to a non-conducting state. Residual magnetic energy stored in the transformer T₁ causes conduction of current I_sec through the diode D₁ when the power switch Q_main, is off. The diode D₁, which is coupled to the output filter capacitor C_out, provides a path to maintain continuity of a magnetizing current of the transformer T₁. During the complementary portion of the duty cycle, the magnetizing current flowing through the secondary winding N_s of the transformer T₁ decreases. In general, the duty cycle of the power switch Q_main, may be controlled (e.g., adjusted) to maintain a regulation of or regulate the output voltage V_out of the power converter.

In order to regulate the output voltage V_out, a value or a scaled value of the output voltage V_out is typically compared with a reference voltage in the PWM controller 140 using an error amplifier (not shown) to control the duty cycle. This forms a negative feedback arrangement to regulate the output voltage V_out to a (scaled) value of the reference voltage. A larger duty cycle implies that the power switch Q_main is closed for a longer fraction of the switching period of the power converter. Thus, the power converter is operable with a switching cycle wherein an input voltage V_in is coupled to the transformer T₁ for a fraction of a switching period by the power switch Q_main controlled by the PWM controller 140.

Typically, the PWM controller 140 is powered by a bias voltage (e.g., 12 volts) from an internal bias voltage source. If the PWM controller 140 includes a lower voltage-based microcontroller requiring, for instance, 3.3 volts to operate, then a dissipative power supply such as a linear regulator is typically coupled to the internal bias voltage source to produce the 3.3 V bias voltage for the microcontroller or the like. To improve the efficiency of the linear regulator, a switched-capacitor dc-dc power converter may be employed to approximately divide the voltage produced by the internal bias voltage source by an integer such as 2, 3, 4, etc. For example, a 12 V bias voltage source can be divided by a factor of about two to produce a 6 V bias voltage source by coupling the switched-capacitor dc-dc power converter to the 12 V bias voltage source.

Turning now to FIG. 2, illustrated is a schematic diagram of a switched-capacitor dc-dc power converter configured to divide a dc input bias voltage source represented by a battery V_in, by a factor of two to produce a bias voltage V_bias. The switched-capacitor dc-dc power converter illustrated in FIG. 2 employs two power switches Q₁, Q₂ (with body diodes D_b1, D_b2, respectively), two diodes D_A, D_B, a flying capacitor C_A and an output capacitor C_B. The operation of the switched-capacitor dc-dc power converter illustrated in FIG. 2 is described by Xu, et al., in U.S. Patent Application Publication No. 2007/0296383, published Dec. 27, 2007, which is incorporated herein by reference. The switched-capacitor dc-dc power converter illustrated in FIG. 2 and variations thereof, as described by Xu, et al., can be configured to provide high power conversion density and high power conversion efficiency.

As is well known in the art, portions of the switched-capacitor dc-dc power converter illustrated in FIG. 2 may be replicated to provide a higher voltage-dividing factor, such as a voltage-dividing factor of 3, 4 or more. Replication of portions of a switched-capacitor dc-dc power converter to provide a higher voltage-dividing factor are described by P. Chhawchharia, et al., in the paper entitled “On the Reduction of Component Count in Switched Capacitor DC/DC Converters,” PESC Record, Vol. 2, June 1998, pp. 1395-1401, which is incorporated herein by reference. It is recognized that a switched-capacitor dc-dc power converter does not precisely divide an input voltage by an integer, due to inherent losses in such circuits.

Turning now to FIG. 3, illustrated is a schematic diagram of a switched-capacitor dc-dc power converter that eliminates a need for one of the power switches illustrated in FIG. 2. The switched-capacitor dc-dc power converter illustrated in FIG. 3 is configured to divide a dc input bias voltage source represented by the battery V_in by a factor of two to produce a bias voltage V_bias, employing one power switch Q₂, two diodes D_A, D_B, a flying capacitor C_A, and an output capacitor C_B. The flying capacitor C_A and an output capacitor C_B may be one microfarad. In place of the active switch Q₁ illustrated in FIG. 2, the switched-capacitor dc-dc power converter illustrated in FIG. 3 employs an inductor L. The operation of the switched-capacitor dc-dc power converter illustrated in FIG. 3 is described by Kuwabara, et al., in the paper entitled “Switched-Capacitor DC-DC Converters,” published in the Proceedings of INTELEC 1988, pp. 213-218, which is incorporated herein by reference. The substitution of an inductor L for a power switch obviously saves the cost of the power switch, adds the cost of the inductor, and renders integration of the switched-capacitor dc-dc power converter into a compact module more difficult. As is well known in the art, portions of the switched-capacitor dc-dc power converter illustrated in FIG. 3 may be replicated to provide a higher voltage-dividing factor, such as a voltage-dividing factor of 3, 4 or more. As is further known in the art, a plurality of switched-capacitor dc-dc power converters may be coupled in tandem to produce a voltage-dividing factor that is a product of each of the respective switched-capacitor dc-dc power converters. The switched-capacitor dc-dc power converters illustrated in FIGS. 2 and 3 eliminate the need for a more complex topology such as a buck power converter.

A low cost, high efficiency power converter including a charge pump is introduced herein that can be employed to divide approximately an input voltage by an integer, thereby replacing a topology such as a buck power converter in cost-sensitive applications. Using the charge pump, a 12-14 V voltage source can be efficiently divided down to 6-7 V, and then fed to a linear regulator (e.g., a low-dropout linear regulator) to obtain a desired low voltage bias voltage source such as a 3.3 V bias voltage source for the microcontroller associated with a PWM controller. The power loss can be reduced by approximately one half compared to using a linear regulator with a higher input voltage with its lower efficiency. Thermal design issues are correspondingly reduced.

In a typical application, an auxiliary winding (e.g., a bias winding) and associated pins would be added to a high-frequency transformer in a power converter to generate an ac voltage or alternating voltage such as a 12 V rectangular waveform. The charge pump can be advantageously constructed with minimal cost with only a few small components. The charge pump basically modifies (e.g., divides) the alternating voltage from the bias winding in half by charging and discharging a “flying” capacitor. It provides high efficiency and low cost with little added space.

Turning now to FIG. 4, illustrated is a schematic diagram of an embodiment of a charge pump 410 employable in a power converter constructed according to the principles of the present invention. The charge pump 410 is coupled to an ac voltage source at a circuit node N provided by the bias winding N_bias of the transformer T₁ that was illustrated and described with reference to FIG. 1. FIG. 4 illustrates a primary-side bias voltage source V_cc1 produced by a diode D₂ and a filter capacitor C₂ (e.g., 47 microfarads) coupled to the ac voltage source at the circuit node N. In the embodiment of the charge pump presently being described, the ac voltage source at the circuit node N provides an alternating positive and negative 12 V rectangular waveform at 100 kilohertz (“kHz”). The charge pump 410 includes a voltage divider 420 formed with a first diode D_1CP), a first capacitor C_1CP (e.g., a one microfarad), a second diode D_2CP and a second capacitor C_2CP(e.g., one microfarad). The first diode D_1CP is series-coupled to the first capacitor C_1CP at a first node N1, and the second diode D_2CP is series-coupled to the second capacitor C_2CP at a second node N2 and coupled to the first capacitor C_1CP at a third node N3.

When the voltage at the circuit node N is a positive 12 V, the first diode D_1CP conducts, charging the first capacitor C_1CP and the second capacitor C_2CP through the second diode D_2CP. Note that the first and second diodes D_1CP, D_2CP are poled in the same direction. In other words, the first and second diodes D_1CP, D_2CP are poled so that a current can be conducted therethrough when a positive voltage is present at the circuit node N. The first and second capacitors C_1CP, C_2CP have substantially equal capacitance. Accordingly, each of the first and second capacitors C_1CP, C_2CP is charged to roughly half the 12 V input less the forward voltage drops of the first and second diodes D_1CP, D_2CP. Recognizing the small forward voltage drop in the first and second diodes D_1CP, D_2CP, the voltage applied at the circuit node N is thus divided approximately in half across each of the first and second capacitors C_1CP, C_2CP.

When the voltage at the circuit node N is a positive 12 V, a charge pump power switch or power switch Q_div (coupled between the first and second nodes N1, N2) is turned off by a gate drive signal V_G that was illustrated and described hereinabove with reference to FIG. 1. The diode D_B illustrated FIG. 4 is the body diode of the power switch Q_div. When the voltage at the circuit node N is a negative 12 V, the power switch Q_div is turned on by the gate drive signal V_G, coupling the first and second capacitors C_1CP, C_2CP in parallel. This switching action substantially balances the charges in the first and second capacitors C_1CP, C_2CP, recognizing the small disparity in charge produced by the forward voltage drop presented by a third diode D_3CP. The power switch is Q_div is enabled to conduct in synchronization with an alternating voltage applied to the voltage divider 420 via the bias winding N_bias of the transformer T₁ of the power converter. The third diode D_3CP is coupled between the third node N3 and a fourth node N4 coupled to the second capacitor C_2CP Accordingly, a bias voltage source V_cc2 is produced that is slightly less than half the 12 V amplitude of the rectangular ac waveform at the circuit node N. A parallel-coupled resistor R_G (e.g., a 22 ohm) and diode D_G are included in series with a control terminal of the power switch Q_div to retard turn-on timing of the power switch Q_div in response to the gate drive signal V_G, but not its turn-off timing.

Additionally, the bias voltage source V_cc2 produced by the charge pump 410 is fed to a linear regulator 430 to obtain a desired low voltage bias voltage source such as a 3.3 V bias voltage source for a microcontroller or the like associated with a controller such as a PWM controller (designated “To CNTL”). The linear regulator 430, therefore, modifies the bias voltage V_cc2 for use by the controller of a power converter. The power loss can be reduced by approximately one half compared to using a linear regulator with a higher input voltage with its lower efficiency. Thermal design issues are correspondingly reduced.

The charge pump illustrated in FIG. 4 can be readily modified to operate with a forward or other power train topology by changing the power switch Q_div to a P-channel metal-oxide semiconductor field-effect transistor (“MOSFET”) or to a positive-negative-positive (“PNP”) doped bipolar junction transistor, or by reversing the polarity sense of the bias winding N_bias as necessary with respect to timing of the gate drive signal V_G. The charge pump 410 illustrated in FIG. 4 can also be readily modified by replicating portions thereof to provide a higher voltage-dividing ratio (see, e.g., the charge pump illustrated and described with respect to FIG. 5).

Turning now to FIG. 5, illustrated is a schematic diagram of another embodiment of a charge pump 510 employable in a power converter constructed according to the principles of the present invention. The charge pump 510 is coupled to an ac voltage source at a circuit node N provided by the bias winding N_bias of the transformer T₁ that was illustrated and described with reference to FIG. 1. As described previously hereinabove with reference to FIG. 4, FIG. 5 illustrates a primary-side bias voltage source V_cc1 produced by a diode D₂ and a filter capacitor C₂ (e.g., 47 microfarads) coupled to the ac voltage source at the circuit node N. In the embodiment of the charge pump 510 presently being described, the ac voltage source at the circuit node N again provides an alternating positive and negative 12 V rectangular waveform at 100 kilohertz (“kHz”).

The charge pump 510 illustrated in FIG. 5 includes a voltage divider 520 formed with a first diode D_1CP, a first capacitor C_1CP (e.g., a one microfarad), a second diode D_2CP, a second capacitor C_2CP(e.g., one microfarad), and a third capacitor C_3CP(e.g., a one microfarad). The first diode D_1CP is series-coupled to the first capacitor C_1CP at a first node N1, and the second diode D_2CP is series-coupled to the second capacitor C_2CP at a second node N2 and coupled to the first capacitor C_1CP at a third node N3. The second capacitor C_2CP is coupled between the second node N2 and a fourth node N4. The third capacitor C_3CP is coupled to the first diode D_1CP at a fifth node N5 and to the circuit node N.

When the voltage at the circuit node N is a positive 12 V, the first diode D_1CP conducts, charging the first capacitor C_1CP, the second capacitor C_2CP, and the third capacitor C_3CP through the second diode D_2CP. Note that the first and second diodes D_1CP, D_2CP are poled in the same direction. In other words, the first and second diodes D_1CP, D_2CP are poled so that a current can be conducted therethrough when a positive voltage is present at the circuit node N. The first, second, and third capacitors C_1CP, C_2CP, C_3CP have substantially equal capacitance. Accordingly, each of the first, second, and third capacitors C_1CP, C_2CP, C_3CP is charged to roughly one third the 12 V input less the forward voltage drops of the first and second diodes D_1CP, D_2CP. Recognizing the small forward voltage drop in the first and second diodes D_1CP, D_2CP, the voltage applied at the circuit node N is thus divided approximately in one third across each of the first, second, and third capacitors C_1CP, C_2CP, C_3CP.

When the voltage at the circuit node N is a positive 12 V, a first charge pump power switch or first power switch Q_div1 (coupled between the first and second nodes N1, N2) and a second charge pump power switch or second power switch Q_div2 (coupled between the node N and the second node N2) are turned off by the gate drive signal V_G that was illustrated and described hereinabove with reference to FIG. 1. The diode D_B1 illustrated FIG. 5 is the body diode of the first power switch Q_div1, and the diode D_B2 illustrated FIG. 5 is the body diode of the second power switch Q_div2. When the voltage at the circuit node N is a negative 12 V, the first and second power switches Q_div1, Q_div2 are turned on by the gate drive signal V_G, coupling the first, second, and third capacitors C_1CP, C_2CP, C_3CP in parallel. This switching action substantially balances the charges in the first, second, and third capacitors C_1CP, C_2CP, C_3CP, recognizing the small disparity in charge produced by the forward voltage drop presented by third and fourth diodes D_3CP, D_4CP. The first and second power switches Q_div1, Q_div2 are enabled to conduct in synchronization with an alternating voltage applied to the voltage divider 520 via the bias winding N_bias of the transformer T₁ of the power converter. The third diode D_3CP is coupled between the third and fourth nodes N3, N4 and the fourth diode D_4CP is coupled between the fourth and fifth nodes N4, N5. Accordingly, a bias voltage V_cc2 is produced that is slightly less than one third the 12 V amplitude of the rectangular ac waveform at the circuit node N. A parallel-coupled resistor R_G (e.g., a 22 ohm resistor) and diode D_G are included in series with a control terminals of the first and second power switches Q_div1, Q_div2 to retard turn-on timing of the first and second power switches Q_div1, Q_div2 in response to the gate drive signal V_G, but not their turn-off timing.

Additionally, the bias voltage V_cc2 produced by the charge pump 510 may be fed to the linear regulator 530 to obtain a desired low voltage bias voltage source for a microcontroller or the like associated with a controller such as a PWM controller (again designated “To CNTL”). The linear regulator 530, therefore, modifies the bias voltage V_cc2 for use by the controller of a power converter. The power loss can be substantially reduced compared to using a linear regulator with a higher input voltage with its lower efficiency. Thermal design issues are correspondingly reduced.

The charge pump 510 illustrated in FIG. 5 can be correspondingly readily modified to operate with a forward or other power train topology by changing the first and second power switches Q_div1, Q_div2 to P-channel MOSFETs or to positive-negative-positive (“PNP”) doped bipolar junction transistors, and by reversing the polarity sense of the bias winding N_bias as necessary with respect to timing of the gate drive signal V_G. While the charge pump 510 illustrated in FIG. 5 divides the voltage applied at the circuit node N approximately in one third, the charge pump 510 can also be readily modified by replicating portions thereof to provide a still higher voltage-dividing ratio.

Thus, a charge pump employable in a power converter has been introduced that can be advantageously constructed with a plurality of diodes, a power switch and a plurality of capacitors (e.g., a flying capacitor and another capacitor). The charge pump can be constructed without the need to add an inductor to replace a power switch required in a conventional switched-capacitor dc-dc power converter design. In one embodiment, the charge pump, and related method of forming and operating the same, includes a voltage divider (couplable to a bias winding of a transformer of a power converter) with a first diode having a terminal (e.g., a cathode terminal) coupled to a terminal of a first capacitor. The first diode is series-coupled to the first capacitor. The voltage divider also includes a second diode having a terminal (e.g., a cathode terminal) coupled to a terminal of a second capacitor and another terminal (e.g., an anode terminal) coupled to another terminal of the first capacitor. The second diode is series-coupled to the second capacitor. Also, the first diode and the second diode are poled in a same direction.

The charge pump also includes a third diode coupled across the second diode and the second capacitor. The third diode has a terminal (e.g., a cathode terminal) coupled to the another terminal (e.g., the anode terminal) of the second diode and another terminal (e.g., an anode terminal) coupled to another terminal of the second capacitor. The charge pump also includes a charge pump power switch coupled across the first capacitor and the second diode. The charge pump power switch is coupled to the terminal of the first capacitor and the terminal of the second capacitor. The charge pump power switch is enabled to conduct in synchronization with an alternating voltage applied to the voltage divider. The charge pump may include a fourth diode and another charge pump power switch and the voltage divider may include a third capacitor. Additionally, a control terminal of the charge pump power switch is coupled to a parallel-coupled resistor and diode.

In another embodiment, a power converter, and related method of forming the same, includes a transformer including a primary winding, a secondary winding and a bias winding. The power converter also includes a power switch coupled to the primary winding, an auxiliary switch (e.g., a diode) coupled to the secondary winding and a charge pump coupled to the bias winding as described herein. The power converter also includes a linear regulator coupled to the charge pump and a controller (e.g., a PWM controller) coupled to the linear regulator and the power switch. The power converter is employable in a power adaptor or other power supply as the application dictates.

In a related embodiment, a method of operating a power converter includes providing a transformer including a primary winding, a secondary winding and a bias winding. The method also includes impressing a voltage across the primary winding from a source of electrical power, rectifying an alternating voltage appearing on the secondary winding, and producing a bias voltage from an alternating voltage appearing on the bias winding with a charge pump as described herein. The method also includes modifying the bias voltage (e.g., with a linear regulator) for use by a controller (e.g., a PWM controller) of the power converter.

Those skilled in the art should understand that the previously described embodiments of a switched-capacitor power converter and related methods of operating the same are submitted for illustrative purposes only. For example, in a further embodiment, a switched-capacitor power converter that is coupled to a half-wave bridge instead of a flyback power train can use techniques described herein. While a switched-capacitor power converter has been described in the environment of a power converter for a microcontroller, these processes may also be applied to other systems such as, without limitation, a power amplifier or a motor controller.

For a better understanding of power converters, see “Modern DC-to-DC Power Switch-mode Power Converter Circuits,” by Rudolph P. Severns and Gordon Bloom, Van Nostrand Reinhold Company, New York, N.Y. (1985) and “Principles of Power Electronics,” by J. G. Kassakian, M. F. Schlecht and G. C. Verghese, Addison-Wesley (1991).

Also, although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. For example, many of the processes discussed above can be implemented in different methodologies and replaced by other processes, or a combination thereof.

Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods, and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.

Claims

1. A charge pump, comprising: a voltage divider, including: a first diode having a terminal coupled to a terminal of a first capacitor, anda second diode having a terminal coupled to a terminal of a second capacitor and another terminal coupled to another terminal of said first capacitor;a third diode coupled across said second diode and said second capacitor;a power switch coupled across said first capacitor and said second diode; anda parallel-coupled resistor and diode coupled to a control terminal of said power switch and configured to retard a turn-on timing of said power switch in response to a drive signal for another power switch.

2. The charge pump as recited in claim 1 wherein said terminal of said first diode is a cathode terminal.

3. The charge pump as recited in claim 1 wherein said terminal of said second diode is a cathode terminal and said another terminal of said second diode is an anode terminal.

4. The charge pump as recited in claim 1 wherein said third diode has a terminal coupled to said another terminal of said second diode and another terminal coupled to another terminal of said second capacitor.

5. The charge pump as recited in claim 4 wherein said terminal of said third diode is a cathode terminal and said another terminal of said third diode is an anode terminal.

6. The charge pump as recited in claim 1 wherein said power switch is coupled to said terminal of said first capacitor and said terminal of said second capacitor.

7. The charge pump as recited in claim 1 wherein said first diode is series-coupled to said first capacitor and said second diode is series-coupled to said second capacitor.

8. The charge pump as recited in claim 1 wherein said first diode and said second diode are poled in a same direction.

9. The charge pump as recited in claim 1 wherein said power switch is enabled to conduct in synchronization with an alternating voltage applied to said voltage divider.

10. The charge pump as recited in claim 1 wherein said voltage divider includes a third capacitor and said charge pump comprises a fourth diode and another power switch.

11. A method of forming a charge pump, comprising: providing a voltage divider, including: coupling a terminal of a first diode to a terminal of a first capacitor,coupling a terminal of a second diode to a terminal of a second capacitor, andcoupling another terminal of said second diode to another terminal of said first capacitor;coupling a third diode across said second diode and said second capacitor;coupling a power switch across said first capacitor and said second diode; andcoupling a parallel-coupled resistor and diode to a control terminal of said power switch configured to retard a turn-on timing of said power switch in response to a drive signal for another power switch.

12. The method as recited in claim 11 wherein said terminal of said first diode is a cathode terminal, said terminal of said second diode is a cathode terminal and said another terminal of said second diode is an anode terminal.

13. The method as recited in claim 11 wherein said coupling said third diode comprises coupling a terminal of said third diode to said another terminal of said second diode and coupling another terminal of said third diode to another terminal of said second capacitor.

14. The method as recited in claim 11 wherein said first diode is series-coupled to said first capacitor and said second diode is series-coupled to said second capacitor, said first diode and said second diode being poled in a same direction.

15. The method as recited in claim 11 wherein said providing further includes coupling a third capacitor to said terminal of said first capacitor and said method further comprises coupling another power switch to said power switch and coupling a fourth diode to said terminal of said first capacitor.

16. A power converter, comprising: a transformer including a primary winding, a secondary winding and a bias winding;a power switch coupled to said primary winding;an auxiliary switch coupled to said secondary winding; anda charge pump coupled to said bias winding, comprising: a voltage divider, including: a first diode having a terminal coupled to a terminal of a first capacitor, anda second diode having a terminal coupled to a terminal of a second capacitor and another terminal coupled to another terminal of said first capacitor;a third diode coupled across said second diode and said second capacitor;a charge pump power switch coupled across said first capacitor and said second diode; anda parallel-coupled resistor and diode coupled to a control terminal of said charge pump power switch and configured to retard a turn-on timing of said charge pump power switch in response to a drive signal for said power switch.

17. The power converter as recited in claim 16, further comprising: a linear regulator coupled to said second capacitor; anda controller coupled to said linear regulator and said power switch.

18. The power converter as recited in claim 16 wherein said auxiliary switch is a diode.

19. The power converter as recited in claim 16 wherein another terminal of said first diode is coupled to said bias winding.

20. The power converter as recited in claim 16 wherein said terminal of said first diode is a cathode terminal, said terminal of said second diode is a cathode terminal and said another terminal of said second diode is an anode terminal.

21. The power converter as recited in claim 16 wherein said third diode has a terminal coupled to said another terminal of said second diode and another terminal coupled to another terminal of said second capacitor.

22. The power converter as recited in claim 16 wherein said charge pump power switch is coupled to said terminal of said first capacitor and said terminal of said second capacitor.

23. The power converter as recited in claim 16 wherein said first diode is series-coupled to said first capacitor and said second diode is series-coupled to said second capacitor.

24. The power converter as recited in claim 16 wherein said first diode and said second diode are poled in a same direction.

25. The power converter as recited in claim 16 wherein said voltage divider includes a third capacitor and said charge pump includes a fourth diode and another charge pump power switch.

26. A method of operating a power converter, comprising: providing a transformer including a primary winding, a secondary winding and a bias winding;impressing a voltage across said primary winding from a source of electrical power;rectifying an alternating voltage appearing on said secondary winding; andproducing a bias voltage from an alternating voltage appearing on said bias winding with a charge pump, comprising: a voltage divider, including: a first diode having a terminal coupled to a terminal of a first capacitor, anda second diode having a terminal coupled to a terminal of a second capacitor and another terminal coupled to another terminal of said first capacitor;a third diode coupled across said second diode and said second capacitor;a charge pump power switch coupled across said first capacitor and said second diode; anda parallel-coupled resistor and diode coupled to a control terminal of said charge pump power switch and configured to retard a turn-on timing of said charge pump power switch in response to a drive signal for another power switch.

27. The method as recited in claim 26 further comprising modifying said bias voltage for use by a controller of said power converter.

28. The method as recited in claim 26 wherein another terminal of said first diode is coupled to said bias winding.

29. The method as recited in claim 26 wherein said charge pump power switch is enabled to conduct in synchronization with said alternating voltage.

30. The method as recited in claim 26 wherein said voltage divider includes a third capacitor and said charge pump includes a fourth diode and another charge pump power switch.