This application claims priority of China Patent Application No. 202311787411.5, filed on Dec. 22, 2023, the entirety of which is incorporated by reference herein.
The present invention relates to a converter, and in particular it relates to a power converter for decreasing the switching power consumption and the temperature of a switch.
Generally speaking, when a traditional power converter performs a switching operation, the power converter may use a high-frequency switching signal to perform the switching operation on a switch. This may cause the switching power consumption and the temperature of the switch in the power converter to be too high. As a result, components become especially prone to aging, and it also limits the module power operation. Therefore, how to effectively solve the problem of the switching power consumption and the temperature of the switch in the power converter being too high has become an important issue.
An embodiment of the present invention provides a power converter, thereby effectively decreasing the switching power consumption and the temperature, so as to avoid the accelerated aging of components and limiting module power.
An embodiment of the present invention provides a power converter, which includes an inverter module and a control module. The inverter module includes a first arm and a second arm. The inverter module is configured to receive a first alternating current voltage, a plurality of first control signals and a plurality of second control signals. The first arm and the second arm are configured to transform the first alternating current voltage to a first direct current voltage and a second direct current voltage according to the first control signals and the second control signals. The control module is electrically connected to the first arm and the second arm. The control module is configured to receive the first alternating current voltage and a predetermined voltage, and generate the first control signals to the first arm and generate the second control signals to the second arm according to the first alternating current voltage and the predetermined voltage. In each of the driving periods, the frequency of the first control signals is different from the frequency of the second control signals. In at least two of the driving periods, the frequencies of the first control signals are different.
An embodiment of the present invention provides a power converter, which includes an inverter module, an inductor module and a control module. The inverter module includes a first upper switch module, a first lower switch module, a second upper switch module, a second lower switch module, a first diode, a second diode, a third diode and a fourth diode. The first diode is electrically connected to the first upper switch module. The second diode is electrically connected to the first diode and the first lower switch module. The third diode is electrically connected to the first diode and the second upper switch module. The fourth diode is electrically connected to the third diode and the second lower switch module. The inverter module is configured to receive a first alternating current voltage, a plurality of first control signals and a plurality of second control signals, and the first upper switch module, the first lower switch module, the second switch module and the second switch module are configured to transform the first alternating current voltage to a first direct current voltage and a second direct current voltage according to the first control signals and the second control signals. The inductor module is electrically connected to the first upper switch module, the first lower switch module, the second upper switch module and the second lower switch module. The inductor module is configured to receive a second alternating current voltage to generate the first alternating current voltage. The control module is electrically connected to the first upper switch module, the first lower switch module, the second upper switch module, the second lower switch module, and the inductor module. The control module is configured to receive the first alternating current voltage and a predetermined voltage, and generate the first control signals to the first upper switch module and the first lower switch module and generate the second control signals to the second upper switch module and the second lower switch module according to the first alternating current voltage and the predetermined voltage. In at least two of a plurality of driving periods, the frequencies of the first control signals are different.
According to the power converter disclosed by the present invention, the control module generates the first control signals to the first arm (or the first upper switch module and the first lower switch module) of the inverter module and generates the second control signals to the second arm (or the second upper switch module and the second lower switch module) of the inverter module according to the first alternating current voltage and the predetermined voltage, wherein in each of the driving periods, the frequency of the first control signals is different from the frequency of the second control signals, and in at least two of the driving periods, the frequencies of the first control signals are different. Therefore, it may effectively decrease the switching power consumption and the temperature of the first arm (or the first upper switch module and the first lower switch module) and the second arm (or the second upper switch module and the second lower switch module) of the inverter module, so as to avoid the accelerated aging of components and limiting module power.
The present invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:
Technical terms of the disclosure are based on general definition in the technical field of the disclosure. If the disclosure describes or explains one or some terms, definition of the terms is based on the description or explanation of the disclosure. Each of the disclosed embodiments has one or more technical features. In possible implementation, a person skilled in the art would selectively implement all or some technical features of any embodiment of the disclosure or selectively combine all or some technical features of the embodiments of the disclosure.
In each of the following embodiments, the same reference number represents an element or component that is the same or similar.
The inverter module 110 may include a first arm 111 and a second arm 112. The inverter module 110 may receive a first alternating current voltage Vab, a plurality of first control signals CS11˜CS14 and a plurality of second control signals CS21˜CS24. In addition, the first arm 111 and the second arm 112 of the inverter module 110 may transform the first alternating current voltage Vab to a first direct current voltage VO1 and a second direct current voltage VO2 according to the first control signals CS11˜CS14 and the second control signals CS21˜CS24. In the embodiment, the first arm 111 may perform a switching operation according to the first control signals CS11˜CS14 and the second arm 112 may perform a switching operation according to the second control signals CS21˜CS24, so that the inverter module 110 transforms the first alternating current voltage Vab to the first direct current voltage VO1 and the second direct current voltage VO2.
The control module 120 may be connected to the first arm 111 and the second arm 112. The control module 120 may receive the first alternating current voltage Vab and a predetermined voltage VP, and generate the first control signals CS11˜CS14 to the first arm 111 and generate the second control signals CS21˜CS24 to the second arm 112 according to the first alternating current voltage Vab and the predetermined voltage VP. In the embodiment, the above predetermined voltage VP is, for example, a zero voltage (0V). Furthermore, the predetermined voltage VP is specifically a zero-crossing voltage of the first alternating current voltage Vab, so it is usually a preset voltage inside the power converter 100, and may also be an externally provided signal, but the embodiment of the present invention is not limited thereto.
In the embodiment, in each of a plurality of driving periods, a frequency of the first control signals CS11˜CS14 is different from a frequency of the second control signals CS21˜CS24. The number of driving periods being two is provided as an example, such as driving periods T1˜T2, as shown in
In addition, the number of driving periods being ten is provided as an example, such as driving periods T1˜T10. In some embodiments, in the driving period T1, when the frequency of the first control signals CS11˜CS14 is high frequency, the frequency of the second control signals CS21˜CS24 is low frequency. In some embodiments, in the driving period T1, when the frequency of the first control signals CS11˜CS14 is low frequency, the frequency of the second control signals CS21˜CS24 is high frequency. The rest of the driving periods T2˜T10 may be deduced by analogy.
Furthermore, in at least two of the above driving periods, the frequency of the first control signals CS11˜CS14 are different. The number of driving periods being two is provided as an example, such as driving periods T1˜T2, as shown in
In addition, the number of driving periods being ten is provided as an example, such as driving periods T1˜T10. In some embodiments, in the driving period T1, the frequency of the first control signals CS11˜CS14 is high frequency, and in the driving periods T2˜T10, the frequency of the first control signals CS11˜CS14 is low frequency. In some embodiments, in the driving periods Tl and T6, the frequency of the first control signals CS11˜CS14 is high frequency, and in the driving periods T2˜T5 and T7˜T10, the frequency of the first control signals CS11˜CS14 is low frequency.
In some embodiments, in the driving periods T1˜T2, the frequency of the first control signals CS11˜CS14 is high frequency, and in the driving periods T3˜T10, the frequency of the first control signals CS11˜CS14 is low frequency. In some embodiments, in the driving periods T1, T3, T5, T7 and T9, the frequency of the first control signals CS11˜CS14 is high frequency, and in the driving periods T2, T4, T6, T8 and T10, the frequency of the first control signals CS11˜CS14 is low frequency. The rest of the corresponding relationships between the driving periods T1˜T10 and the frequency of the first control signals CS11˜CS14 may be deduced by analogy.
As mentioned above, through the control of the above control module 120, the frequency of the first control signals CS11˜CS14 or the second control signals CS21˜CS24 may not always be at the high frequency, thus the switching operation of the inverter module 110 may not be concentrated on the same arm (i.e., the first arm 111 or the second arm 112) for high frequency switching, and the switching power consumption and the temperature of any arm may not be too high. Therefore, it may effectively decrease the switching power consumption and the temperature of the first arm 111 and the second arm 112, so as to avoid the accelerated aging of components and limiting module power.
Furthermore, the period during which the frequencies corresponding to the first control signals CS11˜CS14 and the second control signals CS21˜CS24 are switched between the high frequency and the low frequency may be symmetrical. For example, the number of driving periods being ten is provided as an example, such as driving periods T1˜T10. In some embodiments, in the driving periods T1, T3, T5, T7 and T9, the frequency of the first control signals CS11˜CS14 is high frequency and the second frequency of the second control signals CS21˜CS24 is low frequency, and in the driving period T2, T4, T6, T8 and T10, the frequency of the first control signals CS11˜CS14 is low frequency and the frequency of the second control signals CS21˜CS24 is high frequency.
In some embodiments, in the driving periods T1˜T2, T5˜T6 and T9˜T10, the frequency of the first control signals CS11˜CS14 is high frequency and the frequency of the second control signals CS21˜CS24 is low frequency, and in the driving periods T3˜T4 and T7˜T8, the frequency of the first control signals CS11˜CS14 is low frequency and the frequency of the second control signals CS21˜CS24 is high frequency. In some embodiments, in the driving periods T1˜T5, the frequency of the first control signals CS11˜CS14 is high frequency and the frequency of the second control signals CS21˜CS24 is low frequency, and in the driving periods T6˜T10, the frequency of the first control signals CS11˜CS14 is low frequency and the frequency of the second control signals CS21˜CS24 is high frequency. The rest of the corresponding relationships among the driving periods T1˜T10, the frequency of the first control signals CS11˜CS14 and the frequency of the second control signals CS21˜CS24 may be deduced by analogy.
That is, the period during which the first control signals CS11˜CS14 and the second control signals CS21˜CS24 maintain the high frequency operation or the low frequency operation may be a multiple of the period of the first alternating current voltage Vab (or the second alternating current voltage Vgrid), and specifically it may be a multiple of the period of the positive half-cycle voltage and the negative half-cycle voltage of the first alternating current voltage Vab (or the second alternating current voltage Vgrid) (including 1˜N times, N is a natural number). Namely, the first control signals CS11˜CS14 and the second control signals CS21˜CS24 perform one frequency switching in every period of the first alternating current voltage Vab (or the second alternating current voltage Vgrid), or every two periods of the first alternating current voltage Vab (or the second alternating current voltage Vgrid), and so on. Therefore, the time when the first arm 111 and the second arm 112 are in the high frequency switching and the low frequency switching may be symmetrical, so that the switching power consumption and the temperature of the first arm 111 and the second arm 112 are more balanced.
In addition, in some embodiments, a time point at which the first control signals CS11˜CS14 and the second control signals CS21˜CS24 switch between the high frequency operation or the low frequency operation may be any point (i.e., it is not limited to switching at the position of the zero-crossing point of the first alternating current voltage Vab or the second alternating current voltage Vgrid). However, after each switching, a time of a multiple of the period of one first alternating current voltage Vab (or the second alternating current voltage Vgrid) needs to pass before the next switching may be performed.
In addition, in some embodiments, a voltage level of a part of the first control signals CS11˜CS14 is different from a voltage level of another part of the first control signals CS11˜CS14. As shown in
Furthermore, a voltage level of a part of the second control signals CS21˜CS24 is different from a voltage level of another part of the second control signals CS21˜CS24. As shown in
The first switch unit SW1 has a first terminal, a second terminal and a control terminal. The first terminal of the first switch SW1 is electrically connected to a first direct current voltage node N1. The control terminal of the first switch unit SW1 receives the first control signal CS11. Furthermore, the first switch unit SW1 includes a first transistor TR1, a first freewheeling diode DF1 and a first capacitor C1. The first transistor TR1 has a first terminal, a second terminal and a control terminal. The first terminal of the first transistor TR1 is electrically connected to the first terminal of the first switch unit SW1. The second terminal of the first transistor TR1 is electrically connected to the second terminal of the first switch unit SW1. The control terminal of the first transistor TR1 is electrically connected to the control terminal of the first switch unit SW1. The first freewheeling diode DF1 has a first terminal (such as a cathode terminal) and a second terminal (such as an anode terminal). The first terminal of the first freewheeling diode DF1 is electrically connected to the first terminal of the first transistor TR1. The second terminal of the first freewheeling diode DF1 is electrically connected to the second terminal of the first transistor TR1.
The first capacitor C1 has a first terminal and a second terminal. The first terminal of the first capacitor C1 is electrically connected to the first terminal of the first freewheeling diode DF1. The second terminal of the first capacitor C1 is electrically connected to the second terminal of the first freewheeling diode DF1. In the embodiment, the first transistor TR1 may be an N-type transistor, wherein the first terminal, the second terminal and the control terminal of the first transistor TR1 are respectively a drain terminal, a source terminal and a gate terminal of the N-type transistor, but the embodiment is not limited thereto. In other embodiments, the first transistor TR1 may be a P-type transistor or another suitable transistor. In the embodiment, the first capacitor C1 may be a parasitic capacitance of the first transistor TR1 or a circuit equivalent capacitance.
In the embodiment, when the first transistor TR1 is a metal-oxide-semiconductor field-effect transistor (MOSFET), the first freewheeling diode DF1 may be an internal component (such as a parasitic diode) of the first transistor TR1. When the first transistor TR1 is an insulated gate bipolar transistor (IGBT), the first freewheeling diode DF1 may be an external component of the first transistor TR1. In the embodiment, the other switch units (SW2˜SW8) includes the same of similar components and feature as the first switch unit SW1. Therefore, the following introduction of the internal details of the switch unit (i.e., the second transistor TR2˜the eighth transistor TR8, the second freewheeling diode DF2˜the eighth freewheeling diode DF8 and the second capacitor C2˜the eighth capacitor C8) may be determined by analogy with the description of the first transistor TR1, the first freewheeling diode DF1 and the first capacitor C1 and shown in
The second switch unit SW2 has a first terminal, a second terminal and a control terminal. The first terminal of the second switch unit SW2 is electrically connected to the second terminal of the first switch unit SW1. The second terminal of the second switch unit SW2 receives the first alternating current voltage Vab. The control terminal of the second switch unit SW2 receives the first control signal CS12.
The third switch unit SW3 has a first terminal, a second terminal and a control terminal. The first terminal of the third switch unit SW3 is electrically connected to the second terminal of the second switch unit SW2. The control terminal of the third switch unit SW3 receives the first control signal CS13.
The fourth switch unit SW4 has a first terminal, a second terminal and a control terminal. The first terminal of the fourth switch unit SW4 is electrically connected to the second terminal of the third switch unit SW3. The control terminal of the fourth switch unit SW4 receives the first control signal CS14. The second terminal of the fourth switch unit SW4 is electrically connected to a second direct current voltage node N2.
The first diode D1 has a first terminal (such as a cathode terminal) and a second terminal (such as an anode terminal). The first terminal of the first diode D1 is electrically connected to the second terminal of the first switch unit SW1. The second terminal of the first diode D1 is electrically connected to a third direct current voltage node N3. The second diode D2 has a first terminal (such as a cathode terminal) and a second terminal (such as an anode terminal). The first terminal of the second diode D2 is electrically connected to the second terminal of the first diode D1. The second terminal of the second diode D2 is electrically connected to the second terminal of the third switch unit SW3.
The second arm 112 of the inverter module 110 includes a fifth switch unit SW5, a sixth switch unit SW6, a seventh switch unit SW7, an eighth switch unit SW8, a third diode D3 and a fourth diode D4.
The fifth switch unit SW5 has a first terminal, a second terminal and a control terminal. The first terminal of the fifth switch unit SW5 is electrically connected to the first terminal of the first switch unit SW1. The control terminal of the fifth switch unit SW5 receives the second control signal CS21.
The sixth switch unit SW6 has a first terminal, a second terminal and a control terminal. The first terminal of the sixth switch unit SW6 is electrically connected to the second terminal of the fifth switch unit SW5. The second terminal of the sixth switch unit SW6 receives the first alternating current voltage Vab. The control terminal of the sixth switch unit SW6 receives the second control signal CS22.
The seventh switch unit SW7 has a first terminal, a second terminal and a control terminal. The first terminal of the seventh switch unit SW7 is electrically connected to the second terminal of the sixth switch unit SW6. The control terminal of the seventh switch unit SW7 receives the second control signal CS23.
The eighth switch unit SW8 has a first terminal, a second terminal and a control terminal. The first terminal of the eighth switch unit SW8 is electrically connected to the second terminal of the seventh switch unit SW7. The second terminal of the eighth switch unit SW8 is electrically connected to the second terminal of the fourth switch unit SW4. The control terminal of the eighth switch unit SW8 receives the second control signal CS24.
The third diode D3 has a first terminal (such as a cathode terminal) and a second terminal (such as an anode terminal). The first terminal of the third diode D3 is electrically connected to the second terminal of the fifth switch unit SW5. The second terminal of the third diode D3 is electrically connected to the second terminal of the first diode D1. The fourth diode D4 has a first terminal (such as a cathode terminal) and a second terminal (such as an anode terminal). The first terminal of the fourth diode D4 is electrically connected to the second terminal of the third diode D3. The second terminal of the fourth diode D4 is electrically connected to the second terminal of the seventh switch unit SW7.
In addition, the inverter module 110 further includes an inductor module 310, a first voltage-stabilizing capacitor CO1 and a second voltage-stabilizing capacitor CO2. The inductor module 310 may be electrically connected to the first arm 111 and the second arm 112. The inductor module 310 may receive the second alternating current voltage Vgrid to generate the first alternating current voltage Vab. In the embodiment, the second alternating current voltage Vgrid is, for example, a mains voltage, and the first alternating current voltage Vab is, for example, an inverter voltage.
In addition, the control module 120 may further receive the second alternating current voltage Vgrid. In some embodiments, the control module 120 may generate the first control signals CS11˜CS14 and the second control signals CS21˜CS24 according to the first alternating current voltage Vab and the predetermined voltage VP or the first alternating current voltage Vab, the predetermined voltage VP and the second alternating current voltage Vgrid.
The first voltage-stabilizing capacitor CO1 has a first terminal and a second terminal. The first terminal of the first voltage-stabilizing capacitor CO1 is electrically connected to the first terminal of the first switch unit SW1 (i.e., the first direct current voltage node N1). The second terminal of the first voltage-stabilizing capacitor CO1 is electrically connected to the second terminal of the first diode D1 (i.e., the third direct current voltage node N3), so as to generate the first direct current voltage VO1 at two terminals of the first voltage-stabilizing capacitor CO1. The second voltage-stabilizing capacitor CO2 has a first terminal and a second terminal. The first terminal of the second voltage-stabilizing capacitor CO2 is electrically connected to the second terminal of the first voltage-stabilizing capacitor CO1. The second terminal of the second voltage-stabilizing capacitor CO2 is electrically connected to the second terminal of the fourth switch unit SW4 (i.e., the second direct current voltage node N2), so as to generate the second direct current voltage VO2 at two terminals of the second voltage-stabilizing capacitor CO2.
In the embodiment, when the first switch unit SW1 (the first transistor TR1) and the second switch unit SW2 (the second transistor TR2) are turned on, the third switch unit SW3 (the third transistor TR3) and the fourth switch unit SW4 (the fourth transistor TR4) are turned off, i.e., the voltage levels of the first control signals CS11˜CS12 are high voltage levels, and the voltage levels of the first control signals CS13˜CS14 are low voltage levels. When the first switch unit SW1 (the first transistor TR1) and the second switch unit SW2 (the second transistor TR2) are turned off, the third switch unit SW3 (the third transistor TR3) and the fourth switch unit SW4 (the fourth switch unit TR4) are turned on, i.e., the voltage levels of the first control signals CS11˜CS12 are low voltage levels, and the voltage levels of the first control signals CS13˜CS14 are high voltage levels.
In addition, when the fifth switch unit SW5 (the fifth transistor TR5) and the sixth switch unit SW6 (the sixth transistor TR6) are turned on, the seventh switch unit SW7 (the seventh transistor TR7) and the eighth switch unit SW8 (the eighth transistor TR8) are turned off, i.e., the voltage levels of the second control signals CS21˜CS22 are high voltage levels, and the voltage levels of the second control signals CS23˜CS24 are low voltage levels. When the fifth switch unit SW5 (the fifth transistor TR5) and the sixth switch unit SW6 (the sixth transistor TR6) are turned off, the seventh switch unit SW7 (the seventh transistor TR7) and the eighth switch unit SW8 (the eighth transistor TR8) are turned on, i.e., the voltage levels of the second control signals CS21˜CS22 are low voltage levels, and the voltage levels of the second control signals CS23˜CS24 are high voltage levels.
The first comparator 410 receives the first alternating current voltage Vab and the predetermined voltage VP. Then, the first comparator 410 may generate a first comparison signal CA1 according to the first alternating current voltage Vab, the predetermined voltage VP, a first carrier wave and a second carrier wave. In the embodiment, the first carrier wave is, for example, greater than the predetermined voltage VP, the second carrier wave is, for example, less than the predetermined voltage VP, and the first carrier wave and the second carrier wave are, for example, triangular waves, but the embodiment is not limited thereto. In addition, the first comparator 410 may compare the first alternating current voltage Vab with the first carrier wave to generate a first signal, and compare the first alternating current voltage Vab with the second carrier wave to generate a second signal. Then, the first comparator 410 processes the first signal and the second signal to generate the first comparison signal CA1. In the embodiment, the first comparator 410 is, for example, a quasi-two level (Q2L) comparator, and the first comparison signal CA1 is, for example, a high-frequency pulse wave modulation signal.
The second comparator 420 may receive the first alternating current voltage Vab and the predetermined voltage VP, and generate a second comparison signal CA2 according to the first alternating current voltage Vab and the predetermined voltage VP. Furthermore, the second comparator 420 may compare the first alternating current voltage Vab with the predetermined voltage VP to generate the second comparison signal CA2. For example, when the first alternating current voltage Vab is greater than the predetermined voltage VP, the second comparator 420 generate the second comparison signal CA2 with the low level. When the first alternating current voltage Vab is less than the predetermined voltage VP, the second comparator 420 generate the second comparison signal CA2 with the high level. In the embodiment, the second comparison signal CA2 is, for example, a low-frequency pulse wave modulation signal.
In some embodiments, the first control signal generator 430 may receive the first comparison signal CA1, the second comparison signal CA2 and the first alternating current voltage Vab, and generate the third control signal CS3 and the fourth control signal CS4 according to the first comparison signal CA1, the second comparison signal CA2 and the first alternating current voltage Vab. For example, the first control signal generator 430 may determine the driving period (such as the driving periods T1 or T2) according to the positive half-cycle voltage and the negative half-cycle voltage of the first alternating current voltage Vab. Then, in the driving period T1, the first control signal generator 430 generates, for example, the third control signal CS3 corresponding to the first comparison signal CA1 and the fourth control signal CS4 corresponding to the second comparison signal CA2. Afterward, in the driving period T2, the first control signal generator 430 generates, for example, the third control signal CS3 corresponding to the second comparison signal CA2 and the fourth control signal CS4 corresponding to the first comparison signal CA1.
In some embodiments, the first control signal generator 430 may receive the first comparison signal CA1, the second comparison signal CA2 and the second alternating current voltage Vgrid, and generate the third control signal CS3 and the fourth control signal CS4 according to the first comparison signal CA1, the second comparison signal CA2 and the second alternating current voltage Vgrid. For example, the first control signal generator 430 may determine the driving period (such as the driving period T1 or T2) according to the positive half-cycle voltage and the negative half-cycle voltage of the second alternating current voltage Vgrid. Then, in the driving period T1, the first control signal generator 430 generates, for example, the third control signal CS3 corresponding to the first comparison signal CA1 and the fourth control signal CS4 corresponding to the second comparison signal CA2. Afterward, in the driving period T2, the first control signal generator 430 generates, for example, the third control signal CS3 corresponding to the second comparison signal CA2 and the fourth control CS4 corresponding to the first comparison signal CA1.
The second control signal generator 440 receives the third control signal CS3, and generates the first control signals CS11˜CS14 with the same operating frequency but different voltage levels according to the third control signal CS3. As shown in
The third control signal generator 450 receives the fourth control signal CS4, and generates the second control signals CS21˜CS24 with the same operating frequency but different voltage levels according to the fourth control signal CS4. As shown in
In the embodiments, in each of the driving periods, the frequency of the third control signal CS3 is different from the frequency of the fourth control signal CS4. In at least two of the above driving periods, the frequencies of the third control signal CS3 are different. For other changes in various combinations of driving period and control signal frequency, please refer to the description of the embodiment of the first control signals CS11˜CS14 and the second control signals CS21˜CS24 in
The inverter module 510 includes a first upper switch module 511, a first lower switch module 512, a second upper switch module 513, a second lower switch module 514, a first diode D1, a second diode D2, a third diode D3 and a fourth diode D4. The first diode D1 is electrically connected to the first upper switch module 511. The second diode D2 is electrically connected to the first diode D1 and the first lower switch module 512. The third diode D3 is electrically connected to the first diode D1 and the second upper switch module 513. The fourth diode D4 is electrically connected to the third diode D3 and the second lower switch module 514. In the embodiment, the first diode D1, the second diode D2, the third diode D3 and the fourth diode D4 in
The inverter module 510 receive a first alternating current voltage Vab, a plurality of first control signals CS11˜CS14 and a plurality of second control signals CS21˜CS24. The first upper switch module 511, the first lower switch module 512, the second upper switch module 513 and the second lower switch module 514 may transform the first alternating current voltage Vab to a first direct current voltage VO1 and a second direct current voltage VO2 according to the first control signals CS11˜CS14 and the second control signals CS21˜CS24.
The inductor module 520 is electrically connected to the first upper switch module 511, the first lower switch module 512, the second upper switch module 513 and the second lower switch module 514. The inductor module 520 receives a second alternating current voltage Vgrid to generate the first alternating current voltage Vab. In the embodiment, the inductor module 520 in
The control module 530 is electrically connected to the first upper switch module 511, the first lower switch module 512, the second upper switch module 513, the second lower switch module 514 and the inductor module 520. The control module 530 receives the first alternating current voltage Vab, the second alternating current voltage Vgrid and predetermined voltage VP, and generates the first control signals CS11˜CS14 to the first upper switch module 511 and the first lower switch module 512 and generates the second control signals CS21˜CS24 to the second upper switch module 513 and the second lower switch module 514 according to the first alternating current voltage Vab and the predetermined voltage VP or the first alternating current voltage Vab, the predetermined voltage VP and the second alternating current voltage Vgrid. In the embodiment, the manner of operating the control module 530 is the same as or similar to the control manner of the control module 120 in
In addition, the first upper switch module 511 may include the first switch unit SW1 and the second switch unit SW2 of
Furthermore, the inverter module 510 further includes a first voltage-stabilizing capacitor CO1 and a second voltage-stabilizing capacitor CO2. In the embodiment, the first voltage-stabilizing capacitor CO1 and the second voltage-stabilizing capacitor CO2 in
In summary, according to the power converter disclosed by the embodiment of the present invention, the control module generates the first control signals to the first arm (or the first upper switch module and the first lower switch module) of the inverter module and generates the second control signals to the second arm (or the second upper switch module and the second lower switch module) of the inverter module according to the first alternating current voltage and the predetermined voltage, wherein in each of the driving periods, the frequency of the first control signals is different from the frequency of the second control signals, and in at least two of the driving periods, the frequencies of the first control signals are different. Therefore, it may effectively decrease the switching power consumption and the temperature of the first arm (or the first upper switch module and the first lower switch module) and the second arm (or the second upper switch module and the second lower switch module) of the inverter module, so as to avoid the accelerated aging of components and limiting module power.
While the present invention has been described by way of example and in terms of the preferred embodiments, it should be understood that the present invention is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation to encompass all such modifications and similar arrangements.
Number | Date | Country | Kind |
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202311787411.5 | Dec 2023 | CN | national |