Power distribution architecture with series-connected bus converter

Information

  • Patent Grant
  • 11705820
  • Patent Number
    11,705,820
  • Date Filed
    Monday, July 26, 2021
    3 years ago
  • Date Issued
    Tuesday, July 18, 2023
    a year ago
Abstract
Apparatus for power conversion are provided. One apparatus includes a power converter including an input circuit and an output circuit. The power converter is configured to receive power from a source for providing power at a DC source voltage VS. The power converter is adapted to convert power from the input circuit to the output circuit at a substantially fixed voltage transformation ratio KDC=VOUT/VIN at an output current, wherein VIN is an input voltage and VOUT is an output voltage. The input circuit and at least a portion of the output circuit are connected in series across the source, such that an absolute value of the input voltage VIN applied to the input circuit is approximately equal to the absolute value of the DC source voltage VS minus a number N times the absolute value of the output voltage VOUT, where N is at least 1.
Description
BACKGROUND

Referring to FIG. 1, a prior art power distribution system 1 such as an Intermediate Bus Architecture (“IBA”) is shown having a DC power source 5, supplying power at a source voltage, VS, to the input of a bus converter 10. The output of the bus converter 10 supplies power to one or more down-stream regulators, e.g. regulators 6, 7 which in turn provide regulated power, e.g. regulated voltage, to respective loads 8, 9. The bus converter 10 may include a DC Transformer which is a switching power converter that may provide voltage transformation from its input to output at an essentially fixed voltage gain and also provide galvanic isolation between its input and output. The bus converter 10 may adjust its output slightly during predetermined operating conditions to provide in-rush current limiting, e.g. during start up and may provide partial regulation over selected portions of the source voltage range. Although a single bus converter is shown in FIG. 1, a plurality of bus converters may be connected to receive power from a single source 5 and provide power at one or more voltages to a plurality of down-stream regulators, such as regulators 6 and 7. Additionally, two or more bus converters or two or more DC Transformers may be connected in parallel to increase power throughput or to provide a measure of fault tolerance.


SUMMARY

One embodiment of the disclosure relates to an apparatus that includes a power distribution system comprising a source for providing power at a DC source voltage VS. The apparatus further includes a bus converter that includes an input circuit and an output circuit. The bus converter is adapted to convert power from the input circuit to the output circuit at a substantially fixed voltage transformation ratio KDC at an output current. An input voltage VIN is applied to the input circuit and an output voltage VOUT is produced by the output of the bus converter, and the substantially fixed voltage transformation ratio can be represented as KDC=VOUT/VIN. The apparatus further includes a power distribution bus connected to distribute power from the output circuit of the bus converter at the output voltage VOUT. The apparatus further includes a plurality of regulators. Each regulator includes a regulator input connected to the power distribution bus to receive power from the output circuit of the bus converter and a regulator output connected to supply power to a respective load. The plurality of regulators each are separated by a distance from the bus converter. The input circuit of the bus converter and at least a portion of the output circuit of the bus converter are connected in series across the source such that an absolute value of the input voltage VIN applied to the input circuit is approximately equal to the absolute value of the DC source voltage VS minus a number N times the absolute value of the output voltage VOUT, where N is at least 1.


Another embodiment relates to an apparatus that includes a power converter including an input circuit and an output circuit. The power converter is configured to receive power from a power distribution system comprising a source for providing power at a DC source voltage VS. The power converter is adapted to convert power from the input circuit to the output circuit at a substantially fixed voltage transformation ratio KDC at an output current. An input voltage VIN is applied to the input circuit and an output voltage VOUT is produced by the output of the power converter. The substantially fixed voltage transformation ratio can be represented as KDC=VOUT/VIN. The power converter further includes a series connection between the input circuit of the power converter and at least a portion of the output circuit of the power converter across the source, such that an absolute value of the input voltage VIN applied to the input circuit is approximately equal to the absolute value of the DC source voltage VS minus a number N times the absolute value of the output voltage VOUT, where N is at least 1.


Yet another embodiment relates to an apparatus that includes a bus converter including an input circuit and an output circuit. The bus converter is configured to receive power from a power distribution system including a source for providing power at a DC source voltage VS. The bus converter is adapted to convert power from the input circuit to the output circuit at a substantially fixed voltage transformation ratio KDC at an output current. An input voltage VIN is applied to the input circuit and an output voltage VOUT is produced by the output of the bus converter, and the substantially fixed voltage transformation ratio can be represented as KDC=VOUT/VIN. The apparatus further includes a power distribution bus connected to distribute power from the output circuit of the bus converter at the output voltage VOUT. The apparatus further includes a plurality of regulators. Each regulator includes a regulator input connected to the power distribution bus to receive power from the output circuit of the bus converter and a regulator output connected to supply power to a respective load. The plurality of regulators each are separated by a distance from the bus converter. The input circuit of the bus converter and at least a portion of the output circuit of the bus converter are connected in series across the source such that an absolute value of the input voltage VIN applied to the input circuit is approximately equal to the absolute value of the DC source voltage VS minus a number N times the absolute value of the output voltage VOUT, where N is at least 1.


Another embodiment relates to an apparatus comprising an intermediate bus architecture power distribution system for a telecommunications system comprising a source for providing power at a DC source voltage; a circuit board comprising a bus converter, the bus converter comprising an input circuit, the input circuit comprising a primary transformer winding, the bus converter further comprising an output circuit, the output circuit comprising a secondary transformer winding, wherein the primary and secondary transformer windings are galvanically connected in series, and wherein the bus converter is configured to provide power to a power distribution bus that is not galvanically isolated from the source; and the circuit board further comprising a plurality of regulators, wherein each regulator comprises a regulator input connected to the power distribution bus to receive power from the output circuit of the bus converter and a regulator output connected to supply power to a respective load, the plurality of regulators each being separated by a distance from the bus converter.





BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 shows a schematic block diagram of a prior art IBA power distribution system according to an illustrative embodiment.



FIG. 2 shows a functional block diagram of a series-connected DC Transformer according to an illustrative embodiment.



FIG. 3 shows a schematic diagram of a new power distribution architecture according to an illustrative embodiment.



FIG. 4 shows a schematic diagram of an isolated SAC-based DC Transformer according to an illustrative embodiment.



FIG. 5 shows a schematic diagram of a series-connected SAC-based DC Transformer according to an illustrative embodiment.



FIG. 6 shows a schematic diagram of a series-connected SAC-based DC Transformer having a center-tapped winding in the output circuit according to an illustrative embodiment.



FIG. 7 shows a schematic diagram of a series-connected DC Transformer for receiving power from a negative input source and delivering power at a positive output voltage according to an illustrative embodiment.





DETAILED DESCRIPTION

Power Distribution Architecture


A power distribution system 50 is shown in FIG. 3 having a primary power source 51 delivering power via a connection 52 to a front-end power-processing unit 53. The primary power source 51 may be an AC utility line, and the front end unit 53 may be a power conversion stage that converts power from the power source 51 delivering power at a relatively high but safe DC voltage to a power distribution bus 55, e.g. the DC voltage may vary from a minimum, e.g. 38 Volts, to a maximum, e.g. 55 Volts. Preferably, the front-end unit 53 provides voltage step down and isolation and may optionally provide power factor correction, regulation, or both. An optional backup power system 54 is shown connected to the power distribution bus 55 to provide power in the event of a loss of power from the primary power source 52. The backup power system may include batteries, a charger for maintaining the batteries, and a switchover mechanism that connects the batteries to the bus in response to predetermined events, such as a decline in voltage or loss of power from the output of the front end 53 or the primary power source 51.


One or more bus converters, e.g. bus converters 56, 57, may be connected to the power distribution bus 55 downstream from the front end 53 as shown in the example of FIG. 3 to convert power received from the relatively high voltage power distribution bus 55 for delivery to a respective lower voltage bus. As shown, bus converters 56 and 57 respectively supply power to buses 58 and 59 at voltages, e.g. at or near the requisite load voltages, that are lower than the voltage of the power distribution bus 55, providing step-down voltage transformation. The bus converters 56, 57 are generally separated by a distance from their respective regulators 60, 61. For example, in a typical system, one or more system circuit boards housed in a common enclosure may each include one or more bus converters, preferably located near the edge of, or other location on, the board where power connections are made to the board. A down-stream regulator receiving power from the bus converter(s) may be preferably located adjacent to the circuitry, e.g. a processor, ASIC, or other circuitry, to which it or they supply power. The physical distance separating the bus converter and a respective down-stream regulator in such an example may range from as much as a dimension of the system circuit board, i.e. a diagonal dimension where the bus converter and regulator located at opposite corners, a length or width dimension where they are located at opposite edges, a half-length or width where one is situated closer to the middle and the other is at an edge, etc. In another example, a bus converter may be located off of the system board in which case the electrical distance could be greater than a dimension of the system board. Naturally, the distance separating the bus converter and a respective down-stream regulator will depend on the system layout. However, a bus converter housed in a self-contained assembly adapted to be installed as a unit at a location remote from the down-stream regulator(s) may be separated by a distance from a down-stream regulator regardless of their respective mounting locations at the system level.


The output of each bus converter 56, 57 may, in turn, provide power via its respective bus 58, 59 to a respective plurality of regulators, preferably at or near the point of load, such as point-of-load switching voltage regulators 60, 61. It should be understood that although two bus converters 56, 57 are shown in the example of FIG. 3, any number of bus converters, e.g. one, may be used. Similarly, although regulators 60 and 61 are shown in FIG. 3 as comprising a plurality of individual regulators, any suitable number of regulators, e.g. one, may be connected to a particular bus converter within the constraints of the physical devices used. The regulators 60, 61 may supply power to respective loads (not shown). The loads can be a variety of devices, including integrated circuits and electromechanical devices (such as storage and cooling devices).


The bus converters 56, 57 shown in the system of FIG. 3, however, preferably do not provide galvanic isolation between their respective output busses 58, 59 and the power distribution bus 55 as described in additional detail below.


Series-Connected DC Transformer


Referring to FIG. 2, a functional block diagram of a series-connected power conversion system 20 suitable for use as a bus converter in the power distribution system 50 of FIG. 3 is shown. The power conversion system 20 includes an input 21 for receiving power from a source at a source voltage, VS, and an output 22 for delivering power to a load at an output voltage, VO, that is less than VS, and a DC Transformer 25. The DC Transformer 25 may be implemented preferably using the Sine-Amplitude Converter (“SAC”) topologies and timing architectures described in Vinciarelli, Factorized Power Architecture and Point of Load Sine Amplitude Converters, U.S. Pat. No. 6,930,893 and in Vinciarelli, Point of Load Sine Amplitude Converters and Methods, U.S. Pat. No. 7,145,786 both assigned to VLT., Inc. and incorporated here in their entirety by reference (hereinafter the “SAC Patents”). Alternatively, other converter topologies, such as hard-switching, fixed ratio DC-DC converters, may be used. The DC Transformer 25 converts power received from its input 23 (distinguished from the input 21 of the bus converter 20) at an input voltage, VIN, for delivery to its output 24 at an output voltage, VOUT, using an essentially fixed voltage gain or voltage transformation ratio.


The voltage gain or voltage transformation ratio of a system as defined generally herein is the ratio of its output voltage to its input voltage at a specified current such as an output current. For the system 20 in FIG. 2, the voltage transformation ratio may be expressed as KSYS=VO/VS @ IL. Similarly, the voltage transformation ratio of the DC Transformer 25 may be stated as KDC=VOUT/VIN @ IO. Note that the system output voltage, VO, and the DC Transformer output voltage, VOUT, are the same in the configuration shown. However, the input 23 and output 24 of the DC Transformer 25 are shown in a series-connected configuration across the system input 21. As a result, the input voltage, VIN, to the DC Transformer input 23 is less than the input voltage, VS, to the system input 21 by an amount equal to the output voltage:

VIN=VS−VO.  (1)


Similarly as shown in FIG. 2, the current, IL, drawn by the load from the system output 22 is greater than the current produced at the output 24 of the DC Transformer 25 by an amount equal to the input current:

IO=IL−IIN.  (2)


The system voltage transformation ratio, KSYS, using the series-connected DC Transformer 25, may be expressed as a function of the DC Transformer voltage transformation ratio, KDC:

KSYS=KDC/(KDC+1)  (3)


The above equation (3) may be rearranged to express the DC Transformer 25 voltage transformation ratio, KDC, required in a series-connected system as a function of the system voltage transformation ratio, KSYS:

KDC=KSYS/(1−KSYS)  (4)


Referring to FIG. 4, an isolated SAC that may be utilized for DC Transformer 25, according to one embodiment, is shown having a full-bridge input circuit, including switches S1, S2, S3, and S4, connected to drive the resonant circuit including capacitor C and the input winding, having N1 turns, with the input voltage VIN. The isolated SAC is shown having a full-bridge output circuit, including switches S5, S6, S7, and S8, connected to rectify the voltage impressed across the output winding, having N2 turns, and delivering the output voltage, Vo. The voltage transformation ratio of the SAC will be essentially a function of the turns ratio: KDC==VO/VIN=N2/N1.


A series-connected SAC 200 is shown in FIG. 5. By way of comparison, the series-connected SAC 200 uses the same full-bridge input circuit topology, including switches S1, S2, S3, and S4, driving the resonant circuit including capacitor C and the input winding, having N1 turns, with the input voltage VIN. SAC 200 also uses the same full-bridge output topology, including switches S5, S6, S7, and S8, connected to rectify the voltage impressed across the output winding, having N2 turns, and delivering the output voltage, VO. The voltage transformation ratio of the series-connected SAC 200 from the input circuit to output circuit is also essentially a function of the transformer turns ratio N2/N1 and the same as the isolated SAC 25 in FIG. 4: KDC=VO/VIN=N2/N1. However, when evaluated in terms of the system, i.e. using VS applied across the series-connected input and output, the voltage transformation ratio becomes: KSYS=VO/VS=N2/(N2+N1).


Many contemporary applications use a voltage transformation ratio equal to ⅕ requiring an odd transformer turns ratio (N2/N1=⅕) which is generally not optimal. Referring to equation (4) above, the KSYS=⅕ bus converter may be implemented using a KDC=¼ series-connected topology (e.g. as shown in FIGS. 2, 4, and 5), allowing the use of an even, i.e. 1:4, turns ratio in the transformer. An even transformer turns ratio may provide greater transformer layout flexibility and efficiency.


Note that the series-connected converter 200 may be implemented by connecting an off-the-shelf isolated DC Transformer, such as the isolated converter shown in FIG. 4, as shown in FIG. 2. Alternatively, the converter 200 may be implemented as series-connected input and output circuits, e.g. as shown in FIGS. 5, 6, and 7 discussed below, in an integrated converter, optionally providing greater power density eliminating the isolation imposed design constraints, eliminating control circuit bias currents from flowing through to the output and the potential need for an output clamp, and providing system-ground referenced control circuitry (not shown) for interface signals that are referenced to ground rather than the output for the reconfigured off-the-shelf isolated converter.


Connecting the input and output of the DC Transformer 25 in series eliminates galvanic isolation between the input and output of the series-connected bus converter 20, which is counterintuitive. However, when used in the architecture of FIG. 3, isolation is deployed at an intermediate stage where the isolation may be superfluous. The architecture of FIG. 3, therefore, trades isolation at this stage for efficiency gain and reduced component stress. If isolation is required, e.g. for safety reasons, in the architecture of FIG. 3, it may preferably be provided by an upstream power conversion stage such as the front-end converter 53.


Efficiency


The power processed by the isolated SAC shown in FIG. 4 may be compared with that of the series-connected SAC 200 (FIG. 5) by summing the product of maximum voltage across (Vn) and average current (In) through each switch (n=1 through 8).












P
Processed

=




n
=
1


n
=

8

n





(

Vn
*
In

)







(
5
)







Each input switch (S1, S2, S3 and S4) in the full bridge input circuits (FIGS. 4, 5) is subjected to the input voltage, VIN, (distinguished from the source voltage VS) and an average of one half of the input current, IIN. The sinusoidal nature of the current in the SAC topology represents a difference between the RMS and average currents, which is unimportant for the following comparison between two converters using the same topology. The power processed by the input circuits is:

PIN=2*VIN*IIN  (6)


Similarly, each output switch (S5, S6, S7 and S8) in the full bridge output circuit of FIG. 4 will be subjected to the full output voltage, VO, and will carry an average of one half of the output current, IO. Note that the output current in the case of the isolated converter is equal to the load current, IL and in the case of the series-connected converter (discussed below) is not. The power processed by the output circuits may therefore be reduced to:

POUT=2*VO*IO  (7)


Combining equations (6) and (7) and making the appropriate substitutions using KDC=VO/VIN and the corollary IIN=KDC*IO, the total power processed by the converters reduces to:

P=4*VO*IO  (8)


In the isolated converter of FIG. 4, the output current equals the load current (IO=IL), therefore, the power processed by the isolated converter, PISO, may be reduced to the following function of load power, PLoad=VO*IL:

PISO=4*PLoad  (9)


Neglecting fixed losses in the converter, the input current may be expressed as a function of the output current and voltage transformation ratio as follows:

IIN=IO*KDC  (10)


Combining equations (2), (4), and (10), the output current of the series-connected converter may be expressed as a function of load current and voltage transformation ratio as follows:

IO-Series=IL*(1−KSYS)  (11)


Substituting equation (11) into equation (8) produces the total power processed by the series-connected converter as a function of load power (PLoad=VO*IL) and system voltage transformation ratio:

PSERIES=4*PLoad*(1−KSYS)  (12)


Accordingly, the efficiency advantage of the series-connected converter over the isolated converter—the ratio of equations (12) and (9)—reduces to:

PSERIES/PISO=(1−KSYS)  (13)


From equation (13) it can be seen that the series-connected converter offers a significant efficiency advantage. Consider a typical example for comparison, using a bus converter to convert power from a nominal 50 Volt power distribution bus for delivery to a 10 volt load (KSYS=⅕) at 100 amps: the series-connected converter processes only 80% of the power, offering a 20% efficiency savings compared to the isolated converter.


In a typical isolated DC Transformer, like most DC-DC converters, the control circuitry is configured to operate from power drawn from the input producing a quiescent component of the input current. Use of such a converter, e.g. an off-the-shelf DC Transformer, in a series-connected configuration could, therefore, allow the quiescent input current to flow unregulated into a load connected to the output, which would be problematic while the power train is not operating and, therefore, incapable of regulating the output voltage. It may, for that reason, be desirable to clamp the output voltage using a zener diode, such as zener diode 26 in FIG. 2, or other clamp circuit or device appropriately scaled in breakdown voltage and power dissipation to carry the quiescent input current, protecting the load and perhaps the output circuitry of the converter. Integrating the series-connected input and output circuitry into a non-isolated converter topology such as shown in FIGS. 5, 6, and 7 affords the opportunity to configure the control circuitry to draw power from the input to ground preventing that component of the input current from flowing out to the load. Additionally, a DC blocking capacitor may be used in the power train to avoid leakage current from flowing from the input to the output. One or both of the above measures may be used to avoid the need to clamp the output.


Configuring the control circuitry to reference the system ground in the integrated converter (rather than the input return in the off-the-shelf isolated converter) easily allows any interface signals to be ground-referenced (rather than output referenced) which is advantageous from the perspective of the system integrator.


Center-Tap Secondary


Another series-connected SAC 210 is shown in FIG. 6. By way of comparison, the series-connected SAC 210 uses the same full-bridge input circuit topology, including switches S1, S2, S3, and S4, driving the resonant circuit including capacitor C and the input winding, having N1 turns, with the input voltage VIN, as shown in FIG. 5. However, a center-tap output winding, having 2*N2 turns, is used in the output circuit, which includes switches S5, S6, S7, and S8, connected to rectify the voltage impressed across the output windings and delivering the output voltage, VO. The system voltage transformation ratio of the series-connected SAC 210 (FIG. 6) is essentially a function of the transformer turns ratio: KSYS=VO/VSYS=N2/(N1+2*N2); as is the voltage transformation ratio from input circuit to output circuit: KDC=VO/VIN=N2/N1.


The converter 210 of FIG. 6 differs from the series-connected converter 200 (FIG. 5) in that the input voltage, VIN, presented to the input circuit is equal to the source voltage, VS, reduced by twice the output voltage, VO:

VIN-210=VS−2VO  (14)


as suggested by the addition of N2 turns in the output winding of the transformer. Also, each output switch (S5, S6, S7 and S8) in the converter 210 is subjected to twice the output voltage, VO, with the upper output switches (S5 and S7) each carrying an average of half of the input current, IIN, and the lower output switches (S6 and S8) each carrying an average of half of the difference between the load current, IL, and the input current, IIN. Using the same analysis as described above, summing the product of maximum voltage across (Vn) and average current (In) through each switch (N=1 through 8), the total power processed by the converter 210 of FIG. 6 is:

P210=2*VIN*IIN2*VO*IIN+2*VO*(IL−IIN)  (15)


Using the system voltage transformation ratio, KSYS=VO/VS in equation (14), the input voltage may be expressed as:

VIN-210=VO*((1/KSYS)−2)  (16)


Recognizing that in an ideal converter the input power equals the output power VS*IIN=VO*IL the input current may be expressed as:

IIN=KSYS*IL  (17)


Making the appropriate substitutions into equation (15), the total power processed by series-connected converter 210 (FIG. 6) reduces to:

P210=4*VO*IL*(1−KSYS)  (18)


which may be further reduced to express the total power processed by the series-connected converter 210 using a center-tap output winding as shown in FIG. 6 as a function of load power (PLoad=VO*IL) and system voltage transformation ratio:

P210=4*PLoad*(1−KSYS)  (19)


Which is the same result obtained in equation (12) above for the series-connected converter 200 in FIG. 5.


There may be certain advantages of one series-connected topology over the other depending upon the application. For example, the transformer in the converter 200 (FIG. 5) has N2 fewer turns than in the transformer of the converter 210 (FIG. 6) offering reduced winding losses. However, the input switches (S1, S2, S3 and S4) in the converter 210 (FIG. 6) are exposed to lower voltages than in the converter 200 (FIG. 5) which may afford lower switch conduction losses. Also, two of the output switches (S5 and S7) in converter 210 (FIG. 6) carry much less current and may be implemented with smaller and more cost effective devices than in converter 200 (FIG. 5).


Negative Input-Positive Output


Referring to FIG. 7, another series-connected SAC-based converter 215 is shown configured to receive a negative source voltage, VS, and deliver a positive output voltage. (The topology shown in FIG. 7 may alternatively be adapted to receive a positive source voltage and deliver a negative output voltage.) Converter 215 may be viewed as a variation of the converter 210 (FIG. 6) in which the input and output circuit positions have been rearranged with the output terminal serving as the common terminal. The converter 215 of FIG. 7 differs from the converter 210 (FIG. 6) in that the absolute value of the input voltage, VIN, presented to the input circuit is equal to the absolute value of the source voltage, VS, reduced by the absolute value of the output voltage, VO (compared to twice the output voltage in FIG. 6) because of the polarity change from input to output:

|VIN-215|=|VS|−|VO|  (20)

as also suggested by the transformer configuration. Also, the upper output switches (S5 and S7) each carry an average of half of the output current, IO, which equals the load current, IL in FIG. 7, compared to the difference between the load current, IL, and the input current, IIN, in FIG. 6. Once again, summing the product of maximum voltage across (Vn) and average current (In) through each switch (N=1 through 8) as described above, the total power processed by the converter 215 of FIG. 7 is:

P215=2*VIN*IIN+2*VO*IIN+2*VO*IL  (21)


which, when reduced using equations (17) and (20), becomes:

P215=4*PLoad  (22)


A comparison of the power processed by the converter 215 (equation (22); FIG. 7) with the power processed by the isolated converter 25 (equation (9); FIG. 4) may indicate no efficiency advantage, however, the input switches (S1, S2, S3 and S4) in the series-connected converter 215 of FIG. 7 are subjected to lower voltages potentially affording use of better figure of merit switches leading to potential efficiency improvements. Furthermore, the absence of isolation-related design constraints in such an integrated converter may be used to increase power density.


The converters 20 (FIG. 2), 200 (FIG. 5), 210 (FIG. 6), and 215 (FIG. 7) are examples of a class of series-connected converters in which at least a portion of the output circuit is connected in series with the input circuit such that the absolute value of the voltage, VIN, presented to the input circuit is equal to the absolute value of the source voltage VS, minus N times the absolute value of the output voltage, VO, where the value of N is at least 1:

|VIN|=|VS|−N*|VO|  (23)


The value of N will vary depending upon the converter topology used, e.g. a center-tap secondary or not, polarity reversing or not, etc. In the examples described above: N=1 for converters 20 (FIG. 2), 200 (FIG. 5), and 215 (FIG. 7) and N=2 for converter 210 (FIG. 6) as shown in equation 14. Although a full bridge switch configuration is preferred for its superior noise performance, half-bridge switch configurations may also be deployed in the input circuitry, the output circuitry, or both.


The disclosure is described above with reference to drawings. These drawings illustrate certain details of specific embodiments that implement the systems, apparatus, and/or methods of the present disclosure. However, describing the disclosure with drawings should not be construed as imposing on the disclosure any limitations that may be present in the drawings. No claim element herein is to be construed under the provisions of 35 U.S.C. § 112, sixth paragraph, unless the element is expressly recited using the phrase “means for.” Furthermore, no element, component or method step in the present disclosure is intended to be dedicated to the public, regardless of whether the element, component or method step is explicitly recited in the claims.


It should be noted that although the disclosure provided herein may describe a specific order of method steps, it is understood that the order of these steps may differ from what is described. Also, two or more steps may be performed concurrently or with partial concurrence. It is understood that all such variations are within the scope of the disclosure.


The foregoing description of embodiments of the disclosure have been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure to the precise form disclosed, and modifications and variations are possible in light of the above teachings or may be acquired from practice of the disclosure. The embodiments were chosen and described in order to explain the principals of the disclosure and its practical application to enable one skilled in the art to utilize the disclosure in various embodiments and with various modifications as are suited to the particular use contemplated.

Claims
  • 1. An apparatus comprising: a switching power converter including an input circuit and an output circuit, the switching power converter being constructed and arranged to convert power from the input circuit to the output circuit at a substantially fixed ratio, KDC, at an output current, wherein an input voltage VIN is applied to the input circuit and an output voltage VOUT is produced by the output circuit of the switching power converter, and wherein the substantially fixed ratio can be represented as KDC=VOUT/VIN;the input circuit and the output circuit being coupled by a transformer, the transformer including at least a first winding and a second winding;the input circuit including a first primary power switch and the first winding;the output circuit including at least one secondary power switch and the second winding;the input circuit and at least a portion of the output circuit of the switching power converter being connected in series across a source such that an absolute value of the input voltage VIN applied to the input circuit is approximately equal to the absolute value of a DC source voltage VS minus a number N times the absolute value of the output voltage VOUT, where N is at least 1;a series resonant circuit including the first winding and at least one resonant capacitor connected in series with the first winding, the series resonant circuit having a characteristic resonant frequency and a characteristic resonant period, the first primary power switch being connected to drive the series resonant circuit; anda switch controller adapted to operate the first primary power switch in a series of converter operating cycles, each converter operating cycle characterized by two power transfer intervals of essentially equal duration each interval having a duration less than the characteristic resonant period, during which one or more primary power switches are ON and power is transferred from the input circuit to the output circuit via the transformer.
  • 2. The apparatus of claim 1, wherein the switching power converter is a self-contained assembly adapted to be installed as a unit.
  • 3. The apparatus of claim 1, wherein both the input circuit and the output circuit comprise full-bridge circuits.
  • 4. The apparatus of claim 1, wherein the output circuit includes a plurality of power switches, wherein the plurality of power switches in the output circuit are controlled to turn ON and OFF at times of essentially zero current.
  • 5. The apparatus of claim 1, wherein the output circuit includes a plurality of power switches, wherein the plurality of power switches in the output circuit are controlled to turn ON and OFF at times of essentially zero voltage.
  • 6. The apparatus of claim 1, wherein the input circuit includes a plurality of power switches, wherein the plurality of power switches in the input circuit are controlled to turn ON and OFF at times of essentially zero voltage.
  • 7. The apparatus of claim 1, wherein the power transfer interval is essentially equal to half of the characteristic resonant period.
  • 8. The apparatus of claim 1, wherein the output current is a sinusoidal half wave.
  • 9. The apparatus of claim 1, wherein the first primary power switch is switched with a first duty cycle and the secondary power switch is switched with a second duty cycle, wherein the first duty cycle and the second duty cycle are fixed and essentially equal.
  • 10. The apparatus of claim 1, wherein the switch controller operates the first primary power switch in the series of converter operating cycles at an operating frequency, wherein the operating frequency is a function of the characteristic resonant frequency.
  • 11. The apparatus of claim 1, wherein the output circuit comprises two secondary windings, each secondary winding comprising a same number of secondary turns.
  • 12. The apparatus of claim 11, wherein: the first winding is characterized by a first number of turns;the second winding is characterized by a second number of turns; andthe substantially fixed ratio, KDC, is a function of a ratio of the first number of turns to the second number of turns.
  • 13. The apparatus of claim 12, wherein the first and second windings are connected to form a center-tap winding with two terminal ends and a center tap.
  • 14. The apparatus of claim 13, wherein the second winding is the center-tap winding with the two terminal ends and the center tap.
  • 15. The apparatus of claim 14, wherein N is equal to approximately 2, such that the input voltage VIN is approximately equal to the DC source voltage VS minus 2 times the output voltage VOUT.
  • 16. The apparatus of claim 15, wherein each of the two terminal ends of the second winding are selectively connected to a common terminal through a respective secondary power switch and the center tap is connected to supply the output voltage VOUT with respect to the common terminal.
  • 17. The apparatus of claim 16, wherein the input circuit includes a second primary power switch, and the first and second primary power switches are connected together to drive a first end of the series resonant circuit.
  • 18. The apparatus of claim 17, wherein the input circuit further comprises at least two additional primary power switches connected together to drive a second end of the series resonant circuit.
  • 19. An method comprising: providing a switching power converter including an input circuit and an output circuit, the switching power converter being constructed and arranged to convert power from the input circuit to the output circuit at a substantially fixed ratio, KDC, at an output current, wherein an input voltage VIN is applied to the input circuit and an output voltage VOUT is produced by the output circuit of the switching power converter, and wherein the substantially fixed ratio can be represented as KDC=VOUT/VIN;the input circuit and the output circuit being coupled by a transformer, the transformer including at least a first winding and a second winding;the input circuit including a first primary power switch and the first winding;the output circuit including at least one secondary power switch and the second winding;the input circuit and at least a portion of the output circuit of the switching power converter being connected in series across a source such that an absolute value of the input voltage VIN applied to the input circuit is approximately equal to the absolute value of a DC source voltage VS minus a number N times the absolute value of the output voltage VOUT, where N is at least 1;providing a series resonant circuit including the first winding and at least one resonant capacitor connected in series with the first winding, the series resonant circuit having a characteristic resonant frequency and a characteristic resonant period, the first primary power switch being connected to drive the series resonant circuit; andproviding a switch controller adapted to operate the first primary power switch in a series of converter operating cycles, each converter operating cycle characterized by two power transfer intervals of essentially equal duration each interval having a duration less than the characteristic resonant period, during which one or more primary power switches are ON and power is transferred from the input circuit to the output circuit via the transformer.
  • 20. The method of claim 19, wherein the switching power converter is a self-contained assembly adapted to be installed as a unit.
  • 21. The method of claim 19, wherein both the input circuit and the output circuit comprise full-bridge circuits.
  • 22. The method of claim 19, wherein N is equal to approximately 2, such that the input voltage VIN is approximately equal to the DC source voltage VS minus 2 times the output voltage VOUT.
  • 23. The method of claim 19, wherein the input circuit includes a second primary power switch, and the first and second primary power switches are connected together to drive a first end of the series resonant circuit.
  • 24. The apparatus of claim 19, wherein the input circuit further comprises at least two additional primary power switches connected together to drive a second end of the series resonant circuit.
  • 25. An apparatus comprising: a switching power converter including an input circuit and an output circuit, the switching power converter being constructed and arranged to convert power from the input circuit to the output circuit at a substantially fixed ratio, KDC, at an output current, wherein an input voltage VIN is applied to the input circuit and an output voltage VOUT is produced by the output circuit of the switching power converter;the input circuit and the output circuit being coupled by a transformer, the transformer including at least a first winding and a second winding;the input circuit including a first primary power switch and the first winding;the output circuit including at least one secondary power switch and the second winding;the input circuit and at least a portion of the output circuit of the switching power converter being connected in series across a source;a series resonant circuit including the first winding and at least one resonant capacitor connected in series with the first winding, the series resonant circuit having a characteristic resonant frequency and a characteristic resonant period, the first primary power switch being connected to drive the series resonant circuit; anda switch controller adapted to operate the first primary power switch in a series of converter operating cycles, each converter operating cycle characterized by two power transfer intervals of essentially equal duration each interval having a duration less than the characteristic resonant period, during which one or more primary power switches are ON and power is transferred from the input circuit to the output circuit via the transformer.
  • 26. The apparatus of claim 25, wherein the input circuit includes a second primary power switch, and the first and second primary power switches are connected together to drive a first end of the series resonant circuit.
  • 27. The apparatus of claim 26, wherein the input circuit further comprises at least two additional primary power switches connected together to drive a second end of the series resonant circuit.
  • 28. The apparatus of claim 25, wherein: the first winding is characterized by a first number of turns;the second winding is characterized by a second number of turns; andthe first number of turns is equal to the second number of turns.
  • 29. The apparatus of claim 28, wherein the first and second windings are connected to form a center-tap winding with two terminal ends and a center tap.
  • 30. The apparatus of claim 29, wherein the terminal ends of the first and second windings are selectively connected to a common terminal through respective secondary power switches.
  • 31. The apparatus of claim 30, wherein the center tap is connected to supply the output voltage VOUT with respect to the common terminal.
  • 32. The apparatus of claim 29, wherein the bus converter is a self-contained assembly adapted to be installed as a unit.
  • 33. The apparatus of claim 32, wherein the output circuit includes a plurality of power switches, wherein the plurality of power switches in the output circuit are controlled to turn ON and OFF at times of essentially zero voltage.
CROSS-REFERENCE TO RELATED PATENT APPLICATIONS

This application is a Continuation of U.S. application Ser. No. 16/781,070, filed Feb. 4, 2020, which is a Continuation of U.S. application Ser. No. 16/022,636, filed Jun. 28, 2018, which is a Continuation of U.S. application Ser. No. 13/933,252, filed Jul. 2, 2013, each of which are incorporated herein by reference in their entirety.

US Referenced Citations (681)
Number Name Date Kind
443441 Hanson Dec 1890 A
1181803 Sargent May 1916 A
2042274 Pollock May 1936 A
2497534 Campbell Feb 1950 A
2852730 Henry Sep 1958 A
2902862 Twiford Sep 1959 A
2953738 Bright Sep 1960 A
3008068 Jacobus et al. Nov 1961 A
3008506 Hicks Nov 1961 A
3029398 McComb Apr 1962 A
3083328 Paul et al. Mar 1963 A
3141140 Rich Jul 1964 A
3146406 Jacobus Aug 1964 A
3161837 Lloyd Dec 1964 A
3174042 Effner Mar 1965 A
3229111 Rudolf et al. Jan 1966 A
3241035 Rhyne Mar 1966 A
3295042 Evalds et al. Dec 1966 A
3307073 McLaughlin Feb 1967 A
3313996 Lingle Apr 1967 A
3343073 Orland Sep 1967 A
3400325 Webb Sep 1968 A
3435375 Miller Mar 1969 A
3443194 Cielo May 1969 A
3448370 Harrigan Jun 1969 A
3454853 Hawkins et al. Jul 1969 A
3458798 Frang et al. Jul 1969 A
3459957 Kelley Aug 1969 A
3471747 Gershen Oct 1969 A
3495157 Nercessian Feb 1970 A
3506908 Resch Apr 1970 A
3514692 Lingle May 1970 A
3517301 Huber Jun 1970 A
3553428 McGhee Jan 1971 A
3564393 Williamson Feb 1971 A
3569818 Dahlinger et al. Mar 1971 A
3573483 White Apr 1971 A
3573494 Houpt et al. Apr 1971 A
3573508 Harris Apr 1971 A
3573544 Zonis et al. Apr 1971 A
3573597 Genuit et al. Apr 1971 A
3579026 Paget May 1971 A
3581186 Weinberger May 1971 A
3582754 Hoffmann et al. Jun 1971 A
3582758 Gunn Jun 1971 A
3584289 Bishop et al. Jun 1971 A
3588595 Silvers Jun 1971 A
3599073 Wilson et al. Aug 1971 A
3604920 Niles Sep 1971 A
3619713 Biega et al. Nov 1971 A
3629648 Brown et al. Dec 1971 A
3629725 Chun Dec 1971 A
3638099 Centala Jan 1972 A
3643152 Matsumura et al. Feb 1972 A
3646395 De Pratti Feb 1972 A
3657631 Martens et al. Apr 1972 A
3660672 Berger et al. May 1972 A
3663941 Pasciutti May 1972 A
3665203 Barnett May 1972 A
3668508 Archer et al. Jun 1972 A
3684891 Sieron Aug 1972 A
3696286 Ule Oct 1972 A
3704381 Nercessian Nov 1972 A
3710231 Baker Jan 1973 A
3714545 Chiffert Jan 1973 A
3733538 Kernick et al. May 1973 A
3735235 Hamilton et al. May 1973 A
3737755 Calkin et al. Jun 1973 A
3742242 Morio et al. Jun 1973 A
3743861 Bolmgren Jul 1973 A
3751676 Igarashi et al. Aug 1973 A
3753071 Engel et al. Aug 1973 A
3753076 Zelina Aug 1973 A
3754177 O'Reilly Aug 1973 A
3757195 Sklaroof Sep 1973 A
3769545 Crane Oct 1973 A
3771040 Fletcher et al. Nov 1973 A
3781505 Steigerwald Dec 1973 A
3781638 Anderson et al. Dec 1973 A
3787730 Ray et al. Jan 1974 A
3805094 Orlando Apr 1974 A
3816810 Friedman et al. Jun 1974 A
3818237 Straus Jun 1974 A
3818312 Luursema et al. Jun 1974 A
3820008 Guarnaschelli Jun 1974 A
3824450 Johnson et al. Jul 1974 A
3845404 Trilling Oct 1974 A
3848175 Demarest Nov 1974 A
3851240 Walker et al. Nov 1974 A
3851278 Isono Nov 1974 A
3859638 Hume Jan 1975 A
3873846 Morio et al. Mar 1975 A
3879647 Hamilton et al. Apr 1975 A
3879652 Billings Apr 1975 A
3904950 Judd et al. Sep 1975 A
3909695 Peck Sep 1975 A
3909700 Ferro Sep 1975 A
3912940 Vince Oct 1975 A
3913002 Steigerwald et al. Oct 1975 A
3913036 Hook Oct 1975 A
3916289 Lynch Oct 1975 A
3919656 Sokal et al. Nov 1975 A
3927363 Mitchell et al. Dec 1975 A
3930196 Park et al. Dec 1975 A
3932764 Corey Jan 1976 A
3938024 Clarke Feb 1976 A
3940682 Park et al. Feb 1976 A
3949238 Brookes Apr 1976 A
3959716 Gilbert et al. May 1976 A
3974397 Killough Aug 1976 A
3976932 Collins Aug 1976 A
3986052 Hunter Oct 1976 A
3986097 Woods Oct 1976 A
3989995 Peterson Nov 1976 A
3991319 Servos et al. Nov 1976 A
4005335 Perper Jan 1977 A
4007413 Fisher et al. Feb 1977 A
4010381 Fickenscher et al. Mar 1977 A
4011518 Irvine et al. Mar 1977 A
4017746 Miller Apr 1977 A
4017783 Assow et al. Apr 1977 A
4017784 Simmons et al. Apr 1977 A
4027228 Collins May 1977 A
4037271 Keller Jul 1977 A
4044268 Hammel et al. Aug 1977 A
4051445 Boschert Sep 1977 A
4058369 Bentley et al. Nov 1977 A
4060757 McMurray Nov 1977 A
4066945 Korte, Jr. Jan 1978 A
4074182 Weischedel Feb 1978 A
4078247 Albrecht Mar 1978 A
4104539 Hase Aug 1978 A
4106084 Gibert Aug 1978 A
4109192 Burbank et al. Aug 1978 A
4114048 Hull et al. Sep 1978 A
4115704 Hannemann et al. Sep 1978 A
4122359 Breikss Oct 1978 A
4126793 De Vries Nov 1978 A
4128868 Gamble Dec 1978 A
4131860 Fyot Dec 1978 A
4140959 Powell Feb 1979 A
4150423 Boschert Apr 1979 A
4177389 Schott Dec 1979 A
4184197 Cuk et al. Jan 1980 A
4187458 Milberger et al. Feb 1980 A
4194147 Payne et al. Mar 1980 A
4205368 Erche et al. May 1980 A
4207475 Nercessian Jun 1980 A
4208594 Guicheteau Jun 1980 A
4208706 Suzuki et al. Jun 1980 A
4209710 Quarton Jun 1980 A
4210858 Ford et al. Jul 1980 A
4210958 Ikenoue et al. Jul 1980 A
4238690 Clarke Dec 1980 A
4238691 Ebert, Jr. Dec 1980 A
4241261 Ebert, Jr. Dec 1980 A
4245194 Fahlen et al. Jan 1981 A
4245286 Paulkovich et al. Jan 1981 A
4251857 Shelly Feb 1981 A
4253136 Nanko Feb 1981 A
4254459 Belson Mar 1981 A
4257087 Cuk Mar 1981 A
4257089 Ravis Mar 1981 A
4262214 Patel Apr 1981 A
4268476 Raible May 1981 A
4270164 Wyman et al. May 1981 A
4270165 Carpenter et al. May 1981 A
4272806 Metzger Jun 1981 A
4274133 Cuk et al. Jun 1981 A
4275317 Frosch et al. Jun 1981 A
4276594 Morley Jun 1981 A
4277726 Burke Jul 1981 A
4277728 Stevens Jul 1981 A
4288739 Nercessian Sep 1981 A
4288865 Graham Sep 1981 A
4292581 Tan Sep 1981 A
4293902 White Oct 1981 A
4293904 Brooks et al. Oct 1981 A
4297590 Vail Oct 1981 A
4300191 Baranowski et al. Nov 1981 A
4301496 Schwarz Nov 1981 A
4302803 Shelly Nov 1981 A
4307441 Bello Dec 1981 A
4310771 Wyatt et al. Jan 1982 A
4313060 Fickenscher et al. Jan 1982 A
4315207 Apfel Feb 1982 A
4316097 Reynolds Feb 1982 A
4317056 Alberts Feb 1982 A
4318007 Rizzi Mar 1982 A
4318164 Onodera et al. Mar 1982 A
4322817 Kuster Mar 1982 A
4323787 Sato et al. Apr 1982 A
4323788 Smith Apr 1982 A
4323962 Steigerwald Apr 1982 A
4325017 Schade, Jr. Apr 1982 A
4327298 Burgin Apr 1982 A
4328482 Belcher et al. May 1982 A
4330816 Imazeki et al. May 1982 A
4334263 Adachi Jun 1982 A
4336587 Boettcher et al. Jun 1982 A
4344122 Jones Aug 1982 A
4344124 Panicali Aug 1982 A
4346342 Carollo Aug 1982 A
4347558 Kalinsky Aug 1982 A
4353113 Billings Oct 1982 A
4355884 Honda et al. Oct 1982 A
4356541 Ikenoue et al. Oct 1982 A
4357654 Ikenoue et al. Nov 1982 A
4368409 Sivanesan et al. Jan 1983 A
4371919 Andrews et al. Feb 1983 A
4381457 Wiles Apr 1983 A
4386394 Kocher et al. May 1983 A
4393316 Brown Jul 1983 A
4395639 Bring Jul 1983 A
4398156 Aaland Aug 1983 A
4399499 Butcher et al. Aug 1983 A
4403269 Carroll Sep 1983 A
4415960 Clark, Jr. Nov 1983 A
4423341 Shelly Dec 1983 A
4427899 Bruns Jan 1984 A
4438411 Rubin et al. Mar 1984 A
4441070 Davies et al. Apr 1984 A
4442339 Mizuno et al. Apr 1984 A
4443840 Geissler et al. Apr 1984 A
4449173 Nishino et al. May 1984 A
4449174 Ziesse May 1984 A
4449175 Ishii et al. May 1984 A
4451743 Suzuki et al. May 1984 A
4451876 Ogata May 1984 A
4465966 Long et al. Aug 1984 A
4471289 Duley et al. Sep 1984 A
4473756 Brigden et al. Sep 1984 A
4476399 Yoshida et al. Oct 1984 A
4479175 Gille et al. Oct 1984 A
4484084 Cheffer Nov 1984 A
4499531 Bray Feb 1985 A
4504895 Steigerwald Mar 1985 A
4519024 Federico et al. May 1985 A
4520296 Lepper et al. May 1985 A
4523265 Deprez Jun 1985 A
4524411 Willis Jun 1985 A
4524413 Ikenoue et al. Jun 1985 A
4527228 Chi Yu Jul 1985 A
4528459 Wiegel Jul 1985 A
4533986 Jones Aug 1985 A
4535399 Szepesi Aug 1985 A
4536700 Bello et al. Aug 1985 A
4538073 Freige et al. Aug 1985 A
4538101 Shimpo et al. Aug 1985 A
4539487 Ishii Sep 1985 A
4546421 Bello et al. Oct 1985 A
4553039 Stifter Nov 1985 A
4556802 Harada et al. Dec 1985 A
4561046 Kuster Dec 1985 A
4562522 Adams et al. Dec 1985 A
4564800 Jurjans Jan 1986 A
4566059 Gallios et al. Jan 1986 A
4571551 Trager Feb 1986 A
4575640 Martin Mar 1986 A
4578631 Smith Mar 1986 A
4584635 Macinnis et al. Apr 1986 A
4586119 Sutton Apr 1986 A
4587604 Nerone May 1986 A
4591782 Germer May 1986 A
4593213 Vesce et al. Jun 1986 A
4605999 Bowman et al. Aug 1986 A
4607195 Valkestijn et al. Aug 1986 A
4607323 Sokal et al. Aug 1986 A
4618919 Martin, Jr. Oct 1986 A
4621313 Kiteley Nov 1986 A
4622511 Moore Nov 1986 A
4622629 Glennon Nov 1986 A
4626982 Huber Dec 1986 A
4628426 Steigerwald Dec 1986 A
4635179 Carsten Jan 1987 A
4638175 Bradford et al. Jan 1987 A
4642475 Fischer et al. Feb 1987 A
4642743 Radcliffe Feb 1987 A
4644440 Kenny et al. Feb 1987 A
4648017 Nerone Mar 1987 A
4651020 Kenny et al. Mar 1987 A
4652769 Smith et al. Mar 1987 A
4659942 Volp Apr 1987 A
4663699 Wilkinson May 1987 A
4670661 Ishikawa Jun 1987 A
4672517 Mandelcorn Jun 1987 A
4672518 Murdock Jun 1987 A
4672528 Park et al. Jun 1987 A
4674019 Martinelli Jun 1987 A
4675796 Gautherin et al. Jun 1987 A
4677311 Morita Jun 1987 A
4677534 Okochi Jun 1987 A
4680688 Inou et al. Jul 1987 A
4680689 Payne et al. Jul 1987 A
4683528 Snow et al. Jul 1987 A
4685039 Inou et al. Aug 1987 A
4688160 Fraidlin Aug 1987 A
4691273 Kuwata et al. Sep 1987 A
4694384 Steigerwald et al. Sep 1987 A
4694386 De Sartre Sep 1987 A
4695935 Oen et al. Sep 1987 A
4697136 Ishikawa Sep 1987 A
4698738 Miller et al. Oct 1987 A
4706177 Josephson Nov 1987 A
4709316 Ngo et al. Nov 1987 A
4709318 Gephart et al. Nov 1987 A
4716514 Patel Dec 1987 A
4717833 Small Jan 1988 A
4727308 Huljak et al. Feb 1988 A
4727469 Kammiller Feb 1988 A
4730242 Divan Mar 1988 A
4733102 Nakayama et al. Mar 1988 A
4734839 Barthold Mar 1988 A
4734844 Rhoads Mar 1988 A
4734924 Yahata et al. Mar 1988 A
4745299 Eng et al. May 1988 A
4745538 Cross et al. May 1988 A
4747034 Dickey May 1988 A
4748550 Okado May 1988 A
4754160 Ely Jun 1988 A
4754161 Fox Jun 1988 A
4760276 Lethellier Jul 1988 A
4763237 Wieczorek Aug 1988 A
4768141 Hubertus et al. Aug 1988 A
4772994 Harada et al. Sep 1988 A
4777382 Reingold Oct 1988 A
4777575 Yamato et al. Oct 1988 A
4779185 Musil Oct 1988 A
4782241 Baker et al. Nov 1988 A
4783728 Hoffman Nov 1988 A
4785387 Lee et al. Nov 1988 A
4788450 Wagner Nov 1988 A
4788634 Schlecht et al. Nov 1988 A
4794506 Hino et al. Dec 1988 A
4796173 Steigerwald Jan 1989 A
4800479 Bupp Jan 1989 A
4805078 Munz Feb 1989 A
4809148 Barn Feb 1989 A
4811191 Miller Mar 1989 A
4812672 Cowan et al. Mar 1989 A
4814962 Magalhaes et al. Mar 1989 A
4814965 Petersen Mar 1989 A
4823249 Garcia, II Apr 1989 A
4825348 Steigerwald et al. Apr 1989 A
4829216 Rodriguez-Cavazos May 1989 A
4841160 Yon et al. Jun 1989 A
4853832 Stuart Aug 1989 A
4853837 Gulczynski Aug 1989 A
4855858 Boertzel et al. Aug 1989 A
4855888 Henze et al. Aug 1989 A
4860184 Tabisz et al. Aug 1989 A
4860185 Brewer et al. Aug 1989 A
4860188 Bailey et al. Aug 1989 A
4860189 Hitchcock Aug 1989 A
4864479 Steigerwald et al. Sep 1989 A
4864483 Divan Sep 1989 A
4866588 Rene Sep 1989 A
4866589 Satoo et al. Sep 1989 A
4868729 Suzuki Sep 1989 A
4870555 White Sep 1989 A
4873616 Fredrick et al. Oct 1989 A
4873618 Fredrick et al. Oct 1989 A
4877972 Sobhani et al. Oct 1989 A
4881014 Okochi Nov 1989 A
4882646 Genuit Nov 1989 A
4882664 Pennington Nov 1989 A
4882665 Choi et al. Nov 1989 A
4885674 Varga et al. Dec 1989 A
4890210 Myers Dec 1989 A
4890214 Yamamoto Dec 1989 A
4893227 Gallios et al. Jan 1990 A
4893228 Orrick et al. Jan 1990 A
4896092 Flynn Jan 1990 A
4899271 Seiersen Feb 1990 A
4900885 Inumada Feb 1990 A
4902508 Badylak et al. Feb 1990 A
4903183 Noguchi et al. Feb 1990 A
4903189 Ngo et al. Feb 1990 A
4908857 Burns et al. Mar 1990 A
4916599 Traxler et al. Apr 1990 A
4920470 Clements Apr 1990 A
4922397 Heyman May 1990 A
4922404 Ludwig et al. May 1990 A
4924170 Henze May 1990 A
4926303 Sturgeon May 1990 A
4929605 Domet et al. May 1990 A
4931918 Inou et al. Jun 1990 A
4935857 Nguyen et al. Jun 1990 A
4937468 Shekhawat et al. Jun 1990 A
4952849 Fellows et al. Aug 1990 A
4953068 Henze Aug 1990 A
4958268 Nagagata et al. Sep 1990 A
4959764 Bassett Sep 1990 A
4959766 Jain Sep 1990 A
4961128 Bloom Oct 1990 A
4975823 Rilly et al. Dec 1990 A
4982149 Shimanuki Jan 1991 A
5001318 Noda Mar 1991 A
5006782 Pelly Apr 1991 A
5008795 Parsley et al. Apr 1991 A
5010261 Steigerwald Apr 1991 A
5012401 Barlage Apr 1991 A
5013980 Stephens et al. May 1991 A
5016245 Lobjinski et al. May 1991 A
5017800 Divan May 1991 A
5019717 McCurry et al. May 1991 A
5019719 King May 1991 A
5019954 Bourgeault et al. May 1991 A
5023766 Laidler Jun 1991 A
5027002 Thornton Jun 1991 A
5027264 Dedoncker et al. Jun 1991 A
5029062 Capel Jul 1991 A
5036452 Loftus Jul 1991 A
5038264 Steigerwald Aug 1991 A
5038265 Paladel Aug 1991 A
5038266 Callen et al. Aug 1991 A
5041777 Riedger Aug 1991 A
5043859 Korman et al. Aug 1991 A
5047911 Sperzel et al. Sep 1991 A
5055722 Latos et al. Oct 1991 A
5057698 Widener et al. Oct 1991 A
5057986 Henze et al. Oct 1991 A
5063338 Capel et al. Nov 1991 A
5063489 Inaba Nov 1991 A
5066900 Bassett Nov 1991 A
5073848 Steigerwald et al. Dec 1991 A
5077486 Marson et al. Dec 1991 A
5079686 Vinciarelli Jan 1992 A
5097403 Smith Mar 1992 A
5099406 Harada et al. Mar 1992 A
5101336 Willocx et al. Mar 1992 A
5103110 Housworth et al. Apr 1992 A
5103387 Rosenbaum et al. Apr 1992 A
5105351 Harada et al. Apr 1992 A
5111372 Kameyama et al. May 1992 A
5111374 Lai et al. May 1992 A
5113334 Tuson et al. May 1992 A
5113337 Steigerwald May 1992 A
5119013 Sabroff Jun 1992 A
5119283 Steigerwald et al. Jun 1992 A
5119284 Fisher et al. Jun 1992 A
5122726 Elliott et al. Jun 1992 A
5122945 Marawi Jun 1992 A
5126651 Gauen Jun 1992 A
5128603 Wolfel Jul 1992 A
5132888 Lo et al. Jul 1992 A
5132889 Hitchcock et al. Jul 1992 A
5138184 Keefe Aug 1992 A
5138249 Capel Aug 1992 A
5140509 Murugan Aug 1992 A
5140512 O'Sullivan Aug 1992 A
5140514 Tuusa et al. Aug 1992 A
5144547 Masamoto Sep 1992 A
5146394 Ishii et al. Sep 1992 A
5157269 Jordan et al. Oct 1992 A
5159541 Jain Oct 1992 A
5161241 Kanai Nov 1992 A
5162663 Combs et al. Nov 1992 A
5164609 Poppe et al. Nov 1992 A
5168435 Kobayashi et al. Dec 1992 A
5173846 Smith Dec 1992 A
5177675 Archer Jan 1993 A
5179512 Fisher et al. Jan 1993 A
5206800 Smith Apr 1993 A
5208740 Ehsani May 1993 A
5216351 Shimoda Jun 1993 A
5218522 Phelps et al. Jun 1993 A
5221887 Gulczynski Jun 1993 A
5224025 Divan et al. Jun 1993 A
5233509 Ghotbi Aug 1993 A
5235502 Vinciarelli et al. Aug 1993 A
5237208 Tominaga et al. Aug 1993 A
5237606 Ziermann Aug 1993 A
5254930 Daly Oct 1993 A
5255174 Murugan Oct 1993 A
5264736 Jacobson Nov 1993 A
5267135 Tezuka et al. Nov 1993 A
5267137 Goebel Nov 1993 A
5268830 Loftus, Jr. Dec 1993 A
5272612 Harada et al. Dec 1993 A
5272613 Buthker Dec 1993 A
5274539 Steigerwald et al. Dec 1993 A
5274543 Loftus, Jr. Dec 1993 A
5289364 Sakurai Feb 1994 A
5303138 Rozman Apr 1994 A
5304875 Smith Apr 1994 A
5305191 Loftus, Jr. Apr 1994 A
5305192 Bonte et al. Apr 1994 A
5343383 Shinada et al. Aug 1994 A
5353212 Loftus, Jr. Oct 1994 A
5355077 Kates Oct 1994 A
5355293 Carlstedt Oct 1994 A
5355294 De Doncker et al. Oct 1994 A
5363323 Lange Nov 1994 A
5377090 Steigerwald Dec 1994 A
5383858 Reilly et al. Jan 1995 A
5386359 Nochi Jan 1995 A
5396412 Barlage Mar 1995 A
5398182 Crosby Mar 1995 A
5400239 Caine Mar 1995 A
5410467 Smith et al. Apr 1995 A
5412308 Brown May 1995 A
5412557 Lauw May 1995 A
5424932 Inou et al. Jun 1995 A
5428523 McDonnal Jun 1995 A
5430632 Meszlenyi Jul 1995 A
5430633 Smith Jul 1995 A
5434770 Dreifuerst et al. Jul 1995 A
5438499 Bonte et al. Aug 1995 A
5442534 Cuk et al. Aug 1995 A
5448469 Rilly et al. Sep 1995 A
5461301 Truong Oct 1995 A
5477091 Fiorina et al. Dec 1995 A
5481178 Wilcox et al. Jan 1996 A
5481449 Kheraluwala et al. Jan 1996 A
5500791 Kheraluwala et al. Mar 1996 A
5513092 Goebel Apr 1996 A
5514921 Steigerwald May 1996 A
5519599 Shinada et al. May 1996 A
5528480 Kikinis et al. Jun 1996 A
5528482 Rozman Jun 1996 A
5530635 Yashiro Jun 1996 A
5534768 Chavannes et al. Jul 1996 A
5535112 Vazquez Lopez et al. Jul 1996 A
5537021 Weinberg et al. Jul 1996 A
5539630 Pietkiewicz et al. Jul 1996 A
5539631 Partridge Jul 1996 A
5541827 Allfather Jul 1996 A
5552695 Schwartz Sep 1996 A
5559423 Harman Sep 1996 A
5559682 Kanouda et al. Sep 1996 A
5570276 Cuk et al. Oct 1996 A
5576940 Steigerwald et al. Nov 1996 A
5590032 Bowman et al. Dec 1996 A
5594629 Steigerwald Jan 1997 A
5621621 Lilliestrale Apr 1997 A
5625541 Rozman Apr 1997 A
5635826 Sugawara Jun 1997 A
5636107 Lu et al. Jun 1997 A
5636116 Milavec et al. Jun 1997 A
5663876 Newton et al. Sep 1997 A
5663877 Dittli et al. Sep 1997 A
5663887 Warn et al. Sep 1997 A
5691870 Gebara Nov 1997 A
5708571 Shinada Jan 1998 A
5719754 Fraidlin et al. Feb 1998 A
5726869 Yamashita et al. Mar 1998 A
5729444 Perol Mar 1998 A
5734563 Shinada Mar 1998 A
5736843 Amin Apr 1998 A
5742491 Bowman et al. Apr 1998 A
5745359 Faulk Apr 1998 A
5754414 Hanington May 1998 A
5757625 Schoofs May 1998 A
5757627 Faulk May 1998 A
5768118 Faulk et al. Jun 1998 A
5771160 Seong Jun 1998 A
5774350 Notaro et al. Jun 1998 A
5781420 Xia et al. Jul 1998 A
5781421 Steigerwald et al. Jul 1998 A
5784266 Chen Jul 1998 A
5805432 Zaitsu et al. Sep 1998 A
5818704 Martinez Oct 1998 A
5831839 Pansier Nov 1998 A
5841641 Faulk Nov 1998 A
5841643 Schenkel Nov 1998 A
5862042 Jiang Jan 1999 A
5870299 Rozman Feb 1999 A
5872705 Loftus et al. Feb 1999 A
5880939 Sardat Mar 1999 A
5880949 Melhem et al. Mar 1999 A
5894412 Faulk Apr 1999 A
5901052 Strijker May 1999 A
5903452 Yang May 1999 A
5907481 Svardsjo May 1999 A
5916313 Brown Jun 1999 A
5929692 Carsten Jul 1999 A
5946202 Balogh Aug 1999 A
5946207 Schoofs Aug 1999 A
5949658 Thottuvelil et al. Sep 1999 A
5956242 Majid et al. Sep 1999 A
5956245 Rozman Sep 1999 A
5959370 Pardo Sep 1999 A
5991167 Van Lerberghe Nov 1999 A
5999417 Schlecht Dec 1999 A
6002597 Rozman Dec 1999 A
6005773 Rozman et al. Dec 1999 A
6011703 Boylan et al. Jan 2000 A
6016258 Jain et al. Jan 2000 A
6016261 De Wit et al. Jan 2000 A
RE36571 Rozman Feb 2000 E
6026005 Abdoulin Feb 2000 A
6038148 Farrington et al. Mar 2000 A
6046920 Cazabat et al. Apr 2000 A
6058026 Rozman May 2000 A
6066943 Hastings et al. May 2000 A
6069799 Bowman et al. May 2000 A
6069804 Ingman et al. May 2000 A
6084792 Chen et al. Jul 2000 A
6087817 Varga Jul 2000 A
6088329 Lindberg et al. Jul 2000 A
6091616 Jacobs et al. Jul 2000 A
6137697 Tarodo et al. Oct 2000 A
6137698 Yukawa et al. Oct 2000 A
6141224 Xia et al. Oct 2000 A
6169675 Shimamori et al. Jan 2001 B1
6191964 Boylan et al. Feb 2001 B1
6208535 Parks Mar 2001 B1
6211657 Goluszek Apr 2001 B1
6222742 Schlecht Apr 2001 B1
6246592 Balogh et al. Jun 2001 B1
6252781 Rinne et al. Jun 2001 B1
6278621 Xia et al. Aug 2001 B1
RE37510 Bowman et al. Jan 2002 E
6385059 Telefus et al. May 2002 B1
6417653 Massie et al. Jul 2002 B1
6421262 Saxelby et al. Jul 2002 B1
6430071 Haneda Aug 2002 B1
RE37889 Rozman Oct 2002 E
RE37898 Seragnoli Nov 2002 E
6477065 Parks Nov 2002 B2
6487093 Vogman Nov 2002 B1
6504267 Giannopoulos Jan 2003 B1
6535407 Zaitsu Mar 2003 B1
6552917 Bourdillon Apr 2003 B1
6580258 Wilcox et al. Jun 2003 B2
6594159 Schlecht Jul 2003 B2
6608768 Sula Aug 2003 B2
6696882 Markowski et al. Feb 2004 B1
6700365 Isham et al. Mar 2004 B2
6721192 Yang et al. Apr 2004 B1
6728118 Chen et al. Apr 2004 B1
6731520 Schlecht May 2004 B2
6735094 Steigerwald et al. May 2004 B2
6804125 Brkovic Oct 2004 B2
6836415 Yang et al. Dec 2004 B1
6845019 Kim et al. Jan 2005 B2
6853563 Yang et al. Feb 2005 B1
6853568 Li et al. Feb 2005 B2
6862194 Yang et al. Mar 2005 B2
6862198 Muegge et al. Mar 2005 B2
6927987 Farrington et al. Aug 2005 B2
6930893 Vinciarelli Aug 2005 B2
6970366 Apeland et al. Nov 2005 B2
6987679 Gan et al. Jan 2006 B2
7019997 Ooishi Mar 2006 B2
7031128 Nam Apr 2006 B2
7035120 Tobita Apr 2006 B2
7050309 Farrington May 2006 B2
7055309 Plote et al. Jun 2006 B2
7072190 Schlecht Jul 2006 B2
7145786 Vinciarelli Dec 2006 B2
7187562 Stojcic et al. Mar 2007 B2
7269034 Schlecht Sep 2007 B2
7272023 Schlecht Sep 2007 B2
RE40438 Urakawa et al. Jul 2008 E
7501715 Saeueng et al. Mar 2009 B2
7558083 Schlecht Jul 2009 B2
7564702 Schlecht Jul 2009 B2
7727021 Haruna et al. Jun 2010 B2
7746041 Xu et al. Jun 2010 B2
7768801 Usui et al. Aug 2010 B2
8023290 Schlecht Sep 2011 B2
8493751 Schlecht Jul 2013 B2
8582333 Oraw et al. Nov 2013 B2
10374505 Wood Aug 2019 B2
10594223 Vinciarelli et al. Mar 2020 B1
11075583 Vinciarelli Jul 2021 B1
20030007372 Porter et al. Jan 2003 A1
20030174522 Xu et al. Sep 2003 A1
20050047177 Tobita Mar 2005 A1
20060209572 Schlecht Sep 2006 A1
20060262575 Schlecht et al. Nov 2006 A1
20060285368 Schlecht Dec 2006 A1
20080175024 Schlecht et al. Jul 2008 A1
20080211304 Farrington et al. Sep 2008 A1
20090051221 Liu et al. Feb 2009 A1
20100091526 Schlecht Apr 2010 A1
20110176333 Schlecht et al. Jul 2011 A1
20140085939 Schlecht Mar 2014 A1
20210155104 Skutt et al. May 2021 A1
Foreign Referenced Citations (146)
Number Date Country
1181803 Jan 1985 CA
2042274 Dec 1991 CA
0 165 37 Nov 1983 EP
0 418 83 Sep 1984 EP
0 779 58 Jan 1986 EP
0 584 00 May 1986 EP
0 184 963 Jun 1986 EP
0 223 504 May 1987 EP
0 102 614 Jul 1987 EP
0 139 870 Nov 1987 EP
0 244 186 Nov 1987 EP
0 289 196 Nov 1988 EP
0 343 855 Nov 1989 EP
0 410 866 Jan 1991 EP
0 449 504 Oct 1991 EP
0 467 778 Jan 1992 EP
0 472 261 Feb 1992 EP
0 481 466 Apr 1992 EP
0 484 610 May 1992 EP
0 291 403 Jan 1993 EP
0 549 920 Jul 1993 EP
0 550 167 Jul 1993 EP
0 582 814 Feb 1994 EP
0 588 569 Mar 1994 EP
0 257 817 Apr 1994 EP
0 336 725 Jul 1994 EP
0 605 752 Jul 1994 EP
0 608 091 Jul 1994 EP
0 610 158 Aug 1994 EP
0 616 281 Sep 1994 EP
0 622 891 Nov 1994 EP
0 549 920 Aug 1995 EP
0 665 634 Aug 1995 EP
0 687 058 Dec 1995 EP
0 428 377 Jan 1996 EP
0 694 826 Jan 1996 EP
0 696 831 Feb 1996 EP
0 529 180 Mar 1996 EP
0 474 471 May 1996 EP
0 709 949 May 1996 EP
0 476 278 Jun 1996 EP
0 720 278 Jul 1996 EP
0 736 959 Oct 1996 EP
0 741 447 Nov 1996 EP
0 595 232 Jan 1997 EP
0 599 814 Apr 1997 EP
0 848 485 Jun 1998 EP
0 508 664 Jul 1998 EP
0 429 310 Sep 1998 EP
0 757 428 Nov 1998 EP
0 575 626 Dec 1998 EP
0 884 829 Dec 1998 EP
0 503 806 May 1999 EP
0 944 162 Sep 1999 EP
0 954 088 Nov 1999 EP
0 973 246 Jan 2000 EP
0 996 219 Apr 2000 EP
0 618 666 Feb 2001 EP
0 925 638 Oct 2001 EP
0 798 846 Jan 2002 EP
0 932 929 Aug 2002 EP
0 851 566 Mar 2003 EP
0 805 540 Jun 2004 EP
0 854 564 Mar 2008 EP
1 231 705 Aug 2010 EP
2535133 Apr 1984 FR
2608857 May 1989 FR
2 217 931 Jan 1900 GB
2 110 493 Jun 1983 GB
2 117 144 Oct 1983 GB
2 131 238 Jun 1984 GB
2 160 722 Dec 1985 GB
2 233 479 Jan 1991 GB
2 244 155 Nov 1991 GB
2 255 865 Nov 1992 GB
2 291 287 Jan 1996 GB
2 313 495 Nov 1997 GB
S6149583 Mar 1986 JP
61-273171 Dec 1986 JP
61-277372 Dec 1986 JP
62-233067 Oct 1987 JP
63-257458 Oct 1988 JP
63-277471 Nov 1988 JP
S6450762 Feb 1989 JP
H01-278265 Nov 1989 JP
H01-283061 Nov 1989 JP
H02-155465 Jun 1990 JP
H02-202362 Aug 1990 JP
H02-246774 Oct 1990 JP
H318275 Jan 1991 JP
H389851 Apr 1991 JP
04-105556 Apr 1992 JP
H05-064446 Mar 1993 JP
05-199744 Aug 1993 JP
05-207745 Aug 1993 JP
06-098540 Apr 1994 JP
06-187056 Jul 1994 JP
06-315263 Nov 1994 JP
06-339266 Dec 1994 JP
H06-343262 Dec 1994 JP
07-007928 Jan 1995 JP
07-115766 May 1995 JP
07-194104 Jul 1995 JP
07-308062 Nov 1995 JP
07-337005 Dec 1995 JP
07-337006 Dec 1995 JP
08-019251 Jan 1996 JP
08-205533 Aug 1996 JP
08-223906 Aug 1996 JP
08-275518 Oct 1996 JP
08-289538 Nov 1996 JP
08-336282 Dec 1996 JP
09-093917 Apr 1997 JP
09-172775 Jun 1997 JP
09-182416 Jul 1997 JP
H07-337005 Dec 1997 JP
10-066336 Mar 1998 JP
10-136646 May 1998 JP
10-146054 May 1998 JP
10-210740 Aug 1998 JP
10-248248 Sep 1998 JP
11-004577 Jan 1999 JP
11-069803 Mar 1999 JP
11-103572 Apr 1999 JP
11-146650 May 1999 JP
H11-134989 May 1999 JP
11-178335 Jul 1999 JP
2004-254393 Sep 2004 JP
177578 May 1997 PL
WO-8404634 Nov 1984 WO
WO-8602787 May 1986 WO
WO-8705165 Aug 1987 WO
WO-8809084 Nov 1988 WO
WO-8901719 Feb 1989 WO
WO-9107803 May 1991 WO
WO-9523451 Aug 1995 WO
WO-9530182 Nov 1995 WO
WO-9532458 Nov 1995 WO
WO-9811658 Mar 1998 WO
WO-9818198 Apr 1998 WO
WO-9826496 Jun 1998 WO
WO-9833267 Sep 1998 WO
WO-0197371 Dec 2001 WO
WO-2004082119 Sep 2004 WO
WO-2005008872 Jan 2005 WO
9711503 Jun 1998 ZA
Non-Patent Literature Citations (389)
Entry
“Electronics Life” magazine excerpts, Mar. 1995, pp. 45-52 (English not available).
“Electronics Life” magazine excerpts, Nov. 1995, pp. 81-90 (English not available).
“Thomas Financial, Venture Economics' Venture Capital Financings, Portfolio Company Report,” 2 pages (2007).
Abe, et al., “Stability Improvement of Distributed Power System by Using Full-Regulated Bus Converter,” 31st Annual Conference of IEEE Industrial Electronics Society, pp. 2549-2553 (2005).
Abe, et al., “System Stability of Full-Regulated Bus Converter in Distributed Power System,” INTELEC 05—Twenty-Seventh International Telecommunications Conference, pp. 563-568 (2005).
Abramczyk, et al., “MOSPOWER Applications Handbook,” Siliconix Incorporated, 248 pages (1984).
Abramovitz & Ben-Yaakov, “A Novel Self-Oscillating Synchronously-Rectified DC-DC Converter,” PESC '91 Record: 22nd Annual IEEE Power Electronics Specialists Conference, pp. 163-170 (1991).
Acker, et al., “Current-Controlled Synchronous Rectification,” Proceedings of 1994 IEEE Applied Power Electronics Conference and Exposition, pp. 185-191 (1994).
Acker, et al., “Synchronous rectification with adaptive timing control,” Proceedings of PESC '95—Power Electronics Specialist Conference, pp. 88-95 (1995).
Aguilar, et al., “An Improved Battery Charger/Discharger Topology with Power Factor Correction,” IV IEEE International Power Electronics Congress. Technical Proceedings, pp. 2-7, (1995).
Ahn, et al., “Clamp Mode Forward ZVS-MRC with Self-Driven Synchronous Rectifier,” Proceedings of Intelec'96—International Telecommunications Energy Conference, pp. 470-475 (1996).
Alou, et al., “A High Efficiency Voltage Regulator Module with Single Winding Self-Driven Synchronous Rectification,” IEEE 31st Annual Power Electronics Specialists Conference Proceedings, pp. 1510-1515 (2000).
Alou, et al., “Design of a low output voltage DC/DC converter for Telecom application with a new scheme for Self-Driven Synchronous Rectification,” Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings, pp. 866-872 (1999).
Alou, et al., “Design of a 1,5V Output Voltage On-Board DC/DC Converter with Magnetic Components Integrated in a Multilater PCB,” Proceedings of APEC 97—Applied Power Electronics Conference, pp. 764-769 (1997).
Alvarez, “Control of Multi-Switch Multi-Output Power Converters,” Massachusetts Institute of Technology, Master of Science Thesis, 32 pages (1988).
Alvarez-Barcia, et al., “Low Power Multioutput Converter with Post-Regulation based on Synchronous Rectification and Windings Integrated in the PCB,” Thirteenth Annual Applied Power Electronics Conference and Exposition, pp. 191-197 (1998).
Andreycak, “Power Management Solution Delivers Efficient Multiple Outputs,” Power Electronics Technology, retrieved from http://www.printthis.clickability.com/pt/cpt?action=cpt&title=Power+Management+Solution, 5 pages (2001).
Arduini, “A Distributed Power System with a Low-Cost Universal DC/DC Converter,” Power Conversion Electronics Sep. 1995 Proceedings, pp. 315-322 (1995).
Artesyn, “Chapter 1: Principles of Power Conversion,” Amtex Electronics Pty. Ltd., 17 pages (n.d.).
Artesyn, “Quarter-Brick IBC Series Application Note 190,” 9 pages (2007).
Ashdown & Poulin, “Distributed power-a solution for the 90s,” Proceedings of Intelec 93: 15th International Telecommunications Energy Conference, pp. 47-51 (1993).
Astec, “Astec AMPSS Modular Power Supply System,” PowerPoint presentation, 99 pages (n.d.).
Balogh, “Design Review: 140W, Multiple Output High Density DC/DC Converter,” Texas Instruments Power Supply Design Seminar—Seminar 1200, Topic 6, 24 pages (1997).
Balogh, “Design Review: 100W, 400kHz, DC/DC Converter With Current Doubler Synchronous Rectification Achieves 92% Efficiency,” Texas Instruments Seminar 1100 Topic 2, pp. 2-1-2-26 (2001).
Balogh, “The Performance Of The Current Doubler Rectifier with Synchronous Rectification,” Technical Papers of the Tenth International High Frequency Power Conversion Conference, pp. 216-225 (1995).
Balogh, et al., “Unique Cascaded Power Converter Topology for High Current Low Output Voltage Applications,” Texas Instruments Seminar 1300 Topic 1, 24 pages (1999).
Barlage, “Synchronous Rectification and Regulation in Multiple Cross Regulated Outputs,” Technical Papers of the Ninth International High Frequency Power Conversion 1994 Conference, pp. 185-193 (1994).
Barry, “Design issues in regulated and unregulated intermediate bus converters,” Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 1389-1394 (2004).
Betty & Batarseh, “Topical overview of soft-switching PWM high frequency converters,” Proceedings of Southcon '95, pp. 47-52 (1995).
Bel Power Products, “Bus Converter 48V Input / 9.4V Output / 36A Datasheet,” 7 pages (2004).
Bel Power Products, “Isolated DC/DC Converters: 48 VDC Input; 12VDC/27 A Output, 1/4 Brick-0RCM-27S12L,” 3 pages (2008).
Belopolsky & Dassatti, “Hybrid Technologies for High Frequency Switching Power Supplies,” Proceedings of the 41st Electronic Components & Technology Conference, pp. 103-108 (1991).
Berkowitz, et al., “A Distributed Power Architecture for the System 75 Digital Communications System,” INTELEC '84—International Telecommunications Energy Conference, pp. 130-134 (1984).
Billings, “Handbook of Switchmode Power Supplies,” McGraw-Hill Publishing Company, 340 pages (1989).
Bindra, “Two-Stage Conversion Redefines Distributed Power Architecture,” Power Electronics Technology, 3 pages (2003).
Blake, et al., “Synchronous Rectifiers Versus Schottky Diodes: A Comparison of the Losses of a Sychronous Rectifier Versus the Losses of a Schottky Diode Rectifier,” Proceedings of 1994 IEEE Applied Power Electronics Conference and Exposition, pp. 17-23 (1994).
Blanc & Thibodeau, “Use of Enhancement- And Depletion-Mode Mosfets in Sychronous Rectification,” Proceedings of The Power Electronics Show & Conference, pp. 1-8 (1986).
Blanc, “Practical Application of MOSFET Synchronous Rectifiers,” Proceedings of the Thirteenth International Telecommunications Energy Conference—INTELEC 91, pp. 494-501 (1991).
Blanchard & Stevens, “MOSFETs Move in on Low Voltage Rectification,” Official Proceedings of the Ninth International PCI, pp. 213-222 (1984).
Blanchard & Thibodeau, “The design of a high efficiency, low voltage power supply using MOSFET synchronous rectification and current mode control,” 1985 IEEE Power Electronics Specialists Conference, pp. 355-361 (1985).
Boschert, “3T Family User Information Sheet,” Boschert Incorporated, 1 page (1982).
Boschert, “Boschert: An International Leader in Switching Power Supplies,” 24 pages (n.d.).
Boschert, “Marketing Brochure,” 15 pages (n.d.).
Boschert, “Switching Power Supplies Test Result—Model 3T12AP, PN 10484,” 1 page (n.d.).
Bowles & Paul, “Modelling Interference Properties of SMPS DC Power Distribution Busses,” National Symposium on Electromagnetic Compatibility, pp. 119-126 (1989).
Bowman, et al., “A High Density Board Mounted Power Module for Distributed Powering Architectures,” Fifth Annual Proceedings on Applied Power Electronics Conference and Exposition, pp. 43-54 (1990).
Brakus, “DC/DC Modules for Low Voltage Applications: The New Generation of Board Mounted Modules in Thick-Copper Multilayer Technology,” INTELEC—Twentieth International Telecommunications Energy Conference, pp. 392-397 (1998).
Briskman, et al., “COMSAT Technical Review, vol. 7, No. 1, Spring 1977,” Communications Satellite Corporation, 176 pages (1977).
Brown, “Addressing the topologies, converters, and switching devices for intermediate bus architectures,” 2005 European Conference on Power Electronics and Applications, 9 pages (2005).
Brush, “Distributed power architecture demand characteristics,” Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 342-345 (2004).
Burns, et al., “An Intelligent, Fault Tolerant, High Power, Distributed Power System for Massively Parallel Processing Computers,” Proceedings of the Ninth Annual Applied Power Electronics Conference and Exposition—ASPEC'94, pp. 795-800 (1994).
Burr-Brown, “Isolated, Unregulated DC/DC Converters,” Burr Brown Corporation, PWS727 & PWS728, 8 pages (1989).
Cao & Peng, “A family of zero current switching switched-capacitor dc-dc converters,” Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 1365-1372 (2010).
Cao & Peng, “Zero-Current-Switching Multilevel Modular Switched-Capacitor DC-DC Converter,” IEEE Transactions on Industry Applications 46(6), pp. 2536-2544 (2010).
Carbone, “Distributed Power Tags Keep Falling,” Electronics Purchasing, 1 page,(1996).
Carpenter, et al., “A Distributed Power System for Military VLSI Applications,” Technical Papers of the Third International High Frequency Power Conversion 1988 Conference, pp. 430-441 (1988).
Carr & Franco, “X2000 Power System Architecture,” Proceedings of the Thirty-Second Intersociety Energy Conversion Engineering Conference, pp. 381-386 (1997).
Carsten, “Distributed Power Systems of the Future Utilizing High Frequency Converters,” Technical Papers of the Second International High Frequency Power Conversion Conference, pp. 1-14 (1987).
Carsten, “VLSI & VHSIC Power System Design Considerations,” Proceedings off the Twelfth International PCI Conference, pp. 1-15 (1986).
Casey & Schlecht, “A high-frequency, low volume, point-of-load power supply for distributed power systems,” Proceedings of the 18th Annual IEEE Power Electronics Specialists Conference, pp. 439-450 (1987).
Casey, “Circuit Design for 1-10 MHZ DC-DC Conversion,” MIT Doctoral Thesis, 109 pages (1989).
Celestica, “Proposal for Celestica FixedRatio Product Family,” 18 pages (2002).
Cervera, et al., “A High-Efficiency Resonant Switched Capacitor Converter With Continuous Conversion Ratio,” IEEE Transactions on Power Electronics 30(3), pp. 1373-1382 (2015).
Chen & Shih, “New Multi-Output Switching Converters with MOSFET-Rectifier Post Regulators,” IEEE Transactions on Industrial Electronics 45(4), pp. 609-616 (1998).
Chen, “Resonant Switched Capacitor DC-DC Converter with Stackable Conversion Ratios,” Electrical Engineering and Computer Sciences, Univ. of California at Berkeley, Technical Report No. UCB/EECS-2016-187, 21 pages (2016).
Chen, et al., “A resonant MOSFET gate driver with efficient energy recovery,” IEEE Transactions on Power Electronics 19(2), pp. 470-477 (2004).
Chen, et al., “Design of a High-Efficiency, Low-Profile Forward Converter with 3.3-v Output,” 1995 VPEC Seminar Proceedings, pp. 105-112 (1995).
Chen, et al., “Design of High Efficiency, Low Profile, Low Voltage Converter with Integrated Magnetics,” Proceedings of APEC 97—Applied Power Electronics Conference, pp. 911-917 (1997).
Cheng, “Comparative Study of AC/DC Converters for More Electric Aircraft,” Power Electronics and Variable Speed Drives, Conference Publication No. 456, pp. 299-304 (1998).
Cho & Choi, “Analysis and Design of Multi-Stage Distributed Power Systems,” Proceedings] Thirteenth International Telecommunications Energy Conference—INTELEC 91, pp. 55-61 (1991).
Choi & Cho, “Intermediate Line Filter Design to Meet Both Impedance Compatibility and EMI Specifications,” IEEE Transactions on Power Electronics 10(5), pp. 583-588 (1995).
Choi, “Dynamics and Control of Switchmode Power Conversions in Distributed Power Systems,” Virginia Polytechnic Institute and State University Thesis, 200 pages (1992).
Choi, et al., “The stacked power system: a new power conditioning architecture for mainframe computer systems,” IEEE Transactions on Power Electronics 9(6), pp. 616-623 (1994).
Cobos & Uceda, “Low output voltage DC/DC conversion,” Proceedings of IECON'94—20th Annual Conference of IEEE Industrial Electronics, pp. 1676-1681 (1994).
Cobos, et al., “Active Clamp PWM Forward Converter with Self Driven Synchronous Rectification,” Proceedings of Intelec 93: 15th International Telecommunications Energy Conference, pp. 200-206 (1993).
Cobos, et al., “Comparison of High Efficiency Low Output Voltage Forward Topologies,” Proceedings of 1994 Power Electronics Specialist Conference—PESC'94, pp. 887-894 (1994).
Cobos, et al., “Low voltage power electronics,” Journal of Circuits, Systems, and Computers 5(4), pp. 575-588 (1995).
Cobos, et al., “New Driving Scheme for Self Driven Synchronous Rectifiers,” Fourteenth Annual Applied Power Electronics Conference and Expedition, pp. 840-846 (1999).
Cobos, et al., “Optimized Synchronous Rectification Stage for Low Output Voltage (3.3V) DC/DC Conversion,” 25th Annual IEEE Power Electronics Specialists Conference, pp. 902-908 (1994).
Cobos, et al., “RCD Clamp PWM Forward Converter With Self Driven Synchronous Rectification,” Proceedings of IECON '93—19th Annual Conference of IEEE Industrial Electronics, pp. 1336-1341 (1993).
Cobos, et al., “Resonant reset forward topologies for low output voltage on board converters,” Applied Power Electronics Conference and Exposition, 1994. APEC '94. Conference Proceedings pp. 703-708 (1994).
Cobos, et al., “Self Driven Synchronous Rectification in Resonant Topologies: Forward ZVS-MRC, Forward ZCS-QRC and LCC-PRC,” Proceedings of the 1992 International Conference on Industrial Electronics, Control, Instrumentation, and Automation, pp. 185-190 (1992).
Cobos, et al., “Several Alternatives for Low Output Voltage on Board Converters,” APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition, pp. 163-169 (1998).
Cobos, et al., “Study of the applicability of self-driven synchronous rectification to resonant topologies,” PESC '92 Record. 23rd Annual IEEE Power Electronics Specialists Conference, pp. 933-940 (1992).
Croll & Grellet, “Multiple Output DC/DC Zero-Current Switch Quasi-Resonant Converter,” Proceedings of Intelec 93: 15th International Telecommunications Energy Conference, pp. 215-220 (1993).
Cutatolo, “Choosing a Power Architecture,” IC Master, 4 pages (2004).
De Hoz & De La Cruz, “Analysis and Design of a Zero Current Switched Quasi-Resonant Converter with Synchronous Rectification for Low Output Voltage Applications,” PESC '92 Record. 23rd Annual IEEE Power Electronics Specialists Conference, pp. 221-228 (1992).
De La Cruz, et al., “Analysis of Suitable PWM Topologies to Meet Very High Efficiency Requirements for on Board DC/DC Converters in Future Telecom Systems,” Proceedings of Intelec 93: 15th International Telecommunications Energy Conference, pp. 207-214 (1993).
De La Cruz, et al., “Performances Comparison of Four Practical Implementations Based on PWM, Quasi and Multiresonant Topologies for on Board DC/DC Converters in Distributed Power Architectures,” PESC '92 Record. 23rd Annual IEEE Power Electronics Specialists Conference, pp. 917-925 (1992).
De La Cruz, et al., “Review of Suitable Topologies for on Board DC/DC Converters in Distributed Power Architectures for Telecom Applications,” Proceedings of the Fourteenth International Telecommunications Energy Conference, pp. 59-65 (1992).
Delta Electronics, Inc., “Delphi Series E48SB, 240W Eighth Brick Bus Converter DC/DC Power Modules: 48Vin, 12V/20A Out Datasheet,” 10 pages (2005).
Diaz, et al., “A New Family of Loss-Less Power MOSFET Drivers,” 3rd International Power Electronic Congress. Technical Proceedings. CIEP '94, pp. 43-48 (1994).
Diaz, et al., “A new lossless power MOSFET driver based on simple DC/DC converters,” Proceedings of PESC '95—Power Electronics Specialist Conference, pp. 37-43 (1995).
Diazzi & Gattavari, “80W-400W Monolithic Buck Regulators Integrated in Multipower BCD Technology,” High Frequency Power Conversion Conference Proceedings, pp. 212-226 (1988).
Dixon, “High Power Factor Preregulators for Off-Line Power Supplies,” Unitrode Corporation, 17 pages (2003).
Dwane, et al., “A Resonant High Side Gate Driver for Low Voltage Applications,” 2005 IEEE 36th Power Electronics Specialists Conference, pp. 1979-1985 (2005).
Ericsson, “Selection of Architecture for Systems using Bus Converters and POL Converters,” Design Note 023, 7 pages (2005).
Ericsson, “The Power Book—3rd Revised Edition (reduced version),” 127 pages (1996).
Farrington, et al., “Comparison of single-ended-parallel MRC and forward MRC,” Proceedings of the APEC '92 Seventh Annual Applied Power Electronics Conference and Exposition, pp. 203-210 (1992).
Feng, et al., “A hybrid strategy with Simplified Optimal Trajectory Control for LLC resonant converters,” Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition, pp. 1096-1103 (2012).
Ferencz, “A 250 W High Density Point-of-Load Converter,” S.B.E.E. Massachusetts Institute of Technology Thesis, 60 pages (1987).
Ferenczi, “Power Supplies, Part B: Switched-Mode Power Supplies,” Studies in Electrical and Electronic Engineering, pp. 352-558 (1987).
Ferreira, et al., “A Self Oscillating Bidirectional DC to DC Converter Employing Minimum Circuitry,” Third International Conference on Power Electronics and Variable-Speed Drives, pp. 125-129 (1988).
Firek & Kent, “Reduce Load Capacitance in Noise-Sensitive High-Transient Applications, through Implementation of Active Filtering,” VICOR PowerBench, 9 pages (2007).
Fisher, et al. “Performance of low loss synchronous rectifiers in a series-parallel resonant dc-dc converter,” Proceedings of the Fourth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 240-246 (1989).
Fisher, et al., “A 1 MHz, 100 W commercial, high-density point-of-load power supply using direct-bond copper and surface mount technologies,” Fifth Annual Proceedings on Applied Power Electronics Conference and Exposition, pp. 55-63 (1990).
Franz, “Multilevel Simulation Tools for Power Converters,” Fifth Annual Proceedings on Applied Power Electronics Conference and Exposition, pp. 629-633 (1990).
Fukumochi, et al., “Synchronous Rectifiers using New Structure MOSFET,” Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95, pp. 252-255 (1995).
Gachora, “Design of a Four-Phase Switchmode High Efficiency Power Supply,” Massachusetts Institute of Technology Thesis, 68 pages (1994).
Garcia, et al., “PCB Based Transformers for Multiple Output DC/DC Converters,” IV IEEE International Power Electronics Congress. Technical Proceedings. CIEP 95, pp. 51-55 (1995).
Garcia, et al., “Zero voltage switching in the PWM half bridge topology with complementary control and synchronous rectification,” Proceedings of PESC '95—Power Electronics Specialist Conference, pp. 286-291 (1995).
Gaudreau, et al., “Solid-State High Voltage, DC Power Distribution & Control,” Proceedings of the 1999 Particle Accelerator Conference, pp. 568-570 (1999).
Gegner, “High Power Factor AC-to-DC Converter Using a Reactive Shunt Regulator,” Proceedings of 1994 Power Electronics Specialist Conference—PESC'94, pp. 349-355 (1994).
Ghislanzoni, “Parallel Power Regulation of a Constant Frequency, ZV-ZC Switching Resonant Push-Pull,” Proceedings of the European Space Power Conference, pp. 191-198 (1991).
Gillett & Moorman, “Transistor Rectifier-Regulator,” IBM Technical Disclosure Bulletin 22(6), pp. 2319-2320 (1979).
Goodenough, “Building-block converters distribute power throughout large systems,” Electronic Design, Jan. 24, 1995, pp. 202-203 (1995).
Goodenough, “Power-Supply Rails Plummet and Proliferate,” Electronic Design Jul. 24, 1995, 4 pages (1995).
Gottlieb, “Power Control with Solid State Devices,” Reston Publishing Company, Inc., 191 pages (1985).
Gottlieb, “Power Supplies, Switching Regulators, Inverters and Converters, Second Editiion,” TAB Books, 242 pages (1985).
Graf, “Converter and Filter Circuits,” Butterworth-Heinemann, 98 pages (1997).
Grant & Gowar, “Power MOSFETS: Theory and Applications,” John Wiley & Sons, pp. 183-253 (1989).
Greenland & Davies, “A Two Chip Set Achieves Isolation Without Compromising Power Supply Performance,” Proceedings of The Power Electronics Show & Conference, pp. 390-395 (1986).
Greenland, “start:DPA developments: A reason for change in power conversion,” Power Management DesignLine, retrieved from http://www.powermanagmentdesignline.com/52200069, 4 pages (2004).
Greenland, “Trends in distributed-power architecture,” Hearst Electronics Group: Application Reference Materials, 5 pages (2004).
Grossman, “Power Module Lets Users Customize Supplies,” Electronic Design for Engineers and Engineering Managers—Worldwide, Jun. 25, 1981, p. 213 (1981).
Gutmann, “Application of RF Circuit Design Principles to Distributed Power Converters,” IEEE Transactions on Industrial Electronics and Control Instrumentation 27(3), pp. 156-164 (1980).
Hadjivassilev, et al., “Front-End Converter System for Distributed Power Supply,” Fifth European Conference on Power Electronics and Applications, pp. 221-226 (1993).
Hamo, “A 360W, Power Factor Corrected, Off-Line Power Supply, Using the HIP5500,” Intersil Intelligent Power No. AS9417, 6 pages (1994).
Harada, et al., “A novel ZVS-PWM half-bridge converter,” Proceedings of Intelec 94, pp. 588-593 (1994).
Harada, et al., “Analysis and design of ZVS-PWM half-bridge converter with secondary switches,” Proceedings of PESC '95—Power Electronics Specialist Conference, pp. 280-285 (1995).
Harper, et al., “Controlled Synchoronous Rectifier,” High Frequency Power Conversion Conference Proceedings, pp. 165-172 (1988).
Hartman, “System Designer's Introduction to Modular DC/DC Converters,” Proceedings of the Power Electronics Show & Conference, pp. 185-190 (1988).
Hartman, “System designer's guide to modular dc/dc converters,” Electronic Products 30(19), 7 pages (1998).
Heath, “The market for Distributed Power Systems,” Proceedings of APEC '91: Sixth Annual Applied Power Electronics Conference and Exhibition, pp. 225-229 (1991).
Hendrix, “The Evolution of Power Management and Conversion,” Power Systems Design Europe Mar. 2005, p. 10 (2005).
Higashi, et al., “On the cross-regulation of multi-output resonant converters,” PESC '88 Record., 19th Annual IEEE Power Electronics Specialists Conference, pp. 18-25 (1988).
Hsieh, et al., “A Study on Full-Bridge Zero-Voltage Switched PWM Converter: Design and Experimentation,” Proceedings of IECON '93—19th Annual Conference of IEEE Industrial Electronics, pp. 1281-1285 (1993).
Hua, et al., “Development of a DC Distributed Power System,” Proceedings of 1994 IEEE Applied Power Electronics Conference and Exposition—ASPEC'94, pp. 763-769 (1994).
Huang, “Coordination Design Issues in the Intermediate Bus Architecture,” DCDC Technical White Paper from Astec Power, 8 pages (2004).
Huillet, et al., “High Frequency Quasi-Resonant Buck Converter on Insulated Metal Substrate for Avionics Distributed Power Systems,” Proceedings of APEC '92: Seventh Annual Applied Power Electronics Conference and Exposition, pp. 647-653 (1992).
Huliehel, et al., “A New Design Approach for Distributed Power Systems,” VPEC, pp. 214-218 (1993).
Hunter, “Regulatory and Technological Trends in Power Supplies,” 1993 International Symposium on Electromagnetic Compatibility, pp. 10-15 (1993).
IBM “Cross-Coupled Gates Synchronous Rectifier,” IBM Technical Disclosure Bulletin 35(4A), pp. 462-463 (1992).
IEEE, “Bus,” IEEE Standard Dictionary of Electrical and Electronics Terms, Third Edition, ANSI/IEEE Std 100-1984, 2 pages (1984).
International Rectifier, “International Rectifier Introduces DC Bus Converter Chip Set Re-Defining Distributed Power Architecture for Networking and Communication Systems,” 3 pages (2003).
International Search Report for PCT/US1998/001498 dated Jul. 14, 1998, 4 pages.
Intersil, “Intersil's New PWM Controller Advances Power Conversion Performance for Telecom,” Business Wire, 3 pages (2004).
Ivensky, et al., “A Resonant DC-DC Transformer,” Proceedings of APEC '92: Seventh Annual Applied Power Electronics Conference and Exposition, pp. 731-737 (1992).
Jacobs & Kunzinger, “Distributed Power Architecture Concepts,” INTELEC '84—International Telecommunications Energy Conference, pp. 105-109 (1984).
Jamerson & Barker, “1500 Watt Magnetics Design Comparison: Parallel Forward Converter vs. Dual Forward Converter,” Technical Papers of the Fifth International High Frequency Power Conversion Conference, pp. 347-358 (1990).
Jamerson, “Post-Regulation Techniques for 100 KHz to 300 KHz Multiple-Output PWM Supplies (Limitations, Trends, and Predictions),” Technical Papers of the Fourth International High Frequency Power Conversion Conference, pp. 260-273 (1989).
Jensen, “An Improved Square-Wave Oscillator Circuit,” IRE Transactions on Circuit Theory 4(3), pp. 276-279 (1957).
Ji & Kim, “Active Clamp Forward Converter with MOSFET Synchronous Rectification,” Proceedings of 1994 Power Electronics Specialist Conference—PESC'94, pp. 895-901 (1994).
Jitaru & Cocina, “High efficiency DC-DC converter,” Proceedings of 1994 IEEE Applied Power Electronics Conference and Exposition—ASPEC'94, pp. 638-644, (1994).
Jitaru, “The Impact of Low Output Voltage Requirements on Power Converters,” Technical Papers of the Tenth International High Frequency Power Conversion Conference, pp. 1-10 (1995).
Jitaru, “Zero Voltage PWM, Double Ended Converter,” Technical Papers of the Seventh International High Frequency Power Conversion Conference, pp. 394-405 (1992).
Jovanovic, “Evaluation of Synchronous-Rectification Efficiency Improvement Limits in Forward Converters,” IEEE Transactions on Industrial Electronics 42(4), pp. 387-395 (1995).
Jovanovic, et al., “Design Considerations for Forward Converter with Synchronous Rectifiers,” Virginia Power Electronics Center 1993 Power Electronics Seminar, pp. 163-173 (1993).
Jovanovic, et al., “Distributed Power Systems—Benefits and Challenges,” International Journal of Electronics 77(5), pp. 601-612 (1994).
Kagan, et al., “Improving Power Supply Efficiency with MOSFET Synchronous Rectifiers,” Proceedings of Powercon 9: Ninth International Solid-State Power Electronics Conference, D-4, 6 pages (1982).
Kang & Upadhyay, “A Parallel Resonant Converter with Postregulators,” IEEE Transactions on Power Electronics 7(2), pp. 296-303 (1992).
Kassakian & Schlecht, “High-Frequency High-Density Converters for Distributed Power Supply Systems,” Proceedings of the IEEE 76(4), pp. 362-376 (1988).
Kassakian, et al., “Principles of Power Electronics,” Addison-Wesley Series in Electrical Engineering, pp. 576-581 (1991).
Kesarwani, et al., “Resonant-Switched Capacitor Converters for Chip-Scale Power Delivery: Design and Implementation,” IEEE Transactions on Power Electronics 30(12), pp. 6966-6977 (2015).
Kesarwani, et al., “Resonant switched-capacitor converters for chip-scale power delivery: Modeling and design,” 2013 IEEE 14th Workshop on Control and Modeling for Power Electronics (COMPEL), 7 pages (2013).
Kester & Erisman, “Section 3: Switching Regulators,” retrieved from https://www.analog.com/media/en/training-seminars/design-handbooks/Practical-Design-Techniques-Power-Thermal/Section3.pdf, 71 pages (2015).
Klapfish, “Trends in AC/DC Switching Power Supplies and DC/DC Converters,” Proceedings of the Eighth Annual Applied Power Electronics Conference and Exposition, pp. 361-365 (1993).
Kociecki, et al., “A High Power-Density DC-DC Converter Board,” Second Annual IEEE Applied Power Electronics Conference and Exposition, pp. 169-180 (1987).
Kollman & Chamberlin, “Processor Power Subsystem Architectures,” APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 1183-1189 (2000).
Korman, et al., “A Synchronous Rectifier for High-Density Power Supplies,” High Frequency Power Conversion Conference Proceedings, pp. 126-139 (1988).
Krauthamer, et al., “High Efficiency Synchronous Rectification in Spacecraft Power Systems,” Proceedings of the European Space Power Conference : Graz, Austria, pp. 1-5 (1993).
Krauthamer, et al., “State-of-the-Art of DC Components for Secondary Power Distribution on Space Station Freedom,” Fifth Annual IEEE Applied Power Electronics Conference and Exposition (1990).
Krein & Bass, “Autonomous Control Technique for High-Performance Switches,” IEEE Transactions on Industrial Electronics 39(3), pp. 215-222 (1992).
Lam, et al., “Revolutionary Advances in Distributed Power Systems,” Eighteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 30-36 (2003).
Langford-Smith, “Radiotron Designer's Handbook,” Wireless Press, pp. 1202-1222, 1496-1497 (1953).
Le, et al., “Design Techniques for Fully Integrated Switched-Capacitor DC-DC Converters,” IEEE Journal of Solid-State Circuits 46(9), pp. 2120-2131 (2011).
Lee & Boroyevich, “Center Overview and Highlights,” Center for Power Electronics Systems, 71 pages (2007).
Lee & Zhou, “Power Management Issues for Future Generation Microprocessors,” 11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings, pp. 27-33 (1999).
Lei, et al., “A General Method for Analyzing Resonant and Soft-Charging Operation of Switched-Capacitor Converters,” IEEE Transactions on Power Electronics 30(10), pp. 5650-5664 (2015).
Lei, et al., “Split-Phase Control: Achieving Complete Soft-Charging Operation of a Dickson Switched-Capacitor Converter,” IEEE Transactions on Power Electronics 31(1), pp. 770-782 (2016).
Lemnios, et al., “Low-Power Electronics,” IEEE Design & Test of Computers (11)(4), pp. 8-13 (1994).
Leu, et al, “A High-Frequency AC Bus Distributed Power System,” Virginia Power Electronics Center, 1990 Power Electronics Seminar, pp. 98-107 (1990).
Leu, et al., “Analysis and Design of R-C-D Clamp Forward Converter,” High Frequency Power Conversion Conference Proceedings, pp. 198-208 (1992).
Leung, “SPICE Simulation and Modeling of DC-DC Flyback Converter,” Massachusetts Institute of Technology Thesis, 65 pages (1995).
Lewis, et al., “Distributed Power System Analysis,” Final Report Prepared for IBM Corporation, Contract No. YA-261092, 138 pages (1989).
Lewis, et al., “Modeling, analysis and design of distributed power systems,” 20th Annual IEEE Power Electronics Specialists Conference, pp. 152-159 (1989).
Li, et al., “Lossless voltage regulation and control of the resonant switched-capacitor DC-DC converter,” 2015 IEEE 16th Workshop on Control and Modeling for Power Electronics (COMPEL), 7 pages (2015).
Liang, et al., “Design Considerations of Power MOSFET for High Frequency Synchronous Rectification,” IEEE Transactions on Power Electronics 101(3), pp. 388-395 (1995).
Lindman, “Powering Tomorrow's Data Internetworking Systems,” Ericsson Microelectronics, INTELEC. Twenty-Second International Telecommunications Energy Conference, pp. 506-511 (2000).
Lindman, et al., “Applying Distributed Power Modules in Telecom Systems,” IEEE Transactions on Power Electronics 11(2), pp. 365-373 (1996).
Lineage Power, “CBQ25 Series,” retrieved from http://www.lineagepower.com/oem/cbq25.html, 1 page (2010).
Lineage Power, “QSW025A0B Series Power Modules; DC-DC Converters; 36-75 Vdc Input; 12Vdc Output; 25A Output Current,” 16 pages (2009).
Lineage Power, “QUK240 Series Power Modules; DC-DC Converters; 36-75vDC Input; 12Vdc Output; 25A Output Current,” 16 pages (2009).
Linera, et al., “Closing the Feedback Loop in the Half-Bridge Complementary-Control DC-to-DC Converter,” Proceedings of APEC 97—Applied Power Electronics Conference, pp. 977-982 (1997).
Lingle, “Low Input Voltage D.C. to D.C. Converter, Final Report,” National Aeronautics and Space Administration, Contract No. NAS 5-3441, 118 pages (1984).
Lo & Henze, “Development of a DC-to-DC Power Converter for Distributed Power Processing,” Proceedings of the Fourth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 413-422 (1989).
Lo, “Cost Analysis of Powering an Optical Customer Access Network,” Intelec Fourteenth International Telecommunications Energy Conference, pp. 96-103 (1992).
Lo, et al., “A Compact DC-to-DC Power Converter for Distributed Power Processing,” IEEE Transactions on Power Electronics 7(4), pp. 714-724 (1992).
Lucent Technologies, “Data Sheet-NH020-Series Power SIPs: 5 Vdc input; 1.5Vdc Output; 20W,” Bell Labs Innovations Data Sheet, 20 pages (1999).
Lucent Technologies, “HW100f and HW100A Power Modules: dc-dc Converters; 36 Vdc to 75 Vdc, 3.3 Vdc or 5 Vdc Output; 100W,” Bell Labs Innovations Data Sheet, 16 pages (1999).
Lukasik, “Driving Today's Power Systems,” Power Technology: A Special Supplement to EDN, Part Two: Power System Architectures, pp. P13-P18 (2004).
Maksimovic, “A Mos Gate Drive with Resonant Transitions,” PESC '91 Record 22nd Annual IEEE Power Electronics Specialists Conference, pp. 527-532 (1991).
Malik, “The Power System Challenge—Understanding the Total Picture,” Eighteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 202-208 (2003).
Mammano, “Distributed Power Systems,” Unitrode Corporation Seminar 900, Topic 1, pp. 1-1-1-12 (1993).
Mammano, “Fueling the Megaprocessors—Empowering Dynamic Energy Management,” Unitrode Power Design Seminar, SEM1100 Topic 1, 25 pages (1996).
Mammano, “Isolating the Control Loop,” Unitrode Power Supply Design Seminar 700, Topic 2, pp. 2-1-2-16 (1990).
Mankikar, “Power Electronics Industry Newsletter,” Power Electronics Industry News, Issue 91, 20 pages (2002).
Mannion, “New Challenges Place Power Squarely in the Spotlight,” Electronic Design, Nov. 3, 1997, 8 pages (1997).
Marchetti, “Make a noise for DC-DC converters,” Electronic Product Design & Test, retrieved from http://www.epdtonthenet.net/article/17812/Make-a-noise-for-DC-DC-converters.aspx, 2 pages (2008).
Marchetti, “Power Systems Architectures What's In? What's Out?,” Battery Power Products & Technology,, 2 pages (2003).
Matsuo, “Comparison of Multiple-Output DC-DC Converters using Cross Regulation,” 1979 IEEE Power Electronics Specialists Conference, pp. 169-185 (1979).
Maxim, “Power Supplies for Telecom Systems,” Maxim Integrated Products Application Note 280, retrieved from http://www.maxim-ic.com/an280, 15 pages (2000).
Maxim, “Synchronous Rectification Aids Low-Voltage Power Supplies,” Maxim Integrated Products Application Note 625, retrieved from http://www.maxim-ic.com/appnotes.cfm/an_pk/652, 8 pages (2001).
MC-Service, “Service Manual for Sony DCR-VX1000/VX1000E RMT-803 Sony Digital Video Camera Recorder,” with the following supplements: “DCR-VX 1000/VX 1000E RMT-803, Service Manual, Supplement-3: Electrical Part Changed,” “DCR-VX 1000/VX 1000E RMT-803, Service Manual, Supplement-2: Addition for Bist Check,” “DCR-VX 1000/VXI000E RMT-803, Service Manual, Supplement-2: Addition for Bist Check,” “DCR-VX 1000/VX 1000E RMT-803, Service Manual, Supplement-1,” “DV Mechanical Adjustment Manual 1,” 150 page.
McHale, “Complex military systems require efficient power electronics,” Military Embedded Systems, retrieved from http://mil-embedded.com/articles/complex-efficient-power-electronics/, 6 pages (2013).
Micro Linear, “Battery Power Control 1C General Description and Features,” Data Sheet ML4873, 1 page (1997).
Micro Linear, “Battery Power Control IC,” Advanced Data Sheet ML4873, 9 pages (1993).
Miftakhutdinov, “Improving System Efficiency with a New Intermediate-Bus Architecture,” Texas Instruments Seminar, Topic 4, 20 pages (2009).
Miles, et al., “Market Trends Toward Enhanced Control of Electronic Power Systems,” Proceedings of the Eighth Annual Applied Power Electronics Conference and Exposition, pp. 92-98 (1993).
Miwa, “Hybrid Construction of a 10MHz DC-DC Converter for Distributed Power Systems,” Massachusetts Institute of Technology Thesis, 63 pages (1989).
Miwa, “Interleaved Conversion Techniques for High Density Power Supplies,” Massachusetts Institute of Technology Thesis, 97 pages (1992).
Miwa, et al., “Copper-Based Hybrid Fabrication of a 50W, 5 MHz 40V-5V DC/DC Converter,” Proceedings of the Fourth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 256-264 (1989).
Miwa, et al., “High Efficiency Power Factor Correction Using Interleaving Techniques,” Proceedings of APEC '92: Seventh Annual Applied Power Electronics Conference and Exposition, pp. 557-568 (1992).
Mohandes, “MOSFET Synchronous Rectifiers Achieve 90% Efficiency—Part I,” Power Conversion & Intelligent Motion, pp. 10-13 (1991).
Mohandes, “MOSFET Synchronous Rectifiers Achieve 90% Efficiency—Part II,” Power Conversion & Intelligent Motion, pp. 55-61 (1991).
Moore, “Step-Up/Step-Down Converters Power Small Portable Systems,” EDN Magazine, pp. 79-84 (1994).
Moore, “Synchronous rectification aids low-voltage power supplies,” EDN Access, retrieved from http://www.edn.eom/archives/1995/042795/09dF4.htm, 7 pages (1995).
Morrison, “Bus Converters Push Power Levels Higher,” Electronic Design, retrieved from https://www.electronicdesign.com/content/article/21188217/bus-converters-push-power-levels-higher, 7 pages (2005).
Morrison, “Distributed Power Moves To Intermediate Bus Voltage,” Electronic Design 50(19), pp. 55-62 (2002).
Morrison, “Sine Amplitude Converters: A New Class of Topologies for DC-DC Conversion.” Electronic Design, retrieved from http://electronicdesign.com/energy/sine-amplitude-converters-new-class-topologies-dc-dc-conversion, 5 pages (2003).
Motto, “Introduction to Solid State Power Electronics,” Powerex, Inc., 111 pages (1997).
MPS, “DN0004: 3A Point of Load Power Supplies—MP1570 Design Note,” 6 pages (2005).
Mullett, “Practical Design of Small Distributed Power Systems,” Power Conversion & Intelligent Motion, pp. 21-27 (1991).
Mullett, “The Role of the Power Source In System Design,” Proceedings of the Power Sources Users Conference, 9 pages (1985).
Murakami, et al., “A high-efficiency 30 W board mounted power supply module,” Proceedings of the Thirteenth International Telecommunications Energy Conference—INTELEC 91, pp. 122-127 (1991).
Murakami, et al., “A Highly Efficient Low-Profile 300-W Power-Pack for Telecommunications Sytems,” Proceedings of 1994 IEEE Applied Power Electronics Conference and Exposition—ASPEC'94, pp. 786-792 (1994).
Murakami, et al., “A Simple and Efficient Synchronous Rectifier for Forward DC-DC Converters,” Proceedings of the Eighth Annual Applied Power Electronics Conference and Exposition, pp. 463-468 (1993).
Murata Power Solutions, “EUS34-096 Isolated Bus Converter Datasheet,” 3 pages (2008).
Mweene & Ashley, “Communications System Power Supply Designs,” Texas Instruments Literature No. SNVA569, 6 pages (2011).
Mweene, “The Design of Front-End DC-DC Converters of Distributed Power Supply Systems with Improved Efficiency and Stability,” Massachusetts Institute of Technology Thesis, 184 pages (1992).
Mweene, et al., “A 1 kW, 500 kHz Front-end Converter for Distributed Power Supply System,” Proceedings of the Fourth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 423-432 (1989).
Mweene, et al., “A high-efficiency 1.5 kW, 390-50 V half-bridge converter operated at 100% duty-ratio,” Proceedings of APEC '92: Seventh Annual Applied Power Electronics Conference and Exposition, pp. 723-730 (1992).
Narveson & Harris, “Power-Management Solutions for Telecom Systems Improve Performance, Cost, and Size,” Texas Instruments Incorporated Analog Applications Journal 3Q 2007, pp. 10-13 (2007).
Narveson & Jones, “Why the Market is Ready for a Non-Isolated DC/DC Power Module Standard,” Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 335-341 (2004).
Narveson, “How Many Isolated DC-DC's Do you Really Need?,” Proceedings of Applied Power Electronics Conference. APEC '96, pp. 692-695 (1996).
Narveson, “What is the Right Bus Voltage?,” APEC '98: Thirteenth Annual Applied Power Electronics Conference and Exposition, pp. 883-888 (1998).
Newhart, “Product Report on DC-DC Converters,” Electronic Design 34(21), pp. 169-170 (1986).
Niemela, et al., “Comparison of GaAs and Silicon Synchronous Rectifiers in a 3.3V Out, 50W DC-DC Converter,” PESC Record. 27th Annual IEEE Power Electronics Specialists Conference, pp. 861-867 (1996).
Nochi, et al., “Full-Wave Current Resonant Multi-Output Converters,” 21st Annual IEEE Conference on Power Electronics Specialists, pp. 528-535 (1990).
Office Action for U.S. Appl. No. 13/947,893 dated Nov. 21, 2014, 5 pages.
Ollero, et al., “New Post-Regulation and Protection Methods for Multiple Output Power Converters With Synchronous Rectification,” Proceedings of Intelec'96—International Telecommunications Energy Conference, pp. 462-469 (1996).
Oraw & Ayyanar, “Load adaptive, high efficiency, switched capacitor intermediate bus converter,” INTELEC 07—29th International Telecommunications Energy Conference, pp. 628-635 (2007).
Osifchin, et al., “Evolving Central-Office Powering Architecture,” Fifth International Telecommunications Energy Conference, pp. 1-5 (1983).
P.R. Mallory & Co, Inc., “Fundamental Principles of Vibrator Power Supply Design,” pp. 9-21, 23-31, 33-47, 49-105, 107-129, 131-135 (1947).
Pagotto, “Distributed Power Supplies, Course Notes for a Seminar Presented During the Power Electronics Conference '90,” The Power Electronics Conference, pp. 175-185 (1990).
Panov & Jovanovic, “Design and Performance Evaluation of Low-Voltage/High-Current DC/DC OnBoard Modules,” Fourteen Annual Applied Power Electronics Conference and Exposition, pp. 545-552 (1999).
Pedersen, “Low Voltage High Efficiency Power Conversion,” Proceedings of the Fifth European Space Power Conference, pp. 51-56 (1998).
Pepper, “A New High Efficiency Post-Regulation Technique for Multiple Output Converters,” Ninth International Solid-State Power Electronics Conference, 10 pages (1982).
Perkinson, “UPS Systems—A Review,” Third Annual IEEE Applied Power Electronics Conference and Exposition, pp. 151-154 (1988).
Peterson & Saint-Pierre, “A Half Bridge, Self-Oscillating, Multi-Resonant Converter Circuit,” Proceedings of the Eighth Annual Applied Power Electronics Conference and Exposition, pp. 77-84 (1993).
Power One Inc, “Form 10-K (Annual Report): Filed Mar. 12, 2004 for the Period Ending Dec. 31, 2003,” Securities and Exchange Commission, 65 pages (2004).
Power One, “SQT54T38096 DC-DC Converter Preliminary Data Sheet,” 12 pages (2007).
Pressman, “Chapter 3—Building Block Assembly of Compound Regulating Systems,” Switching and Linear Power Supply, Power Converter Design, pp. 74-104 (1977).
Pressman, “Switching and Linear Power Supply, Power Converter Design,” Hayden Book Co., 391 pages (1977).
Qian, “Advance Single-Stage Power Factor Correction Techniques,” Virginia Polytechnic Institute and State University Thesis, 185 pages (1997).
Ratajczak, “Linear/Switching Supply Isolates, Holds Down Noise,” Electronic Design 25, p. 156 (1979).
Ren, “High frequency, high efficiency two-stage approach for future microprocessors,” Virginia Polytechnic Institute and State University thesis, 185 pages (2005).
Ren, et al., “A family of high power density unregulated bus converters,” IEEE Transactions on Power Electronics 20(5), pp. 1045-1054 (2005).
Ren, et al., “Two-Stage 48V Power Pod Exploration for 64-Bit Microprocessor,” Eighteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 426-431 (2003).
Ren, et al., “Two-Stage Approach for 12V VR,” Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 1306-1312 (2004).
Renauer, “Challenges in Powering High Performance Low Voltage Processors,” Eleventh Annual Applied Power Electronics Conference and Exposition, pp. 977-983 (1996).
Rittenhouse, et al., “A Low-Voltage Power MOSFET With a Fast-Recovery Body Diode for Synchronous Rectification,” 21st Annual IEEE Conference on Power Electronics Specialists, pp. 96-106 (1990).
Roddam, “Transistor Inverters and Converters, Chapters 7-11,” D. Van Nostrand Company, pp. 116-204 (1963).
Roddam, “Transistor Inverters and Converters,” London Life Books Ltd., 122 pages (1963).
Rodriguez, “Voltage Conversion and Regulation Techniques Employed in the Prime Converter for the Anchored Interplanetary Monitoring Platform (AIMP) Spacecraft,” Supplement to IEEE Transactions on Aerospace and Electronics Systems AES-2(6), pp. 466-476 (1966).
Rostek, “Power System Design for Massive Parallel Computer Systems,” Ninth Annual Applied Power Electronics Conference and Exposition, pp. 808-814 (1994).
Rozman & Fellhoelter, “Circuit Considerations for Fast, Sensitive Low-Voltage Loads in a Distributed Power System,” 1 Proceedings of 1995 IEEE Applied Power Electronics Conference and Exposition—APEC'95, pp. 34-42 (1995).
Rutledge, “Distributed Power ‘Time for a Second Look,’” INTELEC '86—International Telecommunications Energy Conference, pp. 369-375 (1986).
Sabolis, “Bus Converters Aim to Boost Efficiency In IBA-Based Power Designs,” DATEL Application Note, 6 pages (2003).
Sakai & Harada, “A New Synchronous Rectifier Using Bipolar Transistor Driven by Current Transformer,” Proceedings of the Fourteenth International Telecommunications Energy Conference—INTELEC '92, pp. 424-429 (1992).
Sakai & Harada, “Synchronous Rectifier for Low Voltage Switching Converter,” Proceedings of INTELEC 95. 17th International Telecommunications Energy Conference, pp. 471-475 (1995).
Sakai, et al., “MOSFET synchronous rectifier with saturable transformer commutation for high frequency converters,” Proceedings of IEEE Power Electronics Specialist Conference—PESC '93, pp. 1024-1031 (1993).
Salato, “The Sine Amplitude Converter Topology Provides Superior Efficiency and Power Density in Intermediate Bus Architecture Applications,” Vicor White Paper, 7 pages (2011).
Sampson, et al., “Energy Systems Meeting the Requirements for Distributed Telecommunications Systems,” Trends in Telecommunications 8(3), pp. 24-32 (n.d.).
Sanders, et al., “The Road to Fully Integrated DC-DC Conversion via the Switched-Capacitor Approach,” IEEE Transactions on Power Electronics 28(9), pp. 4146-4155 (2013).
Sano & Fujita, “Performance of a High-Efficiency Switched-Capacitor-Based Resonant Converter With Phase-Shift Control,” IEEE Transactions on Power Electronics 26(2), pp. 344-354 (2011).
Sayani & Wanes, “Analyzing and determining optimum on-board power architectures for 48 V-input systems,” Eighteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 781-785 (2003).
Schlecht, “Choosing an On-Board Power Architecture,” Power Technology: A Special Supplement to EDN, Part Two: Power System Architectures, pp. P28-P30 (2004).
Schlecht, “Research Results from the Study of A High Efficiency Highly Manufacturable DC-DC Converter,” MIT to IBM Report, 32 pages (n.d.).
Schlect, “The Fundamentals of Switching Regulators and Their Control Circuits,” 35 pages (2010).
Schulz, “System Interactions And Design Considerations For Distributed Power Systems,” Virginal Polytechnic Institute & State University Thesis, 82 pages (1991).
Schulz, et al., “Design Considerations for a Distributed Power System,” 21st Annual IEEE Conference on Power Electronics Specialists, pp. 611-617 (1990).
Schulz, et al., “Integrating a Series of High-Density Converters,” PowerTechnics Magazine, pp. 32-37 (1990).
Schwarz, “A Controllable DC Transformer,” IEEE Transactions on Magnetics 6(3), pp. 657-658 (1970).
Sebastian, el al., “An Overall Study of the Half-Bridge Complementary-Control DC-to-DC Converter,” Proceedings of PESC '95—Power Electronics Specialist Conference, pp. 1229-1235 (1995).
Sebastian, et al., “A Complete Study of the Double Forward-Flyback Converter,” PESC '88 Record, 19th Annual IEEE Power Electronics Specialists Conference, pp. 142-149 (1988).
Sebastian, et al., “A Study of the Two-Input DC-to-DC Switching Post-Regulators,” V IEEE International Power Electronics Congress Technical Proceedings, CIEP 96, pp. 35-45 (1996).
Sebastian, et al., “Average-Current-Mode Control of Two-Input Buck Postregulators Used in Power-Factor Correctors,” IEEE Transactions on Industrial Electronics 46(3), pp. 569-576 (1999).
Sebastian, et al., “Input Current Shaper Based on the Series Connection of a Voltage Source and Loss-Free Resistor,” APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition, pp. 461-467 (1998).
Sebastian, et al., “Small-Signal Modeling Of The Half-Bridge Complementary-Control DC-to-DC Converter,” IV IEEE International Power Electronics Congress. Technical Proceedings. CIEP 95, pp. 44-50 (1995).
Sebastian, et al., “Very Efficient Two-Input DC-to-DC Switching Post-Regulators,” PESC Record, 27th Annual IEEE Power Electronics Specialists Conference, pp. 874-880 (1996).
Seeman, et al., “Analysis and Optimization of Switched-Capacitor DC-DC Converters,” IEEE Transactions on Power Electronics 23(2), pp. 841-851 (2008).
Severns & Bloom, “Modern DC-To-DC Switchmode Power Converter Circuits,” Van Nostrand Reinhold Company, 179 pages (1985).
Severns, “Switchmode Converter Topologies—Make Them Work for You!”, Intersil Inc. Application Bulletin A035, 32 pages (1980).
Severns, “The Power MOSFET As A Rectifier,” Power Conversion International, pp. 49-50 (1980).
SGS-Thomson, “Designing with the L296 Monolithic Power Switching Regulator,” SGS-Thomson Microelectronics Application Note, 43 pages (1996).
Shepard, “Power Supplies,” Reston Publishing Company, pp. 32-37 (1984).
Shi & Brockschmidt, “Fault Tolerant Distributed Power,” Proceedings of Applied Power Electronics Conference—APEC '96, pp. 671-677 (1996).
Shoyama & Harada, “Zero-Voltage-Switching by Magnetizing Current of Transformer in Push-Pull DC-DC Converter,” Proceedings of the Thirteenth International Telecommunications Energy Conference—INTELEC 91, pp. 640-647 (1991).
Slurzberg & Osterheld, “Essentials of Radio-electronics,” McGraw-Hill, pp. 358-362 & 623-624 (1961).
Small Services, Inc., “Who We Are,” retrieved from http://www.smallservices.net/, 8 pages (2009).
Smith, “Benefits of the DC Bus Converter in Distributed Power Architectures for Networking & Communications Systems,” International Rectifier, 8 pages (2004).
Smith, “Distributed Power Systems Via ASICs Using SMT,” Surface Mount Technology, pp. 29-32 (1990).
Steigerwald, “High Density Power for Low Voltage Pulsed Loads,” Proceedings of the Eighth Annual Applied Power Electronics Conference and Exposition, pp. 37-43 (1993).
Steigerwald, et al., “Investigation of Power Distribution Architectures for Distributed Avionics Loads,” PESC95 Record, vol. 1, 26th Annual IEEE Power Electronics Specialists Conference, 9 pages (1995).
Sun, et al., “Forward Converter Regulator Using Controlled Transformer,” IEEE Transactions on Power Electronics 11(2), pp. 356-364 (1996).
Suryani, “Bus Voltage Level Comparisons for Distributed Power Architectures,” Power Conversion & Intelligent Motion, pp. 10-18 (1995).
Suryani, “The Value of Distributed Power,” Proceedings of 1995 IEEE Applied Power Electronics Conference and Exposition—APEC'95, pp. 104-110 (1995).
SynQor, “16A Non-Isolated DC/DC Converter in SMT package,” SynQor Inc. Technical Specification, Product# NQ12xxxSMA16, 16 pages (2004).
SynQor, “16A Non-Isolated, SMT DC/DC Converter with Wide Trim,” SynQor Inc. Technical Specification, Product #NQ12T5OSMA16, 15 pages (2004).
SynQor, “16Amp, Wide Output Range, Non-Isolated DC/DC Converter,” SynQor Inc. Technical Specification, Product # 1Q04T33VMA16, 20 pages (2004).
SynQor, “BusQor Bus Converter BQ50120QTA20,” SynQor Inc. Technical Specification, 12 pages (2006).
SynQor, “IBA vs. DPA: What to Consider When Choosing an On-Board Power Architecture,” A Technical White Paper by SynQor Inc., 4 pages (n.d.).
SynQor, “SynQor—Advancing the Power Curve,” SynQor Inc., 24 pages (2003).
SynQor, “SynQor High Efficiency DC/DC Converters,” SynQor Inc., 24 pages (2003).
SynQor, “SynQor Introduces 1.2V output Module for60A series of Half-Brick DC/DC Converters,” SynQor, Inc. Press Release, 1 page (2002).
SynQor, “SynQor Introduces Wide-Input, Point-of-Load DC/DC Converters,” SynQor, Inc. Press Release, 1 page (2004).
SynQor, “SynQor's Bus Converter Delivers 240 Watts in Quarter-Brick,” SynQor, Inc. Press Release, 1 page (2002).
SynQor, “The PowerQor Series of DC/DC Converters,” SnyQor Inc., 6 pages (n.d.).
SynQor, “BusQor Series,” retrieved from http://web.archive.org/web/20020814221649/http://www.synqor.com/products/busqor_qb.html, 2 pages, (2002).
SynQor, “Technology Overview,” retrieved from http://web.archive.org/web/20020208055450/http://www.synqor.com/products/2_2_tech_overview.html, 6 pages (2002).
Tabisz, et al., “A MOSFET Resonant Synchronous Rectifier for High-Frequency DC/DC Converters,” 21st Annual IEEE Conference on Power Electronics Specialists, pp. 769-779 (1990).
Tabisz, et al., “Present and future of distributed power systems,” Proceedings of APEC '92 Seventh Annual Applied Power Electronics Conference and Exposition, pp. 11-18 (1992).
Takagi, et al., “Ultra High Efficiency of 95% for DC/DC Converter—Considering Theoretical Limitation of Efficiency,” Seventeenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 735-741 (2002).
Tam & Yang, “Functional Models for Space Power Electronic Circuits,” IEEE Transactions on Aerospace and Electronic Systems 31(1), pp. 288-296 (1995).
Taylor, “Distributed Power Processing: The Systems Solution,” INTELEC '83—Fifth International Telecommunications Energy Conference, pp. 310-314 (1983).
TDK Innoveta Inc. & TDK Corporation, “Stability Analysis of Bus Architecture,” 2004 IBM Power Technology Symposium, 24 pages (2004).
Tektronix, “AA 501 Distortion Analyzer with Options—Instruction Manual,” Tektronix, Inc., 161 pages (1981).
Tektronix, “PS5004 Precision Power Supply—Instruction Manual,” Tektronix, Inc., 142 pages (1986).
Tektronix, “TM 5003 Power Module—Instruction Manual,” Tektronix, Inc., 73 pages (1981).
Tektronix, “TM 503 Power Module—Instruction Manual,” Tektronix, Inc., 59 pages (1984).
Texas Instruments, “TI Unveils Next-Generation Point-of-Load Power Modules with Ultra-Fast Transient Response,” retrieved from http://newscenter.ti.com/Blogs/newsroom/archive/2005/11/07/ti-unveils-next-generation-point-of-load-power-modules-with-ultra-fast-transient-response-sc05226.aspx, 2 pages (2005).
Theron, et al., “Soft Switching Self-Oscillating FET-Based DC-DC Converters,” PESC '92 Record. 23rd Annual IEEE Power Electronics Specialists Conference, pp. 641-648 (1992).
Thollot, et al., “Power Electronics Technology and Applications 1993,” IEEE Technology Update Series, pp. 13-22, 196-203, 207-209, 211-217, 259-302 (1993).
Thorsell, “Mini DC-DC Supplies Simplify Redundancy in Parallel Systems,” Academic OneFiley, Gale Document No. A6321372, 4 pages (1988).
Thorsell, “Will Distributed On-Board DC/DC Converters Become Economically Beneficial in Telecom Switching Equipment,” 12th International Conference on Telecommunications Energy, pp. 63-69 (1990).
Tokai Corp. v. Eastern Enterprises, Inc., 632 F.3d 1358 (Fed. Cir. 2011), 39 pages.
Traister, “Voltage Regulator Circuit Manual,” Academic Press, Inc., 77 pages (1989).
Trial Testimony Transcript of Dec. 14, 2010, AM Session, SynQor, Inc. v. Artesyn Technologies, et al., Case No. 2:07-CV-479, 51 pages.
Tsai & Ng, “A Low-Cost, Low-Loss Active Voltage-Clamp Circuit for Interleaved Single-Ended Forward PWM Converter,” Proceedings of the Eighth Annual Applied Power Electronics Conference and Exposition, pp. 729-733 (1993).
Uceda & Cobos, “Supplying Power at Low Voltage (3.3V),” Proceedings of First International Caracas Conference on Devices, Circuits and Systems, pp. 244-251 (1995).
Unitrode, “Switching Regulated Power Supply Design Seminar,” Unitrode Corporation, 134 pages (1993).
Unknown, “Chapter II: Inverters and Converters,” and “Chapter III, Regulated Power Supplies,” pp. 2-1-2-65 and 3-1-3-31, (n.d.).
Vazquez, et al., “A Systematic Approach to Select Distributed, Centralised or Mixed Power Architecture in Telecom Applications,” INTELEC—Twentieth International Telecommunications Energy Conference, pp. 129-136 (1998).
Vazquez, et al., “Fixed Frequency Forward-Flyback Converter with Two Fully Regulated Outputs,” Proceedings of INTELEC 95—17th International Telecommunications Energy Conference, pp. 161-166 (1995).
Vicor Powerblog, “Background to Factorized Power Architecture,” Vicor Corporation, retrieved from http://powerblog.vicorpower.com/2011/11/background-to-factorized-power-architecture, 4 pages (2016).
Vicor Powerblog, “Build Small, Lighter Power Systems by Eliminating Bulk Capacitance,” Vicor Corporation, retrieved from http://powerblog.vicorpower.com/2015/10/build-small-lighter-power-systems-eliminating-bulk-capacitance/, 3 pages (2015).
Vinciarelli, “Factorized Power Architecture & VI Chips—Power Paradigm of the Future?” Vicor Corporation Webcast, partial transcript, retrieved from http://cdn.vicorpower.com/documents/webcasts/fp_webcast.swf on May 23, 2016, 2 pages.
Vithanage, et al., “150W Board Mounted Power Supply Module Using Highly Compact and Efficient Synchronous Rectifiers,” APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition, pp. 177-183 .(1998).
Vlatkovic, et al., “Small-Signal Analysis of the Phase-Shifted PWM Converter,” IEEE Transactions on Power Electronics 7(1), pp. 128-135 (1992).
Watson, “New Techniques in the Design of Distributed Power Systems,” Virginia Polytechnic Institute and State University Thesis, 12 pages (1998).
Weinberg & Ghislanzoni, “A New Zero Voltage and Zero Current Power-Switching Technique,” IEEE Transactions on Power Electronics 7(4), pp. 655-665 (1992).
Weinberg, “A Novel Lossless Resonant MOSFET Driver,” PESC '92 Record. 23rd Annual IEEE Power Electronics Specialists Conference, pp. 1003-1010 (1992).
White & Miles, “Principles of Fault Tolerance,” Proceedings of Applied Power Electronics Conference—APEC '96, pp. 18-25 (1996).
White, “Emerging on-board power architectures,” Eighteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 799-804 (2003).
Wiegman, “A Resonant Pulse Gate Drive For High Frequency Applications,” Proceedings of APEC '92 Seventh Annual Applied Power Electronics Conference and Exposition, pp. 738-743 (1992).
Wiegman, et al., “A Dual Active Bridge SMPS Using Synchronous Rectifiers,” High Frequency Power Conversion Conference Proceedings, pp. 336-346 (1990).
Wildrick, “Stability of Distributed Power Supply Systems,” Virginia Polytechnic Institute and State University Thesis, 97 pages (1993).
Wildrick, et al., “A Method of Defining the Load Impedance Specification for a Stable Distributed Power System,” IEEE Transactions on Power Electronics 10(3), pp. 280-285 (1995).
Xi, et al., “A Precisely Regulated Multiple Output Forward Converter Topology,” Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition, pp. 986-992 (2000).
Xi, et al., “A Zero Voltage Switching and Self-Reset Forward Converter Topology,” APEC '99—Fourteenth Annual Applied Power Electronics Conference and Exposition, pp. 827-833 (1999).
Xi, et al., “An Improved Technique for the Synchronous Rectifier Mosfets in the Forward Converter Topology,” CCECE '97—Canadian Conference on Electrical and Computer Engineering. Engineering Innovation: Voyage of Discovery, pp. (1997).
Xi, et al., “The Point of Use DC/DC Power Distribution: The Architecture and an Implementation,” INTELEC. Twenty-Second International Telecommunications Energy Conference, pp. 498-505 (2000).
Xiao & Oruganti, “Soft Switched PWM DC/DC Converter With Synchronous Rectifiers,” Proceedings of Intelec'96—International Telecommunications Energy Conference, pp. 476-484 (1996).
Xuefei, et al., “Studies of Self-Driven Synchronous Rectification in Low Voltage Power Conversion,” Proceedings of the IEEE 1999 International Conference on Power Electronics and Drive Systems, pp. 212-217 (1999).
Yang, et al., “A New Dual Channel Resonant Gate Drive Circuit For Synchronous Rectifiers,” Twenty-First Annual IEEE Applied Power Electronics Conference and Exposition, pp. 756-762 (2006).
Yang, et al., “Isolated Boost Circuit for Power Factor Correction,” The VPEC Annual Power Electronics Seminar, pp. 97-104 (1992).
Yee, et al., “A Self-Driven Synchronous Rectifier,” Proceedings of 1994 Power Electronics Specialist Conference—PESC'94, pp. 627-633 (1994).
Yeung, et al., “Generalised analysis of switched-capacitor step-down quasi-resonant converter,” Electronics Letters 38(6), pp. 263-264 (2002).
Yeung, et al., “Zero-current switching switched-capacitor quasiresonant step-down converter,” IEE Proceedings—Electric Power Applications 149(2), pp. 111-121 (2002).
Yoshida, et al., “A Novel Zero Voltage Switching Half Bridge Converter,” Proceedings of Intelec 94, pp. 566-572 (1994).
Yoshida, et al., “Zero Voltage Switching Approach For Flyback Converter,” Proceedings of the Fourteenth International Telecommunications Energy Conference—INTELEC '92, pp. 324-329 (1992).
Zhang, et al., “Analysis and Evaluation of Interleaving Techniques in Forward Converters,” IEEE Transactions on Power Electronics 13(4), pp. 690-698 (1998).
Zhang, et al., “Commutation Analysis of Self-Driven Synchronous Rectifiers in an Active-Clamp Forward Converter,” 27th Annual IEEE Power Electronics Specialists Conference, pp. 868-873 (1996).
Zhang, et al., “Design Considerations and Performance Evaluations of Synchronous Rectification in Flyback Converters,” Proceedings of APEC 97—Applied Power Electronics Conference, pp. 623-630 (1997).
Zhang, et al., “Design considerations for low-voltage on-board DC/DC modules for next generations of data processing circuits,” IEEE Transactions on Power Electronics 11(2), pp. 328-337 (1996).
Zhou, et al., “A Novel High-input-voltage, High Efficiency and Fast Transient Voltage Regulator Module—Push-pull Forward Converter,” APEC '99—Fourteenth Annual Applied Power Electronics Conference and Exposition, pp. 279-283 (1999).
Zhou, et al., “Investigation of Candidate VRM Topologies for Future Microprocessors,” Thirteenth Annual Applied Power Electronics Conference and Exposition, pp. 145-150 (1988).
Zhao, et al., “Analysis of High Efficiency DC/DC Converter Processing Partial Input/Output Power,” Department of Electrical and Computer Engineering University of Wisconsin-Madison Madison, Wisconsin, U.S.A., 2013.
Related Publications (1)
Number Date Country
20220052609 A1 Feb 2022 US
Continuations (3)
Number Date Country
Parent 16781070 Feb 2020 US
Child 17385384 US
Parent 16022636 Jun 2018 US
Child 16781070 US
Parent 13933252 Jul 2013 US
Child 16022636 US