Claims
- 1. A signal processing circuit, comprising:an nth order distortion filter in a feedback loop, n being greater than one; an amplifier in the feedback loop coupled to the distortion filter, the amplifier employing one of a plurality of power supply voltages for each of a plurality of output signal ranges, the amplifier introducing nonlinearities into the feedback loop related at least in part to switching between the power supply voltages; and at least one linear, continuous-time feedback path from the amplifier to the distortion filter, the at least one continuous-time feedback path facilitating correction of the nonlinearities.
- 2. The signal processing circuit of claim 1 wherein the distortion filter comprises a plurality of integrator stages.
- 3. The signal processing circuit of claim 2 wherein the distortion filter comprises 2 integrator stages.
- 4. The signal processing circuit of claim 2 wherein the distortion filter comprises 3 integrator stages.
- 5. The signal processing circuit of claim 2 wherein the distortion filter comprises a Butterworth filter.
- 6. The signal processing circuit of claim 1 wherein the distortion filter comprises a plurality of resonator stages.
- 7. The signal processing circuit of claim 1 wherein the amplifier comprises a class G amplifier.
- 8. The signal processing circuit of claim 1 wherein the at least one continuous-time feedback path comprises a plurality of feedback elements which determine a coefficient for each of a plurality of stages of the distortion filter.
- 9. The signal processing circuit of claim 1 wherein the at least one continuous-time feedback path comprises scaling elements.
- 10. The signal processing circuit of claim 1 wherein the amplifier comprises an input terminal and an output terminal, and wherein the at least one continuous-time feedback path includes a first feedback path from the output terminal to the input terminal.
- 11. A line driver for a digital subscriber line comprising the signal processing circuit of claim 1.
- 12. The line driver of claim 11 wherein the digital subscriber line comprises an ADSL line.
- 13. A method for driving a digital subscriber line comprising driving the digital subscriber line using the signal processing circuit of claim 1.
- 14. An audio amplifier comprising the signal processing circuit of claim 1.
- 15. A method for processing a first signal using an amplifier which employs one of a plurality of power supply voltages for each of a plurality of output signal ranges, the amplifier introducing nonlinearities into the feedback loop related at least in part to switching between the power supply voltages, the method comprising:receiving the first signal with an nth order distortion filter where n is greater than one, and generating a filtered signal in response thereto; receiving the filtered signal from the frequency selective network with amplifier and generating a second signal in response thereto; and feeding the second signal back to the distortion filter via at least one linear, continuous-time feedback path, thereby facilitating correction of the nonlinearities.
- 16. The method of claim 15 wherein the first signal comprises an ADSL signal.
RELATED APPLICATION DATA
The present application is a continuation U.S. patent application Ser. No. 09/432,507 for POWER EFFICIENT LINE DRIVER filed on Nov. 2, 1999, which claims priority from U.S. Provisional Patent Application No. 60/123,549 for POWER EFFICIENT LINE DRIVER filed on Mar. 9, 1999, the entireties of both of which are incorporated herein by reference for all purposes.
US Referenced Citations (12)
Provisional Applications (1)
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Number |
Date |
Country |
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60/123549 |
Mar 1999 |
US |
Continuations (1)
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Number |
Date |
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Parent |
09/432507 |
Nov 1999 |
US |
Child |
09/769234 |
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US |