CROSS-REFERENCE TO RELATED APPLICATIONS
The entire contents of Taiwan Patent Application No. 100129680, filed on Aug. 19, 2011, from which this application claims priority, are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a power generating system more particularly to a power generating system capable of tracing an input signal.
2. Description of Related Art
An amplifier is a circuit that amplifies the power of a signal, and is commonly used in an electronic system. FIG. 1A shows a conventional amplifier utilizing an operational amplifier 10, which is supplied with power supplies Vp+ and Vp−. Referring to signal waveforms shown in FIG. 1B, the power supplies Vp+ and Vp− of the conventional amplifier have constant values. In other words, the power supplies Vp+ and Vp− are fixed no matter how an input signal Sin and an output signal Sout change.
The efficiency of the amplifier shown in FIG. 1A is low. Specifically speaking, when the amplitude of the output signal is positive, the consumed power of the amplifier is Iout*((Vp+)−(Sout)); when the amplitude of the output signal is negative, the consumed power of the amplifier is Iout*((−Vp−)+(Sout)). The consumed power mentioned above will be converted to heat energy. As battery capacity of a portable electronic device is limited, the operating time of the battery may be lengthened if the consumed power is reduced. Moreover, as the lack of space in the portable electronic device makes it difficult to dissipate heat, the heat-dissipating device of the portable electronic device may be simplified if the consumed power is reduced.
Accordingly, a need has arisen, to propose a novel power generating scheme for adaptively generating a power supply in order to reduce the consumed power.
SUMMARY OF THE INVENTION
In view of the foregoing, it is an object of the embodiment of the present invention to provide a power generating system for providing an amplifier with a required power supply, which adaptively changes according to an input signal, therefore substantially reducing the consumed power, lengthening the operating time of a battery, and reducing heat generation and dissipation.
According to one embodiment, the power generating system includes at least one signal tracing unit and at least one DC to DC converter. The signal tracing unit receives an input signal, according to which a tracing signal is generated, wherein, a waveform of the tracing signal traces a wave peak of the input signal. The DC to DC converter receives the tracing signal, according to which a power supply is generated.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1A shows a conventional amplifier utilizing an operational amplifier;
FIG. 1B shows related signal waveforms of FIG. 1A;
FIG. 2A shows a block diagram illustrative of a power generating system for providing an amplifier with required power supply according to one embodiment of the present invention;
FIG. 2B shows a block diagram illustrative of a power generating system according to another embodiment of the present invention;
FIG. 2C shows related signal waveforms of FIG. 2B;
FIG. 3A shows a circuit diagram illustrative of a power generating system according to a first preferred embodiment of the present invention;
FIG. 3B shows a circuit equivalent to the first signal tracing unit of FIG. 3A;
FIG. 3C shows a power generating system according to a modified first embodiment of the present invention;
FIG. 3D shows related signal waveforms of FIG. 3C;
FIG. 4 shows a circuit diagram illustrative of a power generating system according to a second preferred embodiment of the present invention; and
FIG. 5 shows a circuit diagram illustrative of a power generating system according to a third preferred embodiment of the present invention.
DETAILED DESCRIPTION OF THE INVENTION
FIG. 2A shows a block diagram illustrative of a power generating system 20 for providing an amplifier 22 with a required power supply Vp according to one embodiment of the present invention. The amplifier 22 amplifies an input signal Sin to generate an output signal Sout. The amplifier 22 may have a variety of configurations such as, but not limited to, the amplifier shown in FIG. 1A.
In the embodiment, the power generating system 20 primarily includes a signal tracing unit 201 and a DC (direct-current) to DC converter 203. Specifically, the signal tracing unit 201 receives an input signal of the amplifier 22 and accordingly generates a tracing signal Vtr, wherein the waveform of the tracing signal Vtr traces the wave peak of the input signal Sin. The DC to DC converter 203 receives the tracing signal Vtr, according to which a power supply Vp is generated for providing to the amplifier 22. In the embodiment, the power supply Vp is referred to a power supply voltage. Further, the signal tracing unit 201 receives a (positive-valued) operating voltage level to ensure that the generated power supply Vp has an absolute value not being less than a minimum working voltage Vmin. Moreover, when the input signal Sin, has insufficient driving capability to drive the signal tracing unit 201, resulting in distortion in the input signal Sin, the driving capability of the input signal Sin, therefore, may be enhanced before transferring the input signal Sin to the signal tracing unit 201.
The power generating system 20 as shown in FIG. 2A generates the single power supply Vp according to the single tracing signal Vtr. The power generating system 20 as shown in FIG. 2B, nevertheless, generates two tracing signals Vtr+ and Vtr−, according to which two power supplies Vp+ and Vp− are generated. Specifically, a first signal tracing unit 201A and a second signal tracing unit 201B receive the input signal Sin of the amplifier 22, and accordingly generate a first tracing signal Vtr+ and a second tracing signal Vtr−, respectively, and the waveforms of the first/second tracing signals Vtr+/Vtr− trace a positive wave peak and a negative wave peak of the input signal Sin, respectively. A first DC to DC converter 203A and a second DC to DC converter 203B receive the first tracing signal Vtr+ and the second tracing signal Vtr−, respectively, according to which the first power supply Vp+ and the second power supply Vp− are generated and provided to the amplifier 22.
FIG. 2C shows related signal waveforms of FIG. 2B. As shown in FIG. 2C, the first tracing signal Vtr+ and the second tracing signal Vtr− trace the wave peak of the input signal Sin. Regarding a low frequency part of the input signal Sin (as shown to the right-hand side of the figure), the amplitudes of the first/second tracing signals Vtr+/Vtr− are slightly lowered between wave peaks due to discharging in the circuit. It is noted that the first/second tracing signals Vtr+/Vtr− may be lower (or higher) than the wave peak of the input signal Sin, although the first/second tracing signals Vtr+/Vtr− are depicted, in the drawing, to be tangential to the input signal Sin at the peaks. Moreover, when the positive sinusoidal wave of the input signal Sin has a value lower than the operating voltage Vlevel, the first power supply Vp+ can be kept higher than the minimum voltage Vmin; when the absolute value of the negative sinusoidal wave of the input signal Sin has a value lower than the operating voltage Vlevel, the second power supply can he be kept lower than minus the minimum voltage Vmin (i.e., −Vmin.). As the first/second power supplies Vp+/Vp− provided to the amplifier 22 adaptively change according to the input signal Sin, a substantive consumed power may be saved, the operating time of a battery may be substantially lengthened, and heat generation and dissipation may be substantially reduced. The structure of FIG. 2A or FIG. 2B may be implemented by a variety of analog or digital circuits, some of which will be introduced below as preferred embodiments.
FIG. 3A shows a circuit diagram illustrative of a power generating system 20 according to a first preferred embodiment of the present invention. In the embodiment, the first/second tracing signals Vtr+/Vtr− are first/second reference voltages Vref+/Vref− of the first/second DC to DC converters 203A/203B, respectively. The generated first/second power supplies Vp+/Vp− have the following relationship:
Vp+=(Vref+)*gain,
Vp−=(Vref−)*gain.
The first signal tracing unit 201A of the embodiment includes a first diode D1, whose anode is coupled to the input signal Sin for passing the positive sinusoidal wave of the input signal Sin. Series-connected capacitor C and resistor Ra, acting as an integrator, are coupled between the cathode of the first diode D1 and ground, therefore generating the first reference voltage Vref+. Further, a resistor Rb parallel connected with the capacitor C is used for discharging, and may be used to determine how fast the first reference voltage Vref+ traces the input signal Sin. Moreover, the first signal tracing unit 201A may include a second diode D2, whose anode is coupled to receive the operating voltage Vlevel, and its cathode is coupled to the integrator Ra/C. When the input signal Sin is lower than the operating voltage Vlevel, the second diode D2 is turned on (while the first diode D1 is shut off), and the first reference voltage Vref+ is kept at the operating voltage level and the first power supply Vp+ is kept higher than the minimum working voltage Vmin. The second signal tracing unit 201B has a structure similar to that of the first signal tracing unit 201A, but further includes an inverter 2010 for inverting the negative waveform of the input signal Sin, and then following the same operating principle of the first signal tracing unit 201A for generating the second reference voltage Vref−.
FIG. 3B shows a circuit equivalent to the first signal tracing unit 201A of FIG. 3A. In the embodiment, the first signal tracing unit 201A includes a transistor T, whose input node (i.e., the collector electrode) is coupled to receive the input signal Sin, its output node (i.e., the emitter electrode) is coupled to the capacitor C and the resistor Ra (i.e., the integrator). The control node (i.e., the base electrode) is coupled to a Zener diode Dz, which has a breakdown voltage approximately equal to the operating voltage Vlevel plus base-to-emitter voltage VBE of the transistor T.
FIG. 3C shows a power generating system 20 according to a modified first embodiment of the present invention, and FIG. 3D shows related signal waveforms of FIG. 3C. Compared to the embodiment of FIG. 3A, the present embodiment omits the operating voltage Vlevel and the associated second diode D2. Nevertheless, the first/second DC to DC converters 203A/203B each internally includes a bias circuit for keeping the first power supply Vp+ higher than the minimum working voltage Vmin and keeping the second power supply Vp− less than minus the minimum working voltage (i.e., −Vmin), when the absolute value of the first/second reference voltage Vref+/Vref− is less than the operating voltage.
FIG. 4 shows a circuit diagram illustrative of a power generating system 20 according to a second preferred embodiment of the present invention. Only the signal tracing unit 201 is shown while other portion of the system is omitted. Similar to the first preferred embodiment (FIG. 3A), in the present embodiment, the signal tracing unit 201 includes the first diode D1, whose anode is coupled to receive the input signal Sin for passing the positive sinusoidal wave of the input signal Sin, and series-connected. capacitor C and resistor Ra, acting as an integrator, are coupled between the cathode of the first diode D1 and ground. The embodiment employs a DC offset adjusting circuit 2012 to ensure that the generated power supply Vp is not less than the minimum working voltage Vmin. Specifically, the DC offset adjusting circuit 2012 includes a voltage divider made of a resistor R1 and a resistor R2. One end of the voltage divider is, indirectly, coupled to receive the output of the integrator, and another end of the voltage divider coupled to an adjusting voltage Vt. The generated divided voltage is amplified by a non-inverting amplifier made of an operational amplifier 2012A.
The signal tracing unit 201 of the embodiment may use more than one DC offset adjusting circuit such as the block 2014, in which an adjusting voltage Vg is used. According to further circuit design considerations, the signal tracing unit 201 of the embodiment may further include other circuits such as a non-inverting amplifier 2016 made of an operational amplifier 2016A for amplifying/reducing signal; or a unity-gain, buffer amplifier 2018 made of an operational amplifier 2018A for improving current driving capability.
FIG. 5 shows a circuit diagram illustrative of a power generating system 20 according to a third preferred embodiment of the present invention. In the embodiment, the signal tracing unit 201 includes an analog-to-digital converter (ADC) 2011 for converting the input signal Sin to a digital signal. The converted digital signal is transferred to a digital signal processor 2013 for generating the first/second tracing signals Vtr+/Vtr−, which are then provided to the first/ second DC to DC converter 203A/203B, respectively. The digital signal processor 2013 may be used to ensure that the absolute value of the generated power supply Vp is not less than the minimum voltage Vmin according to the inputted or preset operating voltage Vlevel.
If the first/second DC to DC converters 203A/203B each has an analog input interface, an additional digital-to-analog converter (DAC), acting as a signal interface 2015, is required and disposed between the digital signal processor 2013 and the first/second DC to DC converters 203A/203B. If the first/second DC to DC converters 203A/203B each has a digital input interface, an additional digital signal interface 2015 may additionally be used and disposed between the digital signal processor 2013 and the first/second DC to DC converters 203A/203B. The digital signal interface 2015 may be General Purpose Input/Output (GPIO), Inter-Integrated Circuit (I2C), Serial Peripheral Interface (SPI) or Universal Asynchronous Receiver/Transmitter (UART). The ADC 2011 or the signal interface 2015 may be integrally manufactured with the digital signal processor 2013 within a chip or a package, or may be separately manufactured or packaged.
Although specific embodiments have been illustrated and described, it will be appreciated by those skilled in the art that various modifications may be made without departing from the scope of the present invention, which is intended to be limited solely by the appended claims.
Patent Application
20130043732
