Patent Application
20130020884
1. Technical Field
The disclosed embodiments relate to power-off circuits, and particularly relates to a power-off circuit and an electronic device.
2. Description of Related Art
Generally, a power-off circuit is incorporated in electronic devices, to power off the electronic devices. A typical electronic device includes a power source, a power management unit, a processing unit, and a button. When the electronic device is powered on, the power source provides a voltage to the power management unit, then the power management unit provides an operating voltage to the processing unit, thus the processing unit operates normally. When a user needs to power off the electronic device, the button is depressed, and then a power off signal is generated. The processing unit disables the power management unit in response to power off signal, and is further disabled in response to power off signal, thus the electronic device is powered off.
However, the processing unit may malfunction, in this situation, the processing unit cannot disable the power management unit in response to power off signal, thus the electronic device cannot be powered off.
Therefore, there is room for improvement in the art.
Many aspects of the embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout two views.
Referring to
The voltage divider 20 is used for dividing the supply voltage of the power source 10 and providing the divided voltage to the switch 30. The switch 30 is used for generating a power-on signal or a power-off signal when being triggered. In this embodiment, the power-on signal is the transient divided voltage, and the power-off signal is also the transient divided voltage.
The first filtering unit 40 is used for filtering the supply voltage of the power source 10, and providing the filtered supply voltage to the power management unit 50. The power management unit 50 includes an enable pin 52, and the enable pin 52 is connected to the switch 30 and the processing unit 80. The enable pin 52 receives the power-on signal from the switch 30, thus the power management unit 50 is enabled to provide an operating voltage to the second filtering unit 60. Because the power-on signal is the transient divided voltage, the power management unit 50 is transiently enabled.
The second filtering unit 60 is used for filtering the operating voltage and providing the filtered operating voltage to the processing unit 80, thus the processing unit 80 outputs an enable signal to the enable pin 52 to maintain the power management unit 50 to be enabled, after that, the enable pin 52 can continuously receive the enable signal from the processing unit 80, and the electronic device 100 is powered on.
The processing unit 80 disables the power management unit 50 and is disabled in response to the power-off signal. Because the power-off signal is a transient divided voltage, the enable pin 52 cannot continuously receive the enable signal, and the power management unit 50 is disabled. Therefore, even if the processing unit 80 malfunctions, the processing unit 80 cannot disable the power management unit 50, the power management unit 50 can be disabled according to the power-off signal from the switch 30.
Referring to
The switch 30 includes a first pin 1, a second pin 2, and a third pin 3. The first pin 1 is connected between the first resistor R1 and the second resistor R2, the second pin 2 is connected to the first pin 1, an anode of the first diode D1 is connected to the third pin 3, a cathode of the first diode D1 is connected to the enable pin 52. The third pin 3 is further connected to the processing unit 80. When the switch 30 is triggered, the second pin 2 is transiently connected to the third pin 3, and then the second pin 2 is resiliently restored to be connected to the first pin 1. Therefore, the power-on signal is the transient divided voltage, and the power-off signal is also the transient divided voltage.
The first filtering unit 40 includes a third resistor R3, a first capacitor C1, and a second capacitor C2. One end of the third resistor R3 is connected to the power source 10, the other end of the third resistor R3 is grounded via the first capacitor C1. One end of the second capacitor C2 is connected to a node A between the third resistor R3 and the first capacitor C1, the other end of the second capacitor C2 is grounded, the node A is connected to the power management unit 50.
The second filtering unit 60 includes a fourth resistor R4, a third capacitor C3, and a fourth capacitor C4. The fourth resistor R4 is connected between the power management unit 50 and the processing unit 80, one end of the third capacitor C3 is connected between the power management unit 50 and the fourth resistor R4, and the other end of the third capacitor C3 is grounded. One end of the fourth capacitor C4 is connected between the fourth resistor R4 and the processing unit 80, the other end of the fourth capacitor C4 is grounded. Furthermore, an anode of the second diode D2 is connected to the processing unit 80, and a cathode of the second diode D2 is connected to the enable pin 52.
Alternative embodiments will be apparent to those skilled in the art without departing from the spirit and scope of what is claimed. Accordingly, the present disclosure should be deemed not to be limited to the above detailed description, but rather only by the claims that follow and equivalents thereof.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201110202421.9 | Jul 2011 | CN | national |
