Power over Ethernet electrostatic discharge protection circuit

Abstract

A Power over Ethernet electrostatic discharge protection circuit has a first diode with an anode coupled to a positive power port and a cathode coupled to an ESD protection port. A second diode has an anode coupled to ground and a cathode coupled to the positive power port. A third diode has an anode coupled to a negative power port and a cathode coupled to the ESD protection port.

Description

BRIEF DESCRIPTION OF THE DRAWINGS/FIGURES

The accompanying drawings illustrate the present invention and, together with the description, further serve to explain the principles of the invention and to enable one skilled in the pertinent art to make and use the invention.

FIG. 1 is a block diagram of a conventional Power over Ethernet (PoE) system.

FIG. 2A illustrates a more detailed figure of conventional power transfer from Power Source Equipment (PSE) to a Powered Device (PD) in a conventional PoE communications system.

FIG. 2B illustrates exemplary configurations for power transfer from Power Source Equipment (PSE) to a Powered Device (PD) in a PoE communications system.

FIG. 3 illustrates a PoE electrostatic discharge (ESD) protection circuit.

FIG. 4 illustrates an exemplary PoE ESD protection circuit.

Claims

1. A Power over Ethernet (PoE) electrostatic discharge (ESD) protection circuit, comprising: a first diode having an anode coupled to a positive power port and a cathode coupled to an ESD protection port;a second diode having an anode coupled to ground and a cathode coupled to said positive power port; anda third diode having an anode coupled to a negative power port and a cathode coupled to said ESD protection port.

2. The circuit of claim 1, further comprising an ESD clamping device coupled between ground and said ESD protection port.

3. The circuit of claim 1, further comprising a capacitor coupled between ground and said ESD protection port;

4. The circuit of claim 1, further comprising: a transceiver; anda transformer having a primary winding and a secondary winding, wherein said secondary winding has a center tap coupled to said positive power port or said negative power port;wherein said primary winding is coupled to said transceiver.

5. The circuit of claim 4, further comprising an RJ45 connector coupled to said secondary winding.

6. The circuit of claim 1, further comprising: an NMOS transistor including: a drain coupled to said negative power port;a source coupled to ground;a gate; anda diode having an anode coupled to ground and a cathode coupled to said gate.

7. The circuit of claim 1, further comprising: a ESD differential protection diode having an anode coupled to said negative power port and a cathode coupled to said positive power port; anda second capacitor coupled between said positive power port and said negative power port;

8. The circuit of claim 1, further comprising: a power supply port; anda power supply ESD clamp coupled between ground and said power supply port.

9. The circuit of claim 8, further comprising: a power supply diode having an anode coupled to said power supply port and a cathode coupled to said positive power port.

10. The circuit of claim 1, wherein at least a part of the ESD protection circuit is deposited on a substrate.

11. The circuit of claim 1, further comprising an AC disconnect circuit coupled to the PoE ESD protection circuit.

12. The circuit of claim 1, further comprising a control circuit coupled to the PoE ESD protection circuit.

13. A Power over Ethernet (PoE) electrostatic discharge (ESD) protection circuit, comprising: an Ethernet port;a diode including: a cathode; andan anode coupled to said Ethernet port; anda non-collapsible clamp coupled between said cathode and ground.

14. The circuit of claim 13, further comprising a transistor including: a drain coupled to said anode; anda source coupled to ground.

15. The circuit of claim 13, further comprising a capacitor coupled between said cathode and ground.

16. The circuit of claim 13, wherein at least a part of the ESD protection circuit is deposited on a substrate.

17. The circuit of claim 16, further including a port coupled to said cathode.

18. The circuit of claim 13, further comprising a control circuit coupled to the PoE ESD protection circuit.