Patent Application
20220149615
The present inventions relate generally to power semiconductor switching devices, and more particularly, to a voltage clamping circuit in parallel with the switching device to dissipate energy when opening the device.
In the art of power semiconductor switching devices, it is common to dissipate system inductive energy and protect the power semiconductor device at the opening of device with a metal oxide varistor (MOV) connected in parallel with the semiconductor device. Although this is a simple solution, it requires a substantial overdesign of the semiconductor device with respect to the voltage blocking capability of the device. For example, most MOV designs require the power semiconductor device to be sized for a blocking voltage of 2-2.5× the nominal system voltage (e.g., a 2,500 V power semiconductor device may be needed for a 1,000 V system). Consequently, the cost of the power semiconductor device that must be used is higher.
Accordingly, an improved design for power semiconductor switching devices would be desirable.
A power semiconductor circuit is described for improving the blocking voltage and/or decreasing the cost of the circuit. The circuit may have a first surge arrester and a first semiconductor switch in series with each other and in parallel with a power semiconductor switch. A second surge arrester may be coupled to the gate of the first semiconductor switch to passively control opening and closing of the switch in order to control current flow through the first surge arrestor and the first semiconductor switch. The invention may also include any other aspect described below in the written description or in the attached drawings and any combinations thereof.
The invention may be more fully understood by reading the following description in conjunction with the drawings, in which:
The embodiments herein provide a hybrid voltage clamping circuit which may permit the use of a power semiconductor switching device (also referred to as a solid state circuit breaker) with a blocking voltage of 1.2-1.5× the nominal system voltage. As a result, the cost of the power semiconductor device may be reduced compared to conventional designs by using a lower rated device (e.g., a 40% cost reduction or more may be possible). The hybrid voltage clamping circuit is preferably passively activated and combines the action of one or more MOVs and one or more thyristors. That is, the passive activation circuit may be used without any external control signal for the thyristor. Instead, the thyristor may be automatically turned on during the MOV voltage clamping phase (i.e., fault current interruption) and turned off after the fault current is interrupted to withstanding at least part of the system voltage. When a turn-off/opening event occurs, the hybrid voltage clamping circuit may utilize the MOV to perform the voltage clamping and energy dissipation needed to safely open the power semiconductor switching device. After the turn-off/opening event, the passive activation circuit enables the thyristor to increase the nominal voltage withstanding capability of the voltage clamping circuit and reduce the leakage current in the off state of the voltage clamping circuit (e.g., a 10-100× leakage current reduction may be possible compared to the use of a MOV only). It is also possible for the hybrid circuit to be tuned in order to generate a specific clamping voltage/nominal voltage ratio. Preferably, the hybrid voltage clamping circuit uses a low current thyristor, which has a bidirectional voltage blocking capability and can handle a high surge current in order to reduce the total cost of the voltage clamping circuit. The hybrid voltage clamping circuit may be compatible with solid state circuit breakers with current ratings up to 5000 A. The thyristor preferably has a current rating that is less than 40% of the current rating of the power semiconductor switch 10, which allows the cost of the circuit to be minimized.
As shown in
It is understood that the circuits herein may be varied as desired. For example, the power semiconductor circuit (i.e., switch 10 and related voltage clamping circuit (MOV 12, switch 14, etc.)) is preferably a solid state circuit breaker. Although various types of power semiconductor switches 10 may be used, examples include insulated-gate bipolar transistors (IGBTs), bipolar junction transistors (BGTs), metal-oxide semiconductor field effect transistors (MOSFETs), gate turn-off thyristors (GTOs), MOS-controlled thyristors (MCTs), integrated gate-commutated thyristors (IGCTs), silicon carbide (SiC) switches, gallium nitride (GaN) switches, or any other type of semiconductor switch that controls current flow to power electrical equipment. The primary MOV 12 may be a surge arrestor, including a varistor. The secondary MOV 18 may also be a surge arrestor, including a varistor (
In the off state (blocking state), the voltage 30 is shared by the primary high current MOV 12 and the thyristor 14. The thyristor 14 may take 30-70% of the voltage 30 applied to the circuit and increases the nominal voltage rating of the circuit compared to using a MOV 12 by itself. Once a turn-off (current interruption) occurs, the primary high current MOV 12 clamps the voltage 30 to a value lower than the maximum blocking voltage of the power semiconductor switch 10. This happens as a result of the passive activation of the thyristor 14 once the voltage 32 on the passive activation circuit goes over a predefined value (normally higher than the nominal system voltage). For example, in
In general, it can be understood that when the power semiconductor switch 10 is turned off, current stops flowing through the switch 10 and instead flows to the parallel voltage clamping circuit (i.e., through the MOV 12 and capacitor 16 to the thyristor 14 or directly to the thyristor 14 from the other side of the switch 10 in the case of a reverse AC current). However, since the thyristor 14 is initially off, a voltage potential occurs, which is applied to the gate of the thyristor 14 through the resistor 20 and secondary MOV 18 (e.g., through the primary and secondary MOVs 12, 18). This causes the thyristor 14 to turn on and allow current flow therethrough. The voltage potential on the gate of the thyristor 14 then drops, and when the current flow through the thyristor 14 drops below a threshold, the thyristor 14 turns off again to block further current flow. It is understood that in the variations of
As described, the voltage clamping circuit herein may combine the use of a main high current MOV 12 with a low current thyristor 14 in a passive activation circuit. The passive activation circuit may use inexpensive low current MOVs 18 or TVS diodes 38. The voltage clamping circuit may be capable of blocking a much higher nominal voltage compared with a solid state circuit breaker with only a MOV. The hybrid voltage clamping circuit may also greatly decrease the rated blocking voltage needed for the power semiconductor switch 10 and greatly reduce the cost of the power semiconductor switch for the same voltage rating of the circuit. The hybrid voltage clamping may also reduce the maximum system overvoltage generated by the opening of the power semiconductor switch 10, which may be important for some users who are sensitive to system overvoltages, such as datacenter applications.
While preferred embodiments of the inventions have been described, it should be understood that the inventions are not so limited, and modifications may be made without departing from the inventions herein. While each embodiment described herein may refer only to certain features and may not specifically refer to every feature described with respect to other embodiments, it should be recognized that the features described herein are interchangeable unless described otherwise, even where no reference is made to a specific feature. It should also be understood that the advantages described above are not necessarily the only advantages of the inventions, and it is not necessarily expected that all of the described advantages will be achieved with every embodiment of the inventions. The scope of the inventions is defined by the appended claims, and all devices and methods that come within the meaning of the claims, either literally or by equivalence, are intended to be embraced therein.
