This application claims priority to Italian Patent Application No. 102020000010141, filed on May 6, 2020, which application is hereby incorporated herein by reference.
The description relates to power supply circuits.
One or more embodiments can be applied to various types of devices, such as, by way of example, sensors (MEMS-based sensors, for instance), regulators and reference generators.
One or more embodiments can be applied, again by way of example, in various industrial sectors such as power conversion (in power converter regulators, for instance).
Modern AC/DC power supplies, such as those following the USB-PD (USB Power Delivery) specifications, can change an output voltage regulation according to requests coming from a load.
Power can be supplied to a primary side controller (an integrated circuit or IC, for instance) by an auxiliary winding on the primary side of a transformer in the controller. When the system is switching, a small part of the converter power flows through the auxiliary winding and provides a supply for the IC.
In the presence of a low load (or if no load is present) such a controller may operate in a burst mode, switching for a short time and then stopping for a relatively long time. The controller in this phase starts the active phase when the output voltage drops below a given threshold.
Embodiments provide improved power supply circuits and methods to operate these power supply circuits.
For instance, controlled burst during transitions is a desirable feature in many applications of these supply circuits.
One or more embodiments may facilitate obtaining an adequate primary side supply via an auxiliary winding during negative voltage transitions, for instance.
One or more embodiments will now be described, by way of example only, with reference to the figures:
In the ensuing description, one or more specific details are illustrated, aimed at providing an in-depth understanding of examples of embodiments of this description. The embodiments may be obtained without one or more of the specific details, or with other methods, components, materials, etc. In other cases, known structures, materials, or operations are not illustrated or described in detail so that certain aspects of embodiments will not be obscured.
Reference to “an embodiment” or “one embodiment” in the framework of the present description is intended to indicate that a particular configuration, structure, or characteristic described in relation to the embodiment is comprised in at least one embodiment. Hence, phrases such as “in an embodiment” or “in one embodiment” that may be present in one or more points of the present description do not necessarily refer to one and the same embodiment.
Moreover, particular conformations, structures, or characteristics may be combined in any adequate way in one or more embodiments.
The headings/references used herein are provided merely for convenience and hence do not define the extent of protection or the scope of the embodiments.
Various acronyms will be repeatedly used in the following.
The meaning of these, otherwise conventional, acronyms is explained by way of introduction to the present description of exemplary embodiments.
UVLO=Under Voltage Lock Out. This refers to an undervoltage lockout function. During operation, if a power supply voltage drops and becomes lower than a UVLO detection voltage, the system is restarted.
LDO=Low Drop Out (regulator). The designation low-dropout or LDO regulator applies to DC regulators capable of maintaining regulation with small differences between the input (supply) voltage and the output (load) voltage that is able to regulate the output voltage even when the input voltage is very close to the output voltage.
FSM=Finite State Machine
μC=Microcontroller
ADC=Analog to Digital Converter
Modern AC/DC power supplies, such as those following the USB-PD (USB Power Delivery) specifications, can change an output voltage regulation according to requests coming from a load.
A conventional AC/DC converter topology currently resorted to (in USB-PD chargers, for instance) is a flyback topology as illustrated in
Such a converter, designated 10 as a whole in
It is noted that the load LD (illustrated in dashed lines throughout the figures) may be a distinct element from the embodiments.
Also, the diagram of
The converter 10 illustrated in
a primary winding 121 coupled to an input port including two input nodes which receive an input voltage Vin applied therebetween,
a secondary winding 122 intended to be coupled to the load LD in order to apply thereto an output voltage Vout across a secondary side capacitor Csec.
The converter 10 illustrated in
As illustrated in
As illustrated in
The converter 10 illustrated in
These features are otherwise conventional in the art and are not visible in the figure for simplicity.
As illustrated in
In some systems like USB-PD (USB Power Delivery) the regulated output voltage Vout may change according to requests coming from the load LD through a dedicated communication protocol (this occurs in manner known to those of skill in the art, which makes it unnecessary to provide a more detailed description herein).
Transitions are often managed by performing controlled ramps (ascending and descending), that make the transition smooth and “well behaved.”
In normal conditions, voltage transitions can be managed by changing the reference voltage applied to the voltage feedback path in compliance with the request, ramping the reference voltage from an initial to a final voltage, for instance.
As a result of the output load LD being (very low) or zero (no load) conditions can set in where, even if the converter stops completely, the output voltage Vout may take long to adjust to the new target voltage.
As discussed previously, when the converter 10 is switching (that is, with the switch 16 turned alternately on and off by the controller 14), a part of the converter power flows to the auxiliary winding 123 providing a supply voltage VCCpri for the IC 14.
In the presence of a low load (or if no load is present) coupled to Vout, certain controllers operate in burst mode, switching for a short time then stopping for a relatively long time. The controller in this phase starts an active phase where Vout drops below a given threshold.
Such a behavior is exemplified in the curves of the diagram of
the output voltage Vout (upper curve),
the supply voltage VCCpri provided to the controller 14 (lower curve).
In the case of
The times where the converter 10 is switching are indicated at SW, distinguishing “active” phases or steps (STEP 0, STEP 2, for instance) and “inactive” phases or steps (STEP 1, for instance).
In conventional converters, the output capacitor Csec is (much) bigger than the capacitor CAPVCC at the output of the auxiliary winding 123. In normal operating conditions the current flowing towards the converter output (Vout) is orders of magnitude larger than the current absorbed by the primary side controller 14.
Conversely, in a burst mode, current consumption at the converter output (secondary side) and at the controller 14 (primary side) may become similar. As a result, between bursts the voltage on CAPVCC may drop more markedly than the output voltage. If the distance between bursts (STEP 1, for instance) becomes too long, the voltage on CAPVCC may drop below the lower bound value VCCturnOFF for primary side controller operation, thus causing the system to stop.
This event is likely to occur in systems with variable Vout as a result of a negative voltage transition requested while a low load or no load is applied.
This situation is exemplified in the diagram of
In that respect it is noted that, in the diagrams of
As exemplified in
In order to manage negative transitions with low or no output load, some controllers may include a dissipative element (or “bleeder”) on Vout to help output voltage drop. Such a bleeder element is exemplified as a current generator 22 in
In a circuit architecture as illustrated in
The diagram of
During STEP 1 bleeder(s) are turned on making the output voltage decrease with a derivative dv/dt which is (directly) proportional to the bleeding current and inversely proportional to the output capacitance.
If an insufficient current is drawn by the bleeder(s), the voltage VCCpri at the primary side can still reach the VCCturnOFF threshold where the system is stopped and restarted, failing to solve the related problem. This problem becomes more evident in the presence of a large capacity Csec involved in providing Vout.
It is noted that these issues (essentially avoiding undesired system shut-off) could be addressed increasing the capacity CAPVCC and/or increasing the bleeder drain capability. Both solutions are expensive in terms of space taken on the support board (a printed circuit board or PCB, for instance) and costs.
Indeed, integrating a high-current bleeder in an IC is hardly feasible, primarily in view of the heat generated by the bleeder: this is difficult to dissipate adequately through the package and would risk to damage the IC.
A solution to avoid hitting the primary side VCCturnOFF point may involve decreasing the regulation voltage (reference, VCCreg, on the primary side) slower than a minimum Vout slope.
The diagram of
This results in (very) long transition times insofar as the energy provided by each burst further slows down the transition.
This kind of control makes transitions very slow but keeps the system alive. The impact on Vout is noticeable: Vout increases during bursts (see STEP 1 in
One or more embodiments address these issues generating a controlled burst which is able to charge VCCpri while having a low impact on Vout, noting that a burst is a series of pulses giving rise to energy storage and energy transfer events.
One or more embodiments will now be discussed in connection with
One or more embodiments take advantage of the possibility of transferring power on the winding where the associated capacitor is less charged.
A first phase in this type of operation, as exemplified by I in
When the primary side switch 16 is turned off, the same voltage (under the 1:1 turn ratio assumption discussed previously) is generated at the auxiliary winding 123 and the secondary winding 122.
If VCCpri is lower than Vout, the diode 20b associated to the auxiliary winding 123 clamps the winding voltage to VCCpri so that the secondary side diode 18 is not turned on and the energy is transferred almost exclusively to VCCpri (as highlighted at II in
As exemplified at III in
In one or more embodiments:
during a normal burst, the energy delivered during the burst is high enough to charge both VCCpri and Vout,
the proposed control is capable of providing a (small) amount of energy which is enough to charge only VCCpri, thus keeping the primary circuitry “alive” without undesirably increasing Vout.
Stated otherwise, one or more embodiments may force low energy bursts during Vout transitions when VCCpri is higher than UVLO but lower than a minimum value Vout.
While a bleeder such as 22 may still be advantageous for no load operation, advantages in terms of speed of transition can be achieved while avoiding monotonicity issues.
As exemplified in
In comparison with a slow ramp transition as exemplified in
the energy of each single burst packet can be the (very) low energy involve in charging (only) VCCpri;
burst operation is independent of a voltage ramp;
burst operation is independent of Vout;
limited impact on Vout;
effective impact on VCCpri.
One or more embodiments facilitate increasing converter speed insofar as changes in Vout change are limited only by bleeding capacity.
Operation as discussed previously, that is activating a forced burst, can be implemented in various ways.
In an exemplary case of time-based operation a burst can be forced as a result of a time-out reached during a negative transition while the system is not switching.
For instance,
As in the case of a conventional control (as implemented in the controller 14 in manner known to those of skill in the art) the converter 10 enters a burst mode and stops switching: in fact no further switching is requested by the voltage control loop until STEP 2 is reached.
As in the case of
Again, the timeout bursts are set to a value short enough to avoid reaching UVLO. However, in the case of
Other possible implementations of the same basic operating principles discussed previously are exemplified in
Here again entities, parts or elements like entities, parts or elements already discussed in connection with the previous figures are indicated with like reference symbols and a corresponding description will not be repeated for brevity.
An advantageous way of implementing a forced burst is to sense VCCpri, with a single or a double threshold, for instance. Such an approach facilitates a precise control on VCCpri and reduces the ripple on Vout.
Both
In that way the possibility exists of keeping VCCpri in a desired range with reduced impact on Vout.
Here again, the time between two forced bursts and the number of pulses may be set as programmable parameters.
The flow chart of
The blocks in the flow chart of
block 1000: a negative transition (on Vout) is requested, as conventional in USB-PD protocols, for instance;
block 1002: reference voltage (ramp R, for instance) is decreased until target reached;
block 1004: is Vout tracking the ramp?
block 1006: stop switching as a result of negative outcome (n) of check at 1004;
block 1008: is timeout lapsed? Return upstream of 1002 if outcome negative (n);
block 1010: force low power burst as a result of positive outcome (y) of check at 1008 and return upstream of 1002;
block 1012: as a result of positive outcome (y) of check at 1004, has reference reached target?
block 1014: normal loop operation as a result of negative outcome (n) of check at 1012; return upstream of 1002;
block 1016: done, as a result of positive outcome (y) of check at 1012; this is indicative of the fact that the output voltage Vout has reached a desired (lower) target value as indicated in block 1000.
Possible time-related waveforms are shown in
A (converter) circuit (for instance, 10) as exemplified herein may comprise a transformer (for instance, 12) having a primary winding (for instance, 121) coupled to an input port configured to receive an input voltage (for instance, Vin) and a secondary winding (for instance, 122) configured to deliver an output voltage (for instance, Vout) towards a load (for instance, LD), controller circuitry (for instance, 14) configured (for instance, via the switch 16) to switch on and off a current through the primary winding of the transformer wherein energy is transferred to the secondary winding of the transformer during switching on and off the current through the primary winding, supply circuitry (for instance, 20) for the controller circuitry, the supply circuitry coupled (for instance, via 20b) to an auxiliary winding (for instance, 123) in the transformer and configured to produce a supply voltage (for instance, VCCpri) for the controller circuitry, wherein the controller circuitry is configured to transition to a burst mode of operation to switch on and off the current through the primary winding of the transformer in bursts during which the current through the primary winding of the transformer is switched on and off, said bursts separated by intervals during which switching on and off the current through the primary winding of the transformer is discontinued and force said bursts targeting (that is, having as a target) maintaining the controller circuitry active with said supply voltage for the controller circuitry (14) between a lower bound (for instance, UVLO; Vturnon) and an upper bound (for instance, VCCreg; Vturnoff).
It will be appreciated that in a circuit as exemplified herein the controller circuitry can be maintained active irrespective of whether Vout is kept substantially constant (no transition) or reduced towards a valley value during a negative transition.
In a circuit as exemplified herein, the controller circuitry may be is configured to force said bursts as a result of expiration (see for instance, 1008y) of a timeout limit on the duration of said intervals during which switching on and off the current through the primary winding of the transformer is discontinued.
In a circuit as exemplified herein, the controller circuitry may be configured to force said bursts as a result of said supply voltage reaching (for instance, 1012) said lower bound value (for instance, Vturnon).
In a circuit as exemplified herein, the controller circuitry may be configured to discontinue forcing said bursts as a result of said supply voltage reaching said upper bound value (for instance, Vturnoff).
In a circuit as exemplified herein, the controller circuitry may be configured to stop operation of the circuit as a result of said supply voltage reaching an undervoltage lockout threshold, wherein said lower bound is higher than said undervoltage lockout threshold.
In a circuit as exemplified herein, said auxiliary winding (for instance, 123) in the transformer may arranged at the primary winding side of the transformer.
A device as exemplified herein (for instance, any of the devices listed in the introductory portion of this description) may comprise a circuit as exemplified herein and an electrical load (for instance, LD) coupled (for instance, via a capacitor Csec) to the secondary winding of the transformer.
A method of operation of a circuit as exemplified herein may comprise receiving (for instance, 1000) at said controller circuitry (14) a request to reduce (for instance, 1002) the output voltage at the secondary winding of the transformer towards a valley value, said controller circuitry transitioning (for instance, 1004n) to said burst mode of operation, with the controller circuitry forcing said bursts (for instance, 1008, 1010) targeting (that is, having as a target) maintaining the controller circuitry (14) active.
A method as exemplified herein may comprise checking (for instance, 1012) if the output voltage at the secondary winding of the transformer has reached said valley value, said controller circuitry exiting (for instance, 1016) said burst mode of operation as a result of said checking (for instance, 1012) indicating that the output voltage at the secondary winding of the transformer has reached said valley value.
Without prejudice to the underlying principles, the details and embodiments may vary, even significantly, with respect to what has been described by way of example only, without departing from the extent of protection.
The extent of protection is determined by the annexed claims.
Number | Date | Country | Kind |
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102020000010141 | May 2020 | IT | national |
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