1. Technical Field
Embodiments of the present disclosure relate to power supply technologies, and particularly to, a power supply system for a plurality of motherboards.
2. Description of Related Art
Power supply circuits for servers may include a power output circuit for outputting a plurality of different voltages (e.g., 12V, 5V and 3.3V). Servers may include a power supply unit (PSU) to supply power for a motherboard of the server. However, when the server includes a plurality of motherboards (e.g., three or four), one PSU is not enough for all of the motherboards. Thus, more PSUs may be needed, which increases the costs of the server. Therefore, there is room for improvement in the art.
The disclosure, including the accompanying drawings, is illustrated by way of example and not by way of limitation. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean “at least one.”
Referring to
The PSU 1 includes a voltage output port 101 and a power control port 102.
In the embodiment, the PSU 1 may consist of one or more power devices 10 having a predetermined nominal power. A nominal power of the PSU 1 is equal to a sum of the nominal powers of the one or more power devices 10.
Each switch 4 includes a voltage input terminal (Vin), a voltage output terminal (Vout), and a control terminal (Ctr) that controls the corresponding switch 4 to switch on or off. The voltage input terminal (Vin) of each switch 4 is electrically connected to the voltage output port 101 via a first resistor R1. The voltage output terminal (Vout) is electrically connected to a corresponding motherboard 5 to supply power to the motherboard 5. The voltages output from the PSU 1 are transmitted to each of the motherboards 5 through a corresponding one of the switches 4. In the embodiment, a number of power devices included in the PSU 1 is less than a number of the motherboards 5. Particularly, the PSU 1 includes two power devices, and the number of the motherboards 5 is four.
Each power management chip 3 includes an enable pin EN, a control pin CTL, a first sensing pin Sen1, a second sensing pin Sen2, a first serial data pin SDA1, and a first serial clock pin SCL1. The control pin CTL of each power management chip 3 is connected to the control terminal Ctr of a corresponding switch 4, to control the corresponding switch 4 to switch on or off. The first sensing pin Sen1 and the second sensing pin Sen2 are connected to two opposite ends of the first resistor R1, respectively. Each power management chip 3 detects a real-time power consumption of a corresponding motherboard 5 using the first sensing pin Sen1 and the second sensing pin Sen2, and sends the detected real-time power consumption of the corresponding motherboard 5 to the microcontroller 2. In the embodiment, each power management chip 3 detects voltages at the two opposite ends of the first resistor R1 in real-time using the first sensing pin Sen1 and the second sensing pin Sen2, and then calculates the real-time power consumption of the corresponding motherboard 5 according to the detected voltages.
The microcontroller 2 includes a plurality of switch terminals (e.g., SW1, SW2, SW3, and SW4), a second serial data pin SDA2, a second serial clock pin SCL2, and a power feedback terminal Power connected to the power control terminal 102 of the PSU 1. Each of the switch terminals is connected to the enable pin EN of a corresponding power management chip 3, to enable or disable the corresponding power management chip 3. The second serial data pin SDA2 is connected to the first serial data pin SDA1 of each of the power management chips 3 through a serial data line of a power management bus (PM bus) 11 to establish data transmission between the microcontroller 2 and each of the power management chips 3. The second serial clock pin SCL2 is connected the first serial clock pin SCL1 of each of the power management chips 3 through a serial clock line of the power management bus 11 to send clock signals to each of the power management chips 3. In the embodiment, the power management bus 11 is an inter integrated circuit (I2C) bus.
The microcontroller 2 receives the real-time power consumption of each of the motherboards 5 feedback from the power management chips 3 through the serial data line of the power management bus 11, and calculates a total power consumption of the motherboards 5. In the embodiment, the microcontroller 2 is further connected to each of the motherboards 5 through a data line 21. The microcontroller 2 controls the total power consumption of the motherboards 5 to remain within the nominal power of the PSU 1. For example, when the total power consumption of one or more started motherboards 5 reaches or nears the nominal power of the PSU 1, the microcontroller 2 may limit or delay startup of one or more of the motherboards 5 which have not been started. In other embodiments, when the total power consumption of the motherboards 5 reaches or nears the nominal power of the PSU 1, the microcontroller 2 may send a control signal to the PSU 1 through the power feedback terminal (Power) to directly turn off the PSU 1, thereby protecting the PSU 1. In the embodiment, when total power consumption of the motherboards 5 exceeds a predetermined value, it is determined that the total power consumption of the motherboards 5 reaches or nears the nominal power of the PSU 1.
In other embodiments, when the total power consumption exceeds a predetermined value, the microcontroller 2 controls one or more started motherboards 5 to reduce the working loads of the one or more started motherboards 5 according to a predetermined priority level of each of the motherboards 5. In one example, the microcontroller 2 may send an alarm signal to a central processing unit (CPU) 50 of a started motherboard 5 which has a lower priority level, to control the CPU 50 to reduce its working frequency, thereby controlling the total power consumption of the motherboards 5 to remain within the nominal power of the PSU by decreasing the power consumption of the motherboard 5 having the lower priority level. The predetermined priority level of each of the motherboards 5 may be predetermined by a user and stored in the microcontroller 2.
In another embodiment, referring to
As described above, the present power supply system uses a single power supply unit to supply power for a plurality of motherboards, and monitors a total power consumption of the motherboards in real-time. When the total power consumption reaches or nears the nominal power of the power supply unit, the working loads of the motherboards are adjusted to remain the total power consumption of the motherboards within the nominal power of the power supply unit. Since a single power supply unit can supply power for a plurality of motherboards, the cost of the computing device having a plurality of motherboards is decreased.
Although certain embodiments of the present disclosure have been specifically described, the present disclosure is not to be construed as being limited thereto. Various changes or modifications may be made to the present disclosure without departing from the scope and spirit of the present disclosure.
Number | Date | Country | Kind |
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101125856 | Jul 2012 | TW | national |