The present disclosure relates to a power supply unit and a power supply system, and more particularly to a power supply unit and a power supply system with reduced system malfunction and improved reliability.
With the development of the electronics industry, power supply systems have been widely used to supply power. The power supply system usually includes a plurality of power supply units in parallel connection. In addition, the plurality of power supply units are connected with a system bus. Furthermore, an ORing device is disposed between each power supply unit and the system bus for isolation. For example, the ORing device is used to prevent the reverse current from flowing back from the system bus to the power supply unit. For example, the ORing devices may be realized with ORing field effect transistors. As the output power of the power supply system increases, the loss caused by the voltage drop of the ORing field effect transistor also increases dramatically. In order to reduce the power loss, it is necessary to reduce the on-resistance (Rdson) of the ORing field effect transistor.
However, the conventional approach to reduce the power loss is aimed to find ORing field effect transistors with lower on-resistance, or to use a plurality of ORing field effect transistors in parallel connection. However, the conventional approaches still have some drawbacks. For example, when the power supply unit is plugged into the system bus of the power supply system and not connected with an input power, the ORing field effect transistors may be unexpectedly connected and result in malfunctions because of the influence of stray parameters and the insertion speed. If the malfunctions of the ORing field effect transistors occur, the system voltage of the power supply system instantly charges internal capacitor of the plugged power supply unit. Consequently, the voltage of the power supply system drops. Under this circumstance, the power supply system is prone to crashes or malfunctions.
In another conventional approach, the characteristics of the ORing field effect transistors are carefully selected to reduce the probability of malfunction. However, this approach also brings restrictions on the use of materials, making the production of power supply unit or the power supply system difficult. In another example, the capacitance between the gate terminal and the source terminal of the ORing field effect transistor is increased to intervene in the equivalent capacitance between the gate terminal and the source terminal of the field effect transistor to reduce the probability of malfunction. However, this approach will also slow down the turn-off speed of the ORing field effect transistor, resulting in the reduced reliability of the power supply unit and the power supply system.
Therefore, it is important to provide an improved power supply unit and an improved power supply system in order to overcome the drawbacks of the conventional technologies.
An object of the present disclosure provides a power supply unit and a power supply system. The power supply unit includes a switch. The switch is electrically connected between a driving circuit and a control terminal of an ORing field effect transistor. Before the power supply unit is plugged into a system bus of a power supply system and electrically connected with another operating power supply unit of the power supply system in parallel, the ORing field effect transistor is turned off. Since the possibility of causing malfunction of the power supply system is minimized, the reliability of the power supply system is enhanced.
In accordance with an aspect of the present disclosure, a power supply unit is provided. The power supply unit includes an input terminal, an output terminal, a main circuit, an ORing field effect transistor, a driving circuit and a switch. The input terminal selectively receives an input voltage. The main circuit is electrically connected between the input terminal and the output terminal. After the input voltage is received by the main circuit, the input voltage is converted into an output voltage by the main circuit. The ORing field effect transistor is electrically connected between the output terminal and the main circuit. The driving circuit is electrically connected with a control terminal of the ORing field effect transistor. The driving circuit detects a current from the main circuit and generates a detection result. The driving circuit generates a control signal according to the detection result. The ORing field effect transistor is controlled according to the control signal. The switch is electrically connected between the driving circuit and the control terminal of the ORing field effect transistor. Before the power supply unit is plugged into a system bus of a power supply system and electrically connected with another operating power supply unit of the power supply system in parallel and the power supply unit does not receive the input voltage, the control signal from the driving circuit is bypassed by the switch, and the control signal from the driving circuit fails be transmitted to the control terminal of the ORing field effect transistor. Consequently, the ORing field effect transistor is turned off.
In accordance with another aspect of the present disclosure, a power supply system is provided. The power supply system includes a system bus and a plurality of power supply units. The plurality of power supply units are operably plugged into the system bus. Each of the plurality of power supply units includes an input terminal, an output terminal, a main circuit, an ORing field effect transistor, a driving circuit and a switch. The input terminal selectively receives an input voltage. The main circuit is electrically connected between the input terminal and the output terminal. After the input voltage is received by the main circuit, the input voltage is converted into an output voltage by the main circuit. The ORing field effect transistor is electrically connected between the output terminal and the main circuit. The driving circuit is electrically connected with a control terminal of the ORing field effect transistor. The driving circuit detects a current from the main circuit and generates a detection result. The driving circuit generates a control signal according to the detection result. The ORing field effect transistor is controlled according to the control signal. The switch is electrically connected between the driving circuit and the control terminal of the ORing field effect transistor. A first power supply unit of the plurality of power supply units is plugged into the system bus and receives an input voltage. Before the second power supply unit is plugged into the system bus and electrically connected with the first power supply unit in parallel and the second power supply unit does not receive an input voltage, the control signal from the driving circuit of the second power supply unit is bypassed by the switch, and the control signal from the driving circuit fails be transmitted to the control terminal of the ORing field effect transistor. Consequently, the ORing field effect transistor is turned off.
In accordance with another aspect of the present disclosure, a power supply unit is provided. The power supply unit includes an input terminal, an output terminal, a main circuit, an Oring field effect transistor, a driving circuit, a reference voltage source and a switch. The main circuit is electrically connected between the input terminal and the output terminal for converting an input voltage received from the input terminal to an output voltage. The ORing field effect transistor is electrically connected between the output terminal and the main circuit. The driving circuit is electrically connected with a control terminal of the ORing field effect transistor for controlling a conduction status of the ORing field effect transistor. The switch includes a first end connected with the control terminal of the ORing field effect transistor and a second end connected with the reference voltage source. When the input terminal does not receive the input voltage, the reference voltage source provides a first voltage for conducting the switch so that the ORing field effect transistor is turned off. When the input terminal receives the input voltage, the reference voltage source provides a second voltage for not conducting the switch so that the driving circuit controls the conduction status of the ORing field effect transistor.
The above contents of the present disclosure will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed description and accompanying drawings, in which:
The present disclosure will now be described more specifically with reference to the following embodiments. It is to be noted that the following descriptions of preferred embodiments of this disclosure are presented herein for purpose of illustration and description only. It is not intended to be exhaustive or to be limited to the precise form disclosed.
Please refer to
Each power supply unit 2 includes a main circuit 20, an ORing field effect transistor 21, a switch 22 and a driving circuit 23. The input terminal of the main circuit 20 is electrically connected with the input terminal of the power supply unit 2. Moreover, the input terminal of the main circuit 20 selectively receives the input voltage Vin from an input power source, and the main circuit 20 converts the input voltage Vin received from the input terminal into an output voltage.
The ORing field effect transistor 21 includes a first terminal, a second terminal and a control terminal. The first terminal of the ORing field effect transistor 21 is electrically connected with the output terminal of the main circuit 20. The second terminal of the ORing field effect transistor 21 is electrically connected with the output terminal of the power supply unit 2. The output voltage is outputted from the output terminal of the main circuit 20 when the ORing field effect transistor 21 is conducted.
The driving circuit 23 is electrically connected with the control terminal of the ORing field effect transistor 21 for controlling a conduction status of the ORing field effect transistor 21. For example, the driving circuit 23 may detect the voltages respectively at the input terminals and the output terminals for determining whether to conduct the ORing field effect transistor 21. In another embodiment, the current from the output terminal of the main circuit 20 is detected by the driving circuit 23 for determining whether to conduct the ORing field effect transistor 21. The driving circuit 23 may transmit a control signal to and/or change the voltage level of the control signal at the control terminal of the ORing field effect transistor 21 according to the detection result. According to the control signal, the conduction status of the ORing field effect transistor 21 is correspondingly controlled. In case that the ORing field effect transistor 21 is turned off, the reverse current is prevented from flowing back from the system bus 3 to the later-plugged power supply unit 2. Moreover, in case that the driving circuit detects the power supply unit 2 is abnormal, the ORing field effect transistor 21 is turned off according to the control signal.
A first end of the switch 22 is electrically connected with the driving circuit 23 and the control terminal of the ORing field effect transistor 21 and a second end of the switch 22 is electrically connected with a reference voltage source Vcc. As mentioned above, the second power supply unit 2 does not receive the input voltage Vin, and the second power supply unit 2 is ready to be plugged into the system bus 3. In order to electrically connect the second power supply unit 2 with the first power supply unit 2 already in operation through the system bus 3, the control signal from the driving circuit 23 is bypassed by the switch 22 of the second power supply unit 2. Consequently, the control signal from the driving circuit 23 is unable to be transmitted to the control terminal of the ORing field effect transistor 21. In this way, the ORing field effect transistor 21 of the second power supply unit 2 is turned off. In an embodiment, when the input terminal of the power supply unit 2 does not receive the input voltage Vin, the reference voltage source Vcc provides a first voltage (e.g. the ground voltage level) for conducting the switch so that the ORing field effect transistor 21 is turned off. When the input terminal of the power supply unit 2 receives the input voltage Vin, the reference voltage source Vcc provides a second voltage for not conducting the switch so that the driving circuit 23 controls the conduction status of the ORing field effect transistor 21.
Since the operations of the first power supply unit 2 are not influenced by the later-plugged second power supply unit 2, the increase of the output power of the power supply system I does not need to be taken into consideration. Furthermore, the problems of connecting the plurality of ORing field effect transistors in parallel and the problems of selecting the characteristics of the ORing field effect transistors can be effectively overcome. Since the possibility of causing malfunction of the power supply system 1 is minimized, the reliability of the power supply system is enhanced.
In an embodiment, the switch 22 is realized with a diode D. The anode of the diode D is electrically connected between the driving circuit 23 and the control terminal of the ORing field effect transistor 21. The cathode of the diode D is electrically connected with a reference voltage source Vcc inside the power supply unit 2. The supply voltage from the reference voltage source Vcc and the input voltage Vin of the power supply unit 2 are in a proportional relation. If the power supply unit 2 does not receive the input voltage Vin, the supply voltage from the reference voltage source Vcc is configured to be the first voltage level (e.g., the ground voltage level). Before the second power supply unit 2 receives the input voltage Vin and the second power supply unit 2 is plugged into the system bus 3, the supply voltage from the reference voltage source Vcc is the first voltage level and the switch 22 is conducted. The control terminal of the ORing field effect transistor 21 is therefore connected with the first voltage level. The control signal from the driving circuit 23 of the second power supply unit 2 is bypassed by the diode D in the switch 22 of the second power supply unit 2. Consequently, the control signal from the driving circuit 23 cannot be transmitted to the control terminal of the ORing field effect transistor 21 or cannot control the ORing field effect transistor 21 with the control signal. In this way, the ORing field effect transistor 21 of the second power supply unit 2 is turned off.
In an embodiment, when the control signal from the driving circuit 23 is in the high voltage level state and the switch 22 is turned off, the ORing field effect transistor 21 is turned on. When the control signal from the driving circuit 23 is in the low voltage level state, the ORing field effect transistor 21 is turned off.
In another embodiment, the switch 22 includes a Zener diode. The anode of the Zener diode is electrically connected between the driving circuit 23 and the control terminal of the ORing field effect transistor 21. The cathode of the Zener diode is electrically connected with the reference voltage source Vcc inside the power supply unit 2.
From the above descriptions, the present disclosure a power supply unit and a power supply system. The second power supply unit of the power supply system is ready to be plugged into the system bus and does not receive the input voltage. When the second power supply unit is being plugged into the system bus, the control signal from the driving circuit of the second power supply unit is bypassed by the switch of the second power supply unit. Consequently, the control signal from the driving circuit cannot be transmitted to the control terminal of the ORing field effect transistor. In this way, the ORing field effect transistor of the second power supply unit is turned off. Under this circumstance, the output voltage from the second power supply unit can be substantially maintained at the original level, and the voltage across the ORing field effect transistor can be substantially maintained at the original level. Since the operations of the first power supply unit are not influenced by the later-plugged second power supply unit, the increase of the output power of the power supply system does not need to be taken into consideration. Furthermore, the problems of connecting the plurality of ORing field effect transistors in parallel and the problems of selecting the characteristics of the ORing field effect transistors can be effectively overcome. Since the possibility of causing malfunction of the power supply system is minimized, the reliability of the power supply system is enhanced.
While the disclosure has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the disclosure needs not be limited to the disclosed embodiment. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.
Number | Date | Country | Kind |
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202410251804.2 | Mar 2024 | CN | national |
This application claims the benefit of U.S. Provisional Application Ser. No. 63/521,951 filed on Jun. 20, 2023, and claims priority to China Patent Application No. 202410251804.2 filed on Mar. 6, 2024, the entire contents of which are incorporated herein by reference for all purposes.
Number | Date | Country | |
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63521951 | Jun 2023 | US |