FIELD
Embodiments of the present invention may relate to transformers.
BRIEF DESCRIPTION OF THE DRAWINGS
An understanding of embodiments of the present invention may become apparent from the following detailed description of arrangements and example embodiments and the claims when read in connection with the accompanying drawings, all forming a part of the disclosure of this invention. While the following written and illustrated disclosure focuses on disclosing arrangements and example embodiments of the invention, it should be clearly understood that the same is by way of illustration and example only and embodiments of the present invention are not limited thereto.
The following represents brief descriptions of the drawings in which like reference numerals represent like elements and wherein:
FIG. 1 shows a schematic of an N-phase multi-phase transformer in cyclic cascade configuration according to an example arrangement;
FIG. 2 is a cross section of a multi-layer planar interconnect technology that includes multiple interconnect layers to implement wires (or wire segments) according to an example arrangement;
FIG. 3 shows two parallel round wires and a corresponding generated magnetic field according to an example arrangement;
FIG. 4 shows three parallel round wires and a corresponding generated magnetic field according to an example arrangement;
FIGS. 5 and 6 illustrate planar wire configurations as well as the generated magnetic fields according to example arrangements;
FIG. 7 shows another planar wire configuration as well as a generated magnetic field according to an example arrangement;
FIG. 8 shows an N-phase planar transformer arranged in a cyclic cascade configuration according to an example embodiment of the present invention;
FIG. 9 shows a corresponding four-phase power transformer (prior to being folded) according to an example embodiment of the present invention;
FIG. 10 shows a corresponding four-phase power transformer (after being folded) according to an example embodiment of the present invention;
FIGS. 11A and 11B show an eight-phase power transformer according to an example embodiment of the present invention;
FIGS. 12A and 12B show an eight-phase power transformer according to an example embodiment of the present invention; and
FIG. 13 is a block diagram of a system according to an example embodiment of the present invention.
DETAILED DESCRIPTION
In the following detailed description, like reference numerals and characters may be used to designate identical, corresponding or similar components in differing figure drawings. Further, in the detailed description to follow, example sizes/models/values/ranges may be given although embodiments of the present invention are not limited to the same. Where specific details are set forth in order to describe example embodiments of the invention, it should be apparent to one skilled in the art that the invention can be practiced without these specific details.
Various arrangements and embodiments will be described with respect to layers and wires. These layers/wires may be described as upper and/or lower layers/wires. The use of the terms upper and lower are merely illustrative of the accompanying drawings. Further, the terms upper and lower may also be considered relative to each other. Similar interpretations should also be used for the terms top and bottom as they are illustrative of the accompanying drawings and/or with respect to each other.
Embodiments of the present invention may provide high-frequency transformers for use in planar interconnect technologies without using magnetic material for coupling (i.e., without magnetic material within a core or without any substantial amount of magnetic material in the core). The transformers may include windings surrounding by air or nonmagnetic material (such as materials to make an integrated circuit (IC) package or a combination of several nonmagnetic materials and air). In the absence (or substantial absence) of magnetic materials in the core, the coupling of the magnetic field occurs substantially as if the windings were surrounded by vacuum. These transformers may operate at frequencies greater than 10 MHz, for example. The transformers may be implemented in various multi-layer technologies including, but not limited to, printed circuit boards, multi-layer package substrates, and/or on-chip interconnects. For example, one application of a transformer according to an example embodiment of the present invention may be for use in high-density integrated power delivery (such as power delivery of approximately 100 W/cm2). Other applications may include radio frequency (RF) and microwave circuits as well as wireless circuits.
FIG. 1 shows a schematic of an N-phase multi-phase transformer in a cyclic cascade configuration according to an example arrangement. Other arrangements are also possible. This topology may be derived from an N-phase buck converter that uses N inductors. In order to obtain the FIG. 1 arrangement, each inductor of the buck converter may be replaced by a transformer with two windings so as to introduce coupling to immediately preceding and successive phases.
More specifically, FIG. 1 shows N input ports A0-AN−1 and a common output port B (or node). Coupling may be such that a common mode current flowing through the input ports A0-AN−1 may result in a negligible total magnetic field and therefore the common mode current at the common output port B may experience a much lower series inductance as compared to a total inductance of all input ports. This may be realized by coupling the windings so that the magnetic fields generated by the common mode input currents of each of the ports A0-AN−1 essentially cancels out and the two induced voltages across any one of the two transformer windings connected in series also essentially cancels out.
In switching power supplies, there may be a tradeoff between fast load regulation and high efficiency operation. For example, fast load regulation may utilize small output inductance while high efficiency operation may utilize large input inductance in order to reduce resistive losses due to ripple current. For a buck converter, the output inductance and the input inductance may be equal. For a transformer having the FIG. 1 arrangement, the output inductance may be smaller than the input inductance. The output inductance may be negligible if coupling between the different transformer windings is close to 100%. Further, the windings may be coupled with proper polarity and the inductances of the windings may be approximately equal.
FIG. 2 is a cross section of a multi-layer planar interconnect technology that includes multiple interconnect layers to implement wires (or wire segments) according to an example arrangement. Other arrangements are also possible. Connections between different layers may be made through vias and/or metal trenches. The cross section shown in FIG. 2 may be representative of printed circuit boards, multi-layer packages and/or on-chip interconnects. Embodiments of the present invention may apply to all planar interconnect technologies.
FIG. 3 shows two parallel round wires and a corresponding generated magnetic field according to an example arrangement. Other arrangements are also possible. As shown, two parallel round wires 10 and 20 may be provided and may be coupled by a conductive material such as a wire. The first wire 10 may have an input port A0 to receive an input current I0 and the second wire 20 may have an output port B to output the current I0. In this example arrangement, a spacing between the two round wires 10 and 20 may be several times (˜10×) larger than a diameter of one of the wires, and the wires 10, 20 may be several times (˜10×) longer than spacing between the wires. An inductance per length may be proportional to a total magnetic flux between ports A and B. Because of topological symmetry, each wire 10, 20 may contribute exactly one-half to a total magnetic flux. The constructive coupling of flux of two parallel wires with opposite current may also lead to self-inductance.
FIG. 1 shows that any coupled winding may couple to one of the windings connected in series. Therefore, if input currents are the same and the coupling is 100%, then each coupled winding may cancel out one-half of the total flux of the two windings connected in series. Additionally, for coupling of less than 100%, less than one-half of the flux may cancel out. A similar effect may be accomplished by adding an additional wire as will now be described and shown with respect to FIG. 4.
FIG. 4 shows three parallel round wires and a corresponding generated magnetic field according to an example arrangement. Other arrangements are also possible. As shown, three parallel round wires 10, 20 and 30 may be provided. The first wire 10 may have an input port A0 to receive an input current I0, the second wire 20 may have an output port B to output the current I0 and the third wire 30 may have an input port A1 to receive an input current I1. The first wire 10 may be coupled to the second wire 20 by a conductive material such as a wire. A magnetic field produced by the current I1, flowing into port A1 may cancel out a magnetic field produced by the current I0 flowing out of port B. If both currents I0 and I1 are equal, then the remaining flux may be only the flux generated by the current I0 flowing into port A0. Therefore, up to one half of the flux may cancel out in this type of arrangement. Stated differently, such an arrangement as shown in FIG. 4 may lead to mutual inductance with partial canceling of magnetic fields produced by currents flowing into ports A0 and A1.
FIGS. 5 and 6 illustrate planar wire configurations as well as the generated magnetic fields according to example arrangements. Other arrangements are also possible. More specifically, these figures show wide aspect ratio wires implemented with planar interconnect technology so as to provide further canceling of magnetic fields. As compared to the FIG. 3 arrangement, these planar interconnects may have a wire thickness much smaller than a wire width. Width-to-thickness ratios may be 10:1. To maximize coupling between parallel planar wires, the wires are adjacent on long edges. This may maximize an overlap of generated magnetic fields and coupling.
FIG. 7 shows another planar wire configuration as well as a generated magnetic field according to an example arrangement. Other arrangements are also possible. In the FIG. 7 arrangement, input ports A0 and A1 may be provided on a same interconnect layer (or same planar layer). For example, input ports A0 and A1 may be provided on one interconnect level and output port B (or output node) may be provided on another interconnect layer. A via 70 may be used to connect wire segments on different interconnect layers. For example, in this arrangement the via 70 may be coupled to the planar wire corresponding to the input port associated with the planar wire corresponding to the output port B. Thus, mutual inductance may be obtained with input ports on a same level.
Embodiments of the present invention may provide a multi-phase transformer that includes a first interconnect layer and a second interconnect layer. The first interconnect layer may include a first planar wire and a second planar wire whereas the second interconnect layer may include a third planar wire and a fourth planar wire. The first planar wire and the second planar wire of the first interconnect layer form two transformers with planar wires of the second interconnect wire. Additionally, a coupling device, such as loopback connection, may couple one of the planar wires of the first interconnect layer with one of the planar wires of the second interconnect layer.
FIG. 8 shows an N-phase planar transformer arranged in a cyclic cascade configuration according to an example embodiment of the present invention. Other embodiments and configurations are also within the scope of the present invention. More specifically, FIG. 8 shows a 4-phase transformer 100 (i.e., N=4), although other numbers of phases may be used. The four-phase transformer 100 may be formed on two interconnect layers (or two planar layers) that may be coupled together by vias (or metal trenches).
On a first interconnect layer (i.e., the upper planar layer shown in FIG. 8), input ports A0, A1, A2 and A3 may each be provided along corresponding planar wires. For example, on the upper interconnect layer a first planar wire may have an input port A0 to receive an input current I0, a second planar wire may have an input port A1 to receive an input current I1, a third planar wire may have an input port A2 to receive an input current I2 and a fourth planar wire may have an input port A3 to receive an input current I3.
On a second interconnect layer (i.e., the lower planar layer shown in FIG. 8), other planar wires may all couple to a common output port B (or common output node). For ease of discussion, each of the output ports is labeled in a manner corresponding to the planar wire on the layer immediately above the lower layer in FIG. 8. For example, on the lower interconnect layer, a fifth planar wire may have an output port B3 to output the current I2, a sixth planar wire may have an output port B2 to output the current I1, a seventh planar wire may have an output port B1 to output the current I0 and an eighth planar wire may have an output port B0 to output the current I3. The output ports B0-B3 may be commonly coupled to the output port B (or output node).
Because the transformer 100 uses only two interconnect layers (i.e., the upper planar layer and the lower planar layer), a loopback connection 110 may be used to couple the fourth planar wire corresponding to input port A3 and the eighth planar wire corresponding to output port B0. For example, the loopback connection 110 may be coupled by a via 111, for example, to the fourth planar wire corresponding to the input port A3. The loopback connection 110 may also be coupled to the eighth planar wire corresponding to the output port B0. The loopback connection 110 may also be referred to as a coupling device to couple different layers of the transformer 100. An inductance of the loopback connection 110 may result in an increased output inductance and a larger input inductance for the planar wire corresponding to input port A3 as compared to the planar wires corresponding to the input ports A0-A2.
FIG. 8 also shows vias 112, 114 and 116 to couple various planar wires on different layers of the transformer 100. For example, the via 112 may couple the first planar wire corresponding to the input port A0 with the seventh planar wire corresponding to the output port B1. The via 114 may couple the second planar wire corresponding to the input port A1 with the sixth planar wire corresponding to the output port B2. Additionally, the via 116 may couple the third planar wire corresponding to the input port A2 with the fifth planar wire corresponding to the output port B3. Rather than vias, other coupling mechanisms such as metal trenches may also be used to couple planar wires.
The transformer 100 may work well for a small number of phases (N) and when the inductance of the loopback connection 110 is small. In order to reduce the effect of the loopback connection 110, a length of the transformer 100 may be several times (˜3×) larger than a width of the transformer 100. However, for a large length, the transformer may consume a significant routing area (or footprint).
Embodiments of the present invention may also provide a multi-phase transformer that includes a first interconnect layer, a second interconnect layer, a third interconnect layer and a fourth interconnect layer. The first and second interconnect layers may form an upper section of the transformer and the third and fourth interconnect layers may form a lower section of the transformer. A coupling device, such as a via or a metal trench, may couple one of the planar wires of the first interconnect layer with one of the planar wires of the third interconnect layer. Additionally, a loopback connection may couple one of the planar wires of the first interconnect layer with one of the planar wires of the second interconnect layer. Still further, another coupling device, such as a via or a metal trench for example, may couple one of the planar wires of the second interconnect layer with one of the planar wires of the third interconnect layer. A coupling device, such as a via or a metal trench, may couple one of the planar wires of the first interconnect layers with one of the planar wires of the fourth interconnect layer.
FIG. 9 shows a four-phase power transformer (prior to being folded) according to an example embodiment of the present invention. Additionally, FIG. 10 shows a corresponding four-phase power transformer (after being folded) according to an example embodiment of the present invention. Other embodiments and configurations are also within the scope of the present invention. More specifically, FIG. 9 shows a transformer 150 similar to the transformer 100 shown in FIG. 8 and therefore the structure will not be described again in detail. FIG. 9 also shows folding lines X and Y to show how the transformer 150 may be folded into two additional layers of the interconnect structure so as to reduce a footprint, for example. That is, to reduce blockage, the transformer may be folded into a larger number of interconnect layers.
FIG. 10 shows the four-phase power transformer of FIG. 9 folded into two additional layers shown as the bottom two layers in FIG. 10. The fold of the transformer 150 occurs along folding lines X and Y. The input ports A0-A3 (generally identified by arrow 170) may be located under the common output port B (or common output node). That is, the input ports A0-A3 may form the bottom layer of the structure shown in FIG. 10. In this embodiment, connections 180, such as vias or metal trenches, may be provided at an area between the folding line Y and the folding line X for vertical and electrical connections between the top layers and the bottom layers of the four-phase transformer 150. Although not shown, the transformer may also be folded more than once. However, to minimize parasitic inductive coupling of the folded segments, a vertical distance between the folded segments may be substantially equal or larger than the lateral pitch of the wire segments.
FIGS. 11A and 11B show an eight-phase power transformer according to an example embodiment of the present invention. Other embodiments and configurations are also within the scope of the present invention. More specifically, FIG. 11A shows a power transformer 200 in a split (or unconnected) view, whereas FIG. 11B shows the power transformer 200 in a connected view.
The power transformer 200 may include four layers of interconnects to eliminate (or reduce) the loopback connection (as in FIGS. 8-10) and to enable a larger number of phases for the transformer. As shown, the transformer 200 may include an upper section 210 and a lower section 220. The upper section 210 may include two planar layers and the lower section 220 may include two planar layers. In FIG. 11A, the top layer of the upper section 210 includes the input ports A0-A3 and the bottom layer of the upper section includes common port B1 (or common node). The top layer of the lower section 220 includes the input ports A4-A7 and the bottom layer of the lower section 220 includes common port B2 (or common node).
FIG. 11A also shows a plurality of vias 232 that physically and electrically couple and/or connect the common port B1 of the upper section 210 and the common port B2 of the lower section 220. Additionally, a via 234 may physically and electrically couple a planar wire 212 with a planar wire corresponding to the input port A7. The planar wire 212 is a planar wire on the lower layer of the upper section 210 under the planar wire corresponding to the input port A0. Still further, a via 236 may physically and electrically couple a planar wire 222 (on the bottom layer of the lower section 220) and a planar wire on the upper section 210 corresponding to the input port A3. The vias 234 and 236 act as coupling devices to couple ends of planar wires on different interconnect layers. Other types of coupling devices such as metal trenches may also be used.
This type of transformer 200 as shown in FIGS. 11A-11B may be suitable for an even-numbered (N) of phases. For example, if N=8 as in FIGS. 11A-11B, then an input inductance for A0-A2 (i.e., A0-AN/2−2) and A4-A6 (i.e., AN/2-AN−2) may depend on a lateral pitch of wire segments while an input inductance for A3 (i.e., AN/2−1) and A7 (i.e., AN−1) may depend on a vertical distance between the two innermost interconnect layers. A substantially equal input inductance may be obtained for all inputs by properly optimizing (or improving) the wire pitch so that the inductances are substantially equal. Because there is no loopback connection, the FIG. 11 transformer 200 may achieve a smaller output inductance as compared to the FIG. 8 transformer and the FIG. 10 transformer. Depending on the wire pitch, the input ports A4-A7 (i.e., AN/2-AN−1) may be difficult to route because they terminate on an inner layer.
FIGS. 12A-12B show an eight-phase power transformer according to an example embodiment of the present invention. Other embodiments and configurations are also within the scope of the present invention. FIG. 12A shows a planar transformer 250 in a split (or unconnected) view, whereas FIG. 12B shows the planar transformer 250 in a connected view. The transformer 250 allows easy routing of all the input ports as well as a common output port B (or node) to any layer without incurring too much additional series inductance.
As shown, the transformer 250 may include an upper section 260 and a lower section 270. The upper section 260 may include two planar layers and the lower section 270 may include two planar layers. In FIG. 12A, the top layer of the upper section 260 includes the input ports A0-A3 and the bottom layer of the upper section includes common port B1 (or common node). The bottom layer of the lower section 270 includes the input ports A4-A7 and the top layer of the lower section 270 includes common port B2 (or common node).
FIG. 12B shows input ports A0, A1, A2 and A3 on a first layer (i.e., an upper or top layer of the upper section 260) and input ports A4, A5, A6 and A7 on a fourth layer (i.e., a lower or bottom layer of the lower section 270), although the input ports may also be provided on other layers. As shown, the output ports B1 and B2 (or nodes) are provided on the second and third layers (i.e., the middle layers) of this four layer embodiment.
FIG. 12A also shows a plurality of vias 282 that physically and electrically couple or connect the common port B1 of the upper section 260 and the common port B2 of the lower section 270. Additionally, a via 284 may physically and electrically couple a planar wire corresponding to the input port A7 with a planar wire 262 coupled to the common port B1. Wire 262 is a planar wire under the wire corresponding to the input port A0. Still further, a via 286 may physically and electrically couple a planar wire 272 (on the top layer of the lower section 270) and a planar wire corresponding to the input port A3. The planar wire 272 is a planar wire on the upper layer of the lower section 270 above the planar wire corresponding to the input port A4. Other types of coupling devices such as metal trenches may also be used.
FIG. 13 is a block diagram of a system (such as a computer system 400) according to an example embodiment of the present invention. Other embodiments and configurations are also within the scope of the present invention. More specifically, the computer system 400 may include a processor 410 that may have many sub-blocks such as an arithmetic logic unit (ALU) 412 and an on-die (or internal) cache 414. The processor 410 may also communicate to other levels of cache, such as off-die cache 420. Higher memory hierarchy levels such as a system memory 430, such as random access memory (RAM), may be accessed via a host bus 440 and a chip set 450. The system memory 430 may also be accessed in other ways, such as directly from the processor 410 and/or without passing through the host bus 440 and/or the chip set 450. In addition, other off-die functional units such as a graphical interface 460 and a network interface 470, to name just a few, may communicate with the processor 410 via appropriate busses or ports. The processor 410 may also be powered by an external power supply 480. The system may also include a wireless interface 490 or 495 to interface the system 400 with other systems, networks, and/or devices via a wireless connection. The various multi-phase transformers discussed above may be provided on a die, package substrate or a printed circuit board (such as the chip set 450, for example) within the system 400 so as to provide supply power to a device within the system 400.
Systems incorporating embodiments of the present invention can be of any number of types. Examples of represented systems include computers (e.g., desktops, laptops, handhelds, servers, tablets, web appliances, routers, etc.), wireless communications devices (e.g., cellular phones, cordless phones, pagers, personal digital assistants, etc.), computer-related peripherals (e.g., printers, scanners, monitors, etc.), entertainment devices (e.g., televisions, radios, stereos, tape and compact disc players, video cassette recorders, camcorders, digital cameras, MP3 (Motion Picture Experts Group, Audio Layer 3) players, video games, watches, etc.), and the like.
Any reference in this specification to “one embodiment,” “an embodiment,” “example embodiment,” etc., means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with any embodiment, it is submitted that it is within the purview of one skilled in the art to effect such feature, structure, or characteristic in connection with other ones of the embodiments.
Although embodiments of the present invention have been described with reference to a number of illustrative embodiments thereof, it should be understood that numerous other modifications and embodiments can be devised by those skilled in the art that will fall within the spirit and scope of the principles of this invention. More particularly, reasonable variations and modifications are possible in the component parts and/or arrangements of the subject combination arrangement within the scope of the foregoing disclosure, the drawings and the appended claims without departing from the spirit of the invention. In addition to variations and modifications in the component parts and/or arrangements, alternative uses will also be apparent to those skilled in the art.
Patent Grant
7436277
