Patent Application
20250219389
This application claims the benefit of German Patent Application No. 102024100120.8, filed on Jan. 3, 2024, which application is hereby incorporated herein by reference.
This application relates to the field of electronic circuits and, in particular, to power transistor control and overcurrent detection.
So-called intelligent semiconductor switches or smart switches are integrated circuits which include, besides the semiconductor switch as such (usually a power transistor), additional circuits that are configured to perform various auxiliary functions such as current measurement, temperature measurement, current limitation, circuit diagnosis, digital communication with other circuits, etc. Some of these auxiliary functions are implemented to protect the integrated circuit from being operated outside its safe operation area (SOA). Overcurrent switch-off and current limitation are examples of such protective functions and are a requirement for many applications.
Intelligent semiconductor switches may be used, for example, in automotive applications to protect electronic circuits or devices from too high currents, thereby replacing traditional fuses. However, the own current consumption of these intelligent switches can be relatively high, which can be a problem, for example, when a vehicle is parked because the overall current consumption has to be low in order to avoid excessively discharging the battery.
In order to reduce the power consumption of the smart switch, a so-called idle-mode may be introduced, which is a low power mode in which the electronic switch is switched on but only some of the functions of the intelligent switch are active. In particular, the precise current measurement and the conventional overcurrent protection of the power switch, which have a relatively high power consumption, should be inactive in idle-mode.
However, the transition from idle-mode to normal-mode when the vehicle is started after parking takes a certain amount of time, during which the power transistor and the smart switch would not be protected by the conventional overcurrent protection. In this period of time, fast rising load current transients, typically due to short circuits, could occur and harm the device.
The above-mentioned objective is achieved by using an emergency overcurrent circuit that is active in the idle-mode and that fulfills the low supply current requirements. This emergency overcurrent circuit is able to quickly react to fast current transients in the idle-mode and protects the power transistor during the transition from the idle-mode to the normal-mode until the conventional overcurrent protection is available after a mode change to active-mode (normal-mode). To avoid any interaction with application relevant load current changes, only fast transients, which reflect a short circuit, are detected and lead to a protective switch-off.
In one example, the disclosure is directed to a circuit comprising a power transistor connected between a supply terminal and an output terminal, a control circuit coupled to a gate electrode of the power transistor and configured to apply a gate current to the gate electrode to turn the power transistor on or off, and an overcurrent protection circuit that is connected to the power transistor. The circuit can be in a first mode, in which some functions of the circuit are inactive to reduce power consumption, and in a second mode, in which all functions of the circuit are active. The overcurrent protection circuit is configured to, when the circuit is in the first mode and a sense signal indicative of a current passing through the power transistor has reached a first threshold, cause the circuit to change from the first mode to the second mode, which requires a specific transition time beginning at the sense signal reaching the first threshold. The overcurrent protection circuit is further configured to, when the sense signal has reached a second threshold and the transition time is not over, output, during the transition time, a discharge signal that leads to a reduction of the gate current that is applied to the gate electrode.
In one example, the disclosure is directed to a method comprising the steps of: switching on and off a power transistor of a circuit according to a gate current that is applied to a gate electrode of the power transistor, wherein the circuit can be in a first mode, in which some functions of the circuit are inactive to reduce power consumption, and in a second mode, in which all functions of the circuit are active; detecting, when the circuit is in the first mode, that a sense signal indicative of a load current passing through the power transistor has reached a first threshold, and, in response thereto, changing the circuit from the first mode to the second mode, wherein the change from the first mode to the second mode requires a specific transition time that begins with the sense signal reaching the first threshold; and detecting that the sense signal has reached a second threshold, and, in response thereto, outputting, during the transition time, a discharge signal which causes the reduction of the control current that is applied to the control electrode.
The embodiments described herein can be better understood with reference to the following description and drawings. The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the embodiments. Furthermore, in the figures, like reference numerals designate corresponding parts. In the drawings:
Some embodiments are directed to intelligent semiconductor switches and/or to an intelligent semiconductor switch having an idle-mode state. In some embodiments, an intelligent semiconductor switch circuit includes a power transistor, which is capable of efficiently protecting the power transistor from overcurrents during an idle-mode.
Before various embodiments are described in more detail, an example of a conventional intelligent semiconductor switch (smart switch) 100 is described with reference to
In the example of
The intelligent semiconductor switch 100 of
In some examples, an over-current switch-off is implemented in addition to a current limitation. In the present example, the overcurrent protection circuit 12 is coupled to a sense electrode of the power transistor TL which provides a sense current IS, which is indicative of the load current IL passing through the power transistor. The conventional overcurrent protection circuit 12 is further configured to generate a protection signal OC which is received by the control circuit 11. The protection signal OC is a logic signal, wherein, for example, a High level indicates the detection of an overcurrent, whereupon the control circuit 11 outputs a signal (as control signal SON) to the driver circuit 13 that leads to the mentioned over-current switch-off.
It is understood that the intelligent semiconductor switch also comprises a plurality of other circuits, such as an overvoltage clamping circuit and/or an overtemperature circuit, which are not shown in
In certain situations, for example when a vehicle is parked, the own current consumption (represented by Ignd in
Because of the intrinsic reaction times of the different circuits and of the propagation delays introduced by the circuits when they send signals, a transition from idle-mode to normal-mode does not occur immediately. Instead, it takes a certain amount of time (mode transition time ttransition), during which the conventional overcurrent protection 12 is not available and fast rising load current transients, typically due to short circuits, may occur and harm the device during the transition time period.
This problem is further illustrated in
A first possibility would be to keep the conventional overcurrent protection active in the idle-mode, which has a good accuracy. However, this would lead to a significant higher current consumption Ignd which is not compatible with the low current requirements of the idle-mode.
A further possibility would be to add a conventional low power overcurrent protection circuit that is able to operate with low power consumption. However, the known circuits lack accuracy and would not be able to fulfill the overcurrent requirements because the performance of the protection stage is limited by the current consumption.
When a fast transient event is detected, the additional overcurrent protection circuit 15 sends a signal to the driver circuit 13 that leads to a switching off of the power transistor TL within a short period of time, and thus to an almost immediate decrease of the load current IL. The additional overcurrent protection circuit 15 is further configured to generate a signal IDLE_off that is received by the control circuit 11 and leads to a change of the control circuit 11 and of the smart switch 10 from the idle-mode to the normal-mode.
The additional overcurrent protection circuit 15 has a reaction time that is significantly quicker than the transition time ttransition that is required by the conventional overcurrent protection circuit 12 to be fully operational. The additional overcurrent protection circuit 15 thus ensures that the power transistor TL of the smart switch 10 be protected in the transition phase between the idle-mode and the normal-mode when the conventional overcurrent protection circuit 12 is not yet active, as is explained in further details below.
In the idle-mode, the conventional overcurrent protection circuit 12 is inactive, while the additional overcurrent protection 15 is active. During the transition between the idle-mode and the normal-mode, the additional overcurrent protection circuit 15 protects the switch against fast transient overcurrent conditions until the conventional overcurrent protection 12 is fully operational. In the normal-mode, only the conventional overcurrent protection circuit 12 is active and the additional overcurrent protection 15 is inactive.
In the depicted example, the sense signal ΔVBE is a voltage equal to the drain-source voltage VDS across the power transistor TL. As the transistor TL is conductive (switched on) the drain-source voltage VDS equals IL. RON, wherein RON denotes the (known) on-resistance of the transistor TL. Accordingly, ΔVBE˜IL·RON, and thus ΔVBE can be used as sense signal that represents the load current IL.
The first comparator K1 is configured to output a signal IDLE_off to the control circuit 11 when the sense signal ΔVBE reaches or exceeds a first threshold Idle_thres_slow. Upon receiving a specific logic level (e.g. a High Level) of the signal IDLE_off, the control circuit 11 wakes up from idle-mode and initiates a mode change of the smart switch 10 from idle-mode the normal-mode. Specifically, it sends corresponding wake-up signals (not shown in the figures) to the other inactive circuits of the smart switch 10, in particular to the conventional overcurrent protection circuit 12. The wake-up signals are configured to cause the inactive circuits to be activated and to activate all functions of the smart switch 10. As already discussed with reference to
In the present example, the first comparator K1 has a first reaction time t1. The reaction time t is an intrinsic parameter of the comparator K1 and corresponds to the time period between an event and the signaling of this event by the comparator, i.e. the time it takes for the comparator to become active once the activating event has taken place. In the present example, the first reaction time t corresponds to the time it takes for the first comparator K1 to output a level change of the signal IDLE_off to the control circuit 11 once the sense signal has reached the first threshold. Accordingly, the transition time of the smart switch 10 depends (amongst other parameters) on the first reaction time t1.
The second comparator K2 is configured to signal that the sense signal ΔVBE reaches or exceeds a second threshold Idle_thres_fast and to cause a discharge signal DIS to be output to the driver circuit 13. The discharge signal leads to a reduction of the gate current IG that is applied to the gate electrode, as will be explained later. It is understood that the first and second thresholds are chosen dependent on the on-resistance RON of the transistor TL.
In the present example, the second threshold Idle_thres_fast is higher than the first threshold Idle_thres_slow. Further, the second comparator K2 has a second reaction time t2 that is shorter than the first reaction time t1 of the first comparator K1. In the present example, the second reaction time t2 corresponds to the time it takes for the second comparator K2 to signal a level change of the discharge signal to the driver circuit 13 once the sense signal ΔVBE has reached the second threshold Idle_thres_fast. In the present example, the reaction time of the first comparator K1 is at least 5 μs and, in particular, is between 5 and 10 μs. The reaction time of the second comparator K2 is lower than 3 μs and, in particular, is between 1 and 2 μs. The first comparator K1 is thus considered to be “slow”. The comparator topology of the first comparator K1 focuses on accuracy, with the tradeoff of a longer reaction time. The second comparator K2 is, by contrast, considered to be “fast” (i.e. faster than the first comparator K1). The comparator topology of the second comparator K2 may be implemented with a high-gain folded cascade which allows a faster reaction time, wherein the tradeoff is that it is less accurate than the first comparator K1.
Since the first comparator K1 is very accurate, it can be ensured that the signal IDLE_off, which triggers the wake-up of the control circuit 11 and the mode change of the smart switch 10 to the normal-mode, is only sent when the first threshold has been reached. In particular, it can be ensured that the first comparator K1 does not react to artifacts and that the switch 10 only changes to the normal-mode when the load current IL exceeds a certain limit represented by the comparator threshold of comparator K1. Since the second comparator K2 has a faster reaction time, it can react almost immediately once the second threshold has been reached, thereby increasing safety during the transition from the idle-mode to the normal-mode. The power transistor of the switch 10 can thus be efficiently protected from overcurrents during the transition time.
In the depicted example, the overcurrent protection circuit 15 also comprises a logic gate 122 that is configured to combine the output signals of the first comparator K1 and the second comparator K2. The logic gate 122 is configured to blank the output signal of the fast comparator K2 as soon as the slow comparator K1 initiates the transition from idle-mode to normal mode by generating the wakeup signal IDLE_off at an appropriate level. In the present example, the logic gate 122 is an AND-gate that outputs the discharge signal DIS when the fast comparator signals that the second threshold Idle_thres_fast has been reached provided that the first comparator has not yet detected the first threshold Idle_thres_slow. In other words, the output signal of the fast comparator K1 is only forwarded, as discharge signal DIS, to the gate driver 13 when the first comparator K1 does not yet signal that the sense signal ΔVBE has reached the first threshold Idle_thres_slow. Such a situation may occur because of the difference between the first and the second reaction times t1 and t2. As will be discussed with reference to
In essence, the discharge signal DIS output by the logic gate 122 only triggers a switch-off of the power transistor TL in response to a steep increase of the load current IL. If the increase of the load current is “normal” (i.e. the usual consequence of the load ZL becoming active), the comparator K1 will blank the output signal of the comparator K2 with the help of the logic gate 122 before the comparator K2 signals an overcurrent.
The additional overcurrent protection circuit 15 may also comprise an optional delay element 121 that is connected to the first comparator K1 and that is configured to increase a propagation time of the output signal of the first comparator K1 to the logic gate 122 by a predefined delay time. The delay time may be fixed or adjustable. This delay element 121 makes it possible to adjust the difference between the first and second reaction times of the comparators K1 and K2 and, in particular, to compensate for at least part of the mode transition time of the smart switch 10. As mentioned before, the mode transition time depends on the propagation time of the various signals and on the intrinsic reaction time of the different circuits of the smart switch 10.
In the present example, the input stage that outputs the sense signal ΔVBE comprises a first transistor T1 and a second transistor T2. The transistors T1 and T2 are connected to the power transistor TL in such a way that a voltage difference ΔVBE between an emitter voltage of the first transistor T1 and an emitter voltage of the second transistor T2 is equal (or proportional) to the source-drain voltage VDS across the power transistor TL. In the present example, the first and second transistors T1 and T2 are bipolar transistors, wherein a base of the second transistor T2 is connected to the drain of the power transistor TL and the collectors of the first and second transistors T1 and T2 are connected to the source of the power transistor TL.
The positive temperature coefficient of the on-resistance RON of the power transistor TL can (at least in part) be compensated by the input stage, so that the resulting voltage difference ΔVBE is essentially independent of the temperature. With this, the first and second thresholds of the comparators can be constant over temperature, which increases the robustness of the smart switch 10 throughout a larger temperature range. As mentioned ΔVBE˜VDS˜IL·RON, and therefore ΔVBE can be used as sense signal that represents the load current IL.
The first inputs of the first and second comparators K1, K2 are coupled to the emitter of the first transistor T1, whereas the second inputs of the first and second comparators are coupled to the emitter of the second transistor T2. With this, both comparators operate based on the same sense signal ΔVBE.
The driver circuit 13 comprises a driver 131 which generates a gate current IG (resulting in a respective gate voltage) to switch the transistor TL on and off in accordance with the control signal SON. Moreover, the driver circuit 13 is configured to activate a discharge current path, via which the gate electrode of the power transistor TL can be discharged to cause a fast switch-off of the transistor TL. In the present example, the driver circuit 13 comprises a current source Q1 that is arranged in the discharge current path and is connected to the gate of the power transistor TL via a switch SW. The current source Q1 is configured to generate a current i1. The switch SW is switched on and off in accordance with the discharge signal DIS. When the current source Q1 is connected (by the switch SW) to the gate electrode of the power transistor TL, a discharge current IREG flows through the discharge current path, thereby discharging the gate electrode and sinking the gate current IG by the current IREG. It is understood that a resistor may be used instead of a current source Q1. In one embodiment, a MOS transistor is used to implement switch and current source.
In the depicted example, the smart switch circuit 10 further comprises an electronic switch M1 that is arranged between the drain of the power transistor TL and the additional overcurrent protection 15. The electronic switch M1 is configured to connect the additional overcurrent protection 15 to the power transistor TL and to disconnect it therefrom. In the present example, the switch M1 is a MOSFET. Furthermore, in the present example, the electronic switch M1 is on when the smart switch circuit 10 is in the idle-mode, whereas the electronic switch M1 is off once the smart switch 10 operates in the normal-mode (i.e. after the conventional overcurrent protection has been activated). Although not explicitly shown in the figure, the electronic switch M1 can be switched on and off by the control circuit 11 dependent on the mode of operation. With this, it can be ensured that the additional overcurrent protection circuit 15 is only operative when the smart switch 10 (and the control circuit 11) is in the idle-mode or in the transition between the idle-mode and the normal-mode, thereby reducing the power consumption in the idle-state and ensuring that the overcurrent protection circuits 12, 15 do not disturb each other.
The behavior and function of the additional overcurrent protection circuit 15 is now explained with further details with reference to
Once the first comparator K1 is active, it provides the output signal IDLE_off with, e.g., a High level to the control circuit 11, which causes the control circuit 11 to wake up from idle-mode and to send signals to the other inactive sub-circuits of the switch, in particular to the conventional overcurrent protection circuit, so that they become active. When all inactive functions of the smart switch are active, the transition period ends and the smart switch is in the normal-mode. In the normal-mode, when the load current reaches the third threshold Itrip, the conventional overcurrent protection circuit outputs the protection signal OC to the control circuit 11, and the control circuit 11 generates the control signal Son that causes the driver circuit 13 to switch off the power transistor TL. The subsequent decrease of the load current can also be seen in
The additional overcurrent protection can be disabled as soon as the conventional overcurrent protection circuit becomes active after the transition into normal mode.
In the example of
In the present case, the slope of the load current IL is approximately 2.5 A/μs. When the load current reaches the first threshold, the transition to the normal-mode is initiated. However, the load current IL remains under the second threshold for the second comparator during the transition time and the additional overcurrent protection does not come into operation. Once the transition time is over, the power transistor of the smart switch is protected by the conventional overcurrent protection. In the present example, the conventional overcurrent protection sends a protection signal that leads to a reduction of the control current and to a switch-off of the power transistor, when the load current reaches the third threshold Itrip, which in this case is equal to 125 A.
In the present case, the slope of the load current is approximately 25 A/μs. When the load current reaches the first threshold, the transition to the normal-mode is initiated. Since the current transient is very fast, the load current soon exceeds the second threshold, thereby activating the second comparator and the additional overcurrent protection circuit can trigger a switch-off of the power transistor TL. Therefore, the additional overcurrent protection circuit then outputs a discharge signal that leads to a decrease of the load current and finally a switch-off of the power transistor. Once the transition to the normal-mode is over, the conventional overcurrent protection takes over the function of the additional overcurrent protection circuit.
Process 500 includes switching on and off a power transistor TL of a circuit 10 according to a gate current IG that is applied, by a control circuit 11, to a gate electrode of the power transistor TL (step 510). In one example, the circuit 10 is a smart semiconductor switch. The circuit 10 can operate in a first mode (referred to as idle-mode), in which some functions of the circuit are inactive to reduce power consumption, and in a second mode (referred to as normal-mode or active mode), in which all functions of the smart switch are active. For example, the circuit may comprise a conventional overcurrent protection circuit that 12 is inactive in the idle-mode and that is active in the normal-mode. The conventional overcurrent protection circuit 12 is configured to send a signal that leads to a reduction of the load current when the load current exceeds a predefined threshold.
The process 500 further comprises detecting, when the circuit 10 is in the first mode (idle-mode), that a sense signal ΔVBE indicative of a current IL passing through the power transistor TL has reached a first threshold, and, in response thereto, changing the circuit 10 from the first mode to the second mode (step 520). The sense signal ΔVBE may be based on the drain-source voltage VDS across the power transistor TL. The step of changing the circuit 10 from the first mode to the second mode requires a specific transition time that begins with the sense signal reaching the first threshold. This transition time is due to the intrinsic reaction times of the different sub-circuits of the circuit 10 and to the propagation times that are needed to propagate signals between the sub-circuits. In one example, detecting that the sense signal ΔVBE has reached a first threshold comprises signaling, by a first comparator K1, that the sense signal has reached the first threshold. The first comparator K1 can then output a wakeup signal IDLE_off to a control circuit 11 of the circuit 10, which causes the control circuit 11 to initiate the mode change from idle-mode to normal-mode and to send activation signals to the inactive sub-circuits of the circuit 10, such as the conventional overcurrent protection circuit 12. Upon receiving these signals, the corresponding sub-circuits also become active. Once all the sub-circuits, which are inactive in the idle-mode, have become active, the transition is complete and the circuit is in the normal-mode.
The process 500 further comprises detecting that the sense signal has reached a second threshold, and, in response thereto, outputting, during the transition time, a discharge signal, which leads to a reduction of the gate current IG that is applied to the gate electrode (step 530). The second threshold may be higher than the first threshold. The detection of the sense signal reaching the second threshold thus occurs when the transition to the normal-mode has already begun. However, the discharge signal is only output if the transition is not yet over, namely, if the circuit 10 is not yet in the normal-mode. In one example, detecting that the sense signal has reached the second threshold comprises signaling, by a second comparator K2, that the sense signal has reached the second threshold. In one example, reducing the gate current IG that is applied to the gate electrode comprises activating a discharge current path via which the gate electrode of the power transistor TL can be discharged. The discharge current path may comprise a current source that is connected to the gate electrode of the power transistor TL by a switch that is activated by the discharge signal. The first and the second comparators are part of an additional overcurrent protection circuit that is inactive in the normal-mode and that is active in the idle-mode.
In one example, the method further comprises combining output signals of the first comparator K1 and the second comparator K2, wherein the discharge signal is output when the second comparator K2 signals that the sense signal has reached the second threshold, and the first comparator K1 does not yet signal that the sense signal has reached the first threshold. The second comparator K2 has an intrinsic reaction time that is shorter than the intrinsic reaction time of the first comparator K1.
When the load current transient is sufficiently fast, the second comparator K2 may provide an output signal before the first comparator K1 provides its output signal due to the difference in reaction times between the comparators. In this case, the discharge signal is output and the power transistor is switched off. The circuit is thus actively protected by the additional overcurrent protection circuit during at least a part of the transition time. When the load current change is sufficiently slow, the first comparator K1 provides its output signal before the second comparator K2 can provide an output signal, and no discharge signal is output. Once the transition time is over, the additional overcurrent protection circuit becomes inactive and the protection of the circuit is ensured by the conventional overcurrent protection circuit. In one example, the process comprises delaying a propagation of the output signal of the first comparator K1 by a predefined delay time. With this, it is possible to accommodate at least part of the reaction and propagation times of the sub-circuits in order to ensure that the circuit is always protected by one of the conventional and the additional overcurrent protection circuits.
The present application describes the use, in an intelligent semiconductor switch having a power transistor, of an additional overcurrent protection circuit that is active at least during idle-mode of the circuit. The additional overcurrent protection circuit is able to react to fast load current transients and has a low power dissipation. With this, it is possible to efficiently protect the circuit during the transition from idle-mode to normal-mode at a low power consumption. In particular, by using a logical combination of two comparators with the idle-threshold comparator, it is possible to distinguish between fast load current transients, which reflect a short circuit, and application-relevant load current changes, and thus to avoid any unintended interactions or unnecessary switch-offs of the power transistor. In particular, the additional overcurrent protection circuit only reacts in ‘hard’ short-circuit conditions.
Although the specification only describes the transition from the idle-mode to the normal-mode, it is clear that the circuits of
Although various embodiments have been illustrated and described with respect to one or more specific implementations, alterations and/or modifications may be made to the illustrated examples without departing from the spirit and scope of the features and structures recited herein. With particular regard to the various functions performed by the above described components or structures (units, assemblies, devices, circuits, systems, etc.), the terms (including a reference to a “means”) used to describe such components are intended to correspond—unless otherwise indicated—to any component or structure that performs the specified function of the described component (e.g., that is functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the function in the herein illustrated exemplary implementations of the present disclosure.
| Number | Date | Country | Kind |
|---|---|---|---|
| 102024100120.8 | Jan 2024 | DE | national |
