Patent Application
20080024351
The present invention will be more clearly understood from consideration of the following description and drawings in which:
References in the description correspond to like references in the various drawings unless otherwise noted. Descriptive, polarity, and directional terms used in the written description such as top, bottom, upper, side, etc., refer to the drawings themselves as laid out on the paper and not to physical limitations of the invention unless specifically noted. The drawings are not to scale, and some features of embodiments shown and discussed are simplified or amplified for illustrating the principles, features, and advantages of the invention.
In general, the invention provides novel pre-charge methods and systems embodied in high performance analog to digital converter input drivers. An exemplary embodiment of the invention is portrayed in the schematic diagram of
Thus, in operation of the system 10, sampling takes place according to two phases as follows. During a coarse pre-charge phase, preferably of a duration of approximately one-tenth to one-sixth of the total sampling time, the amplifier A1 is operated as slow amplifier, the charge to the sampling capacitor Cs is provided by the larger pre-charge capacitor Cp at the output by charge sharing. Preferably, with Cp≈10*Cs, the output reaches a value approaching to within about 85-95% of its final value during this phase. With a smaller Cp, a lesser pre-charge level may be used, for example 50% for Cp≈Cs. Subsequently, during a fine sampling phase, the high-speed capabilities of the amplifier A1 are used to sample the charge on the sampling capacitor Cs, and the pre-charge capacitor Cp is disconnected from the output. The amplifier A1 then operates such that output quickly settles to the desired accuracy for use by the ADC system. Of course, additional feedback networks may be used as represented by resistors Rf and capacitors Cf. Also, it should be understood by those conversant in the arts that circuits shown herein are representative of preferred embodiments and that equivalent circuits may be used without departure from the principles of the invention.
In an example of an alternative embodiment of a system of the invention, as shown in
Based on the disclosed examples, those skilled in the arts should appreciate that there are numerous possibilities for systems and methods using the principles of the invention. The principles of the invention may be implemented using various types of operational amplifiers in input stages for circuits, such as many types of ADC, either on-chip or on-board. The methods and systems of the invention provide one or more advantages which may include: improved SNR; improved SFDR; reduced power consumption; integration of ADCs and input drivers using CMOS manufacturing processes. While the invention has been described with reference to certain illustrative embodiments, those described herein are not intended to be construed in a limiting sense. For example, variations or combinations of steps in the embodiments shown and described may be used in particular cases without departure from the invention. For example, the principles of the invention may be applied in systems including but not limited to differential input to single-ended output, single-ended input to single-ended output, single-ended input to differential output, differential input to differential output. Modifications and combinations of the illustrative embodiments as well as other advantages and embodiments of the invention will be apparent to persons skilled in the arts upon reference to the drawings, description, and claims.
