BRIEF DESCRIPTION OF THE DRAWINGS
The invention, together with objects and advantages thereof, may best be understood by reference to the following description of the presently preferred embodiments together with the accompanying drawings in which:
FIG. 1 is a schematic circuit diagram of a prior art prescaler;
FIG. 2 is a graph showing the relationship between the input level and frequency of the prescaler shown in FIG. 1;
FIG. 3(
a) is a schematic circuit diagram of a negative feedback circuit formed by the first inverter circuit and resistor of the buffer shown in FIG. 1;
FIG. 3(
b) is a schematic equivalent circuit diagram of the negative feedback circuit shown in FIG. 3(a);
FIG. 4 is a characteristic diagram showing the relationship between the frequency and gain of the prescaler shown in FIG. 1;
FIG. 5 is a schematic block circuit diagram of a PLL frequency synthesizer according to a preferred embodiment of the present invention;
FIG. 6 is a schematic circuit diagram of the prescaler shown in FIG. 5;
FIG. 7 is a characteristic diagram showing the relationship between the frequency and gain of the prescaler shown in FIG. 5; and
FIG. 8 is a graph showing the relationship between the input level and frequency of the prescaler shown in FIG. 5.
Patent Application
20070223648
