Patent Application
20250140896
The present invention generally relates to the field of solid-state and/or thin film batteries. More specifically, embodiments of the present invention pertain to printed adhesives for improving the volumetric energy density in solid-state batteries, and methods of making and using the same.
Solid-state lithium batteries are ionic-charge storage devices that are ideally suited for wearable, IoT, and other non-EV applications due to their small size, safety, and high cyclability. To realize a commercially acceptable capacity in a relatively small footprint or area, two or more battery cells may be stacked and connected to the battery terminals in parallel. An adhesive film is used (typically layers of die attach film [DAF]) that comes prepackaged on UV tape (i.e., a plastic tape that can be released from the DAF following irradiation with ultraviolet [UV] light). The DAF on UV tape typically has a thickness of 3-10 μm, and it reduces the volumetric energy density of the battery. The use of UV tape makes it difficult to handle thin substrate devices on the tape.
This “Discussion of the Background” section is provided for background information only. The statements in this “Discussion of the Background” are not an admission that the subject matter disclosed in this “Discussion of the Background” section constitutes prior art to the present disclosure, and no part of this “Discussion of the Background” section may be used as an admission that any part of this application, including this “Discussion of the Background” section, constitutes prior art to the present disclosure.
The present invention relates to solid-state batteries, and more specifically to a solid-state battery having a printed adhesive and methods of making and using the same. The use of a printed adhesive on the battery cells reduces the thickness of the cell (e.g., to a 1-2 μm target thickness) and cost (e.g., by elimination of UV tape and DAF), increases material usage efficiency (e.g., printing avoids unnecessary removal of blanket-deposited material[s]), and forms conformal, void-free layers at or near the uppermost surface of the cells.
Thus, one aspect of the present invention concerns a stackable solid-state battery cell, comprising a substrate, a cathode on or over the substrate, a solid-state electrolyte on the cathode, an anode current collector (ACC) on the solid-state electrolyte, an insulator layer on the ACC and having a sidewall portion, a conductive redistribution layer on the insulator layer, and a printed adhesive on a major surface of the battery cell. The insulator layer is also on a sidewall of each of the ACC, the solid-state electrolyte, the cathode and the substrate, and has an opening enabling electrical contact with the ACC. The redistribution layer is also on the sidewall portion of the insulator layer, and is in electrical contact with the ACC. The major surface of the battery cell may be (i) an outermost surface of the redistribution layer and the insulator layer or (ii) a surface of the substrate opposite from the cathode.
In various embodiments of the stackable solid-state battery cell, the printed adhesive independently has a length and a width that is 80-95% of a length and a width of the battery cell, respectively. In other words, the length of the printed adhesive may be 80-95% of the length the battery cell, and independently, the width of the printed adhesive may be 80-95% of the width of the battery cell.
In other or further embodiments, the printed adhesive may have a thickness of <1 μm. For example, the thickness of the printed adhesive may be in the range of 20-500 nm, or any thickness or range of thicknesses <1 μm (e.g., 50-300 nm).
In various embodiments, the printed adhesive comprises a thermosetting adhesive such as an epoxy adhesive. However, the printed adhesive may comprise another thermosetting or thermoplastic adhesive, such as an (unsaturated) polyester, a polyimide, a phenolic adhesive, a polyamide, a cyanoacrylate, a polyacrylate, a polymethacrylate, a polyvinyl acetate (PVA), or a copolymer thereof. When the adhesive comprises a thermosetting adhesive, the adhesive may further include a curing agent, which may be a heat-activatable curing agent. When the adhesive comprises a radiation-curable adhesive (e.g., an ultraviolet [UV] light-curable adhesive), the adhesive composition may further comprise a UV radiation-activatable curing agent.
In some embodiments, the stackable solid-state battery cell may further comprise a conductive bump on the ACC. The conductive bump may have a height, and the insulator layer having a thickness smaller than the height of the conductive bump.
In various embodiments, the substrate comprises a metal foil, film or sheet. For example, when the substrate comprises the metal foil, and the metal foil may have a thickness of 0.1-100 μm. In other or further embodiments, the substrate may further comprise a barrier on one or more major surfaces of the metal foil, film or sheet. The barrier generally has a thickness effective to prevent migration of atoms or ions from the metal foil into overlying layers, and may comprise a glass or ceramic (e.g., silicon dioxide, aluminum oxide, silicon nitride, and/or a silicon and/or aluminum oxynitride), a metal nitride (e.g., aluminum nitride, titanium nitride, titanium aluminum nitride, tungsten nitride, titanium tungsten nitride and/or tantalum nitride), or an amorphous metal or metal alloy (e.g., a TiW alloy). In embodiments in which the substrate comprises the metal foil, sheet or film, the metal foil, sheet or film may function as a cathode current collector. In such embodiments, at least part of the barrier is a conductive, amorphous material, such as a refractory metal nitride (e.g., as listed above) or an amorphous metal or metal alloy.
In various embodiments, the cathode may comprise a lithium metal oxide or lithium metal phosphate, the solid-state electrolyte may comprise a lithium phosphorus oxynitride, a lithium lanthanum zirconium oxide or Li2WO4, and the ACC may comprise nickel, zinc, copper, an alloy thereof, or graphite. In other or further embodiments, the insulator layer may comprise a polyolefin and/or an inorganic oxide (e.g., silicon dioxide, aluminum oxide, silicon nitride, and/or a silicon and/or aluminum oxynitride) layer.
In some embodiments, the stackable solid-state battery cell further comprises a moat in at least the cathode and the solid-state electrolyte, surrounding the ACC and configured to physically separate an active portion of the battery cell from a peripheral region of the battery cell. In further embodiments, the moat may have a width of 3-20 μm, provide an anchoring feature for the insulator layer, fully isolate the active portions of the cathode and electrolyte layers, and/or increase resistance to ingress of (ambient) air and moisture (water vapor).
Another aspect of the present invention relates to a packaged solid-state battery, comprising a plurality of the present stackable solid-state battery cells, a first terminal in electrical contact with the conductive redistribution layer on the sidewall portion of the insulator layer, and a second terminal in electrical contact with an exposed surface of the substrate. At least one adhesive layer of the solid-state battery cells is between adjacent solid-state battery cells.
A further aspect of the present invention relates to a method of making a stackable solid-state battery cell, comprising forming an insulator layer on a patterned anode current collector (ACC), forming a patterned conductive redistribution layer on the insulator layer, and printing an adhesive on a major surface of the battery cell. The ACC is on a solid-state electrolyte, the solid-state electrolyte is on a cathode, and the cathode is on or over a substrate, as discussed for the solid-state battery cell itself. The insulator layer has an opening enabling electrical contact with the ACC, and a portion of the insulator layer is formed on a sidewall of each of the ACC, the solid-state electrolyte, the cathode and the substrate. The patterned redistribution layer is also along the sidewall portion of the insulator layer, such that the redistribution layer is in electrical contact with the ACC. The major surface of the battery cell is (i) an outermost surface of the redistribution layer and the insulator layer, or (ii) a surface of the substrate opposite from the cathode, as discussed for the solid-state battery cell.
In various embodiments of the method, the adhesive has a thickness of <1 μm, as for the solid-state battery cell. Additionally or alternatively, printing the adhesive may comprise screen printing, inkjet printing, stencil printing, gravure printing, or flexographic printing the adhesive in a pattern on the major surface of the battery cell. For example, printing the adhesive may comprise screen printing a solution of the adhesive in a solvent on the major surface of the battery cell, and removing the solvent. The method may further comprise curing the adhesive by heating the adhesive to a curing temperature and/or irradiating the adhesive with ultraviolet light.
In some embodiments, the patterned conductive redistribution layer is selectively deposited on the insulator layer by a process comprising inkjet printing, aerosol-jet printing or screen printing an ink or a paste of a precursor of the conductive redistribution layer, and curing the ink or the paste. In other or further embodiments, the method further comprises blanket-depositing the cathode on or over the substrate, blanket-depositing the solid-state electrolyte on the cathode, and/or forming the patterned ACC on the solid-state electrolyte.
In some embodiments, the method may further comprise printing a conductive bump on the ACC prior to forming the insulator layer. In such embodiments, the opening in the insulator layer is in the same location as the conductive bump, and the conductive bump has a height greater than a thickness of the insulator layer.
In some embodiments, the method may further comprise forming a moat in at least the cathode and the solid-state electrolyte, surrounding the ACC and configured to physically separate an active portion of the battery cell from a peripheral region of the battery cell. The moat may be formed by laser ablation, mechanical dicing, or low-resolution photolithographic patterning (e.g., of a photoresist or other mask material) and etching.
The present invention results in a solid-state battery that has a relatively high volumetric energy density (VED) and relatively low manufacturing cost. Other capabilities and advantages of the present invention will become readily apparent from the detailed description of various embodiments below.
Reference will now be made in detail to various embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the following embodiments, it will be understood that the descriptions are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents that may be included within the spirit and scope of the invention. Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be readily apparent to one skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures and components have not been described in detail so as not to unnecessarily obscure aspects of the present invention. Furthermore, it should be understood that the possible permutations and combinations described herein are not meant to limit the invention. Specifically, variations that are not inconsistent may be mixed and matched as desired.
The technical proposal(s) of embodiments of the present invention will be fully and clearly described in conjunction with the drawings in the following embodiments. It will be understood that the descriptions are not intended to limit the invention to these embodiments. Based on the described embodiments of the present invention, other embodiments can be obtained by one skilled in the art without creative contribution and are in the scope of legal protection given to the present invention.
Furthermore, all characteristics, measures or processes disclosed in this document, except characteristics and/or processes that are mutually exclusive, can be combined in any manner and in any combination possible. Any characteristic disclosed in the present specification, claims, Abstract and Figures can be replaced by other equivalent characteristics or characteristics with similar objectives, purposes and/or functions, unless specified otherwise.
For the sake of convenience and simplicity, the term “length” generally refers to the largest dimension of a given 3-dimensional structure or feature. The term “width” generally refers to the second largest dimension of a given 3-dimensional structure or feature. The term “thickness” generally refers to a smallest dimension of a given 3-dimensional structure or feature. The length and the width, or the width and the thickness, may be the same in some cases. A “major surface” refers to a surface defined by the two largest dimensions of a given structure or feature, which in the case of a structure or feature having a circular surface, may be defined by the radius of the circle.
In addition, for convenience and simplicity, the terms “part,” “portion,” and “region” may be used interchangeably but these terms are also generally given their art-recognized meanings. Also, unless indicated otherwise from the context of its use herein, the terms “known,” “fixed,” “given,” “certain” and “predetermined” generally refer to a value, quantity, parameter, constraint, condition, state, process, procedure, method, practice, or combination thereof that is, in theory, variable, but is typically set in advance and not varied thereafter when in use.
The present invention concerns a solid-state battery containing a printed adhesive and methods of making and using the same. The present solid-state battery includes, in some embodiments, an intrinsic anode-less battery comprising a substrate (which can also serve or function as a cathode current collector [CCC]), a cathode or cathode layer, a solid-state electrolyte (SSE) or solid-state electrolyte layer, and an anode current collector (ACC). In anode-less embodiments, no lithium anode is formed between the SSE and the ACC during manufacturing. A lithium anode may form during or upon completion of a battery charging operation.
The following discussion provides an example of a manufacturing process for solid-state batteries and stacked solid-state batteries, as well as variations of the process.
The barrier 115a-b comprises one or more layers of one or more materials in a thickness effective to prevent migration of atoms or ions from the metal foil, sheet or film 110 into overlying layers. The barrier material(s) may comprise a glass or ceramic, such as silicon dioxide, aluminum oxide, silicon nitride, a silicon and/or aluminum oxynitride, etc., a (refractory) metal nitride, such as aluminum nitride, titanium nitride, titanium aluminum nitride, tungsten nitride, titanium tungsten nitride, tantalum nitride, etc., or an amorphous metal or metal alloy, such as a TiW alloy. In some embodiments, each of the first and second barriers 115a-b comprises alternating glass/ceramic and metal nitride layers (e.g., a first metal nitride layer, a first glass/ceramic layer, and a second metal nitride layer, which may further comprise a second glass/ceramic layer, a third metal nitride layer, etc.). Each barrier 115a or 115b, whether a single layer or multiple layers, may have a total thickness of 0.05-3 μm, but the barrier 115 is not limited to this range. The barriers 115a-b may be blanket-deposited onto the foil, sheet or film 110 by chemical or physical vapor deposition (e.g., sputtering, thermal evaporation, atomic layer deposition [ALD], etc.), solution-phase coating with a precursor material followed by annealing to form the glass/ceramic or metal nitride, etc. Exemplary barrier materials, structures and thicknesses and methods for their deposition are disclosed in U.S. Pat. Nos. 9,299,845 and 11,742,363 and U.S. patent application Ser. No. 17/012,010, filed Sep. 3, 2020 (Atty. Docket No. IDR5320), the relevant portions of each of which are incorporated by reference herein.
In some embodiments, the foil, sheet or film 110 functions as a cathode current collector. In such embodiments, at least the barrier 115a (and optionally the barrier 115b) is a conductive, amorphous material, such as the refractory metal nitrides listed above or an amorphous metal or metal alloy (e.g., a TiW alloy).
Forming the electrolyte 130 may comprise depositing a LiPON layer or a tungsten oxide layer of the formula WO3+x (0≤x≤1) by sputtering, optionally using pulsed DC power. When the electrolyte 130 comprises LiPON, it may be deposited by RF sputtering or ALD. The sputtering target may comprise a Li3PO4 or mixed graphite-Li3PO4 target, the latter of which may contain 1-15 wt % of graphite, when the electrolyte 130 comprises LiPON or carbon-doped LiPON, and a metallic/elemental tungsten target when the electrolyte 130 comprises a tungsten oxide. In the latter case, sputtering is performed in an oxygen or oxygen-containing atmosphere. The method of making the electrolyte 130 may further comprise lithiating and thermally annealing the WO3+x, which can transform it into Li2WO4, a good Li-ion conductor. Lithiating may comprise wet lithiation (e.g., immersing the WO3+x in a solution containing a lithium electrolyte such as LiClO4, LiPF6, LiBF4, etc., and applying an appropriate electric field) or dry lithiation (e.g., sputtering or thermally evaporating elemental lithium onto the tungsten oxide in a vacuum chamber, optionally while heating the substrate 100). Thermal annealing may comprise heating at a temperature of 150-500° C. for a length of time of 5-240 minutes, or any temperature or length of time therein (e.g., 250-450° C. for 10-120 minutes), in a conventional oven, a vacuum oven, or a furnace. To ensure substantially complete diffusion of the lithium into and/or throughout the WO3+x, the WO3+x should be annealed (preferably in air) at a temperature of at least 100° C. for at least 10 minutes (e.g., to transform it into Li2WO4).
The anode current collectors 140a-d generally comprise a conductive metal, such as nickel, zinc, copper, alloys thereof (e.g., NiV), etc., or another conductor, such as graphite. The anode current collectors 140a-d can be selectively deposited by screen printing, inkjet printing, spray coating, etc. Typically, the printed anode current collectors 140a-d are cured by irradiating with ultraviolet (UV) light, heating (e.g., up to a temperature of about 550° C., but more commonly, up to about 400° C.), or a combination thereof. Alternatively, the anode current collectors 140a-d may be formed by blanket deposition (e.g., sputtering or evaporation) and patterning (e.g., low-resolution photolithography, development and etching). The anode current collectors 140a-d may have a thickness of 0.1-5 μm, although it is not limited to this range.
The anode current collectors 140a-d may have area dimensions (i.e., length and width dimensions) that are 50-95% of the corresponding length and width dimensions, respectively, of the cell (see e.g.,
The cells may further include one or more interlayers that modify the interfaces between layers. For example, a metal oxide (e.g., Nb2O5, Al2O3, Li4Ti5O12 or LiNbO3) interlayer may be formed on the cathode 120 prior to deposition of the electrolyte 130 (e.g., to reduce interfacial stress, decrease interfacial resistance, or suppress formation of a space charge layer). An amorphous (e.g., elemental silicon) interlayer may be deposited on the electrolyte 130 prior to formation of the anode current collectors 140a-d to inhibit reduction of the electrolyte. Of course, the battery cell can be made in the reverse order (i.e., the anode current collector may be first formed on the substrate, then the remaining layers deposited in reverse order thereon).
An advantage of the present method is that some/all of the active battery layers (e.g., the cathode 120 and the solid-state electrolyte 130) are deposited as blanket layers. This maximizes the active area utilization of the battery cells for high intrinsic capacity, and also results in a topographically planar or “flat” cell to facilitate formation of the uppermost layer(s) and downstream packaging due to the pattern-free blanket-deposited layers. However, if necessary or desired, the cathode 120 and the SSE 130 can be slightly pulled back from the cell edge by subtractive patterning (e.g., low-resolution photolithography, laser ablation) or selective deposition (as described herein).
After cell fabrication as described above,
The moats 150a-d may be formed by laser ablation, mechanical dicing, or low-resolution photolithographic patterning (e.g., of a photoresist or other mask material) and etching. The moats 150a-d may have a width of 3-20 μm, although the invention is not limited to such widths. The moats 150a-d provide an anchoring feature for cell encapsulation (see the discussion below with regard to
Referring to
The ACC cell edges 145a-d are cut by laser (e.g., laser ablation), mechanical dicing or stamping, for example. When the cells are in an array or on a multi-column roll, they may also be cut or diced along the x-direction in
Referring now to
The barrier/insulation film 170a-b may comprise parylene, polyethylene, polypropylene, or another polyolefin, with or without a thin (and optionally printable) inorganic oxide overlayer such as SiO2 (e.g., formed by heating a tetraalkyl silicate such as tetraethyl orthosilicate [TEOS]). The material(s) of the barrier/insulation film 170a-b may be dissolved or suspended in an appropriate solvent (e.g., an organic solvent, as described elsewhere herein) prior to printing. In certain embodiments, after printing, the material for the barrier/insulation film 170a-b may be cured (e.g., by irradiation with ultraviolet light) to provide certain desirable properties (e.g., hardness, optical properties, adhesion, etc.).
One advantage of printing to form the barrier/insulation film 170a-b is that an opening 180a-d may be formed on each cell over the ACC 140 during printing (see, e.g.,
Low electrical resistance and a low curing temperature are desirable for the redistribution layers 185a-c, and the redistribution layers 185a-c have a thickness typically in the range 0.25-2 μm on the uppermost surface of the cells. For example, regardless of how the redistribution layers 185a-c are deposited, the redistribution layers 185a-c may be cured (e.g., by heating or sintering, optionally after drying in the case of printing an ink or paste) at a temperature of 150-550° C., or any temperature or range of temperatures therein (e.g., 150-350° C.), for a length of time sufficient to convert the deposited material to a conductive metal. Due to liquid flow, the entireties of the vias or openings 180a-d may be filled with metal, which may be beneficial during battery cycling. When the moats 150 are present, deposition of the redistribution layers 185a-c by printing, sputtering, or thermal evaporation may also fill the portions of the moats 150 nearest to the ACC edges 145a-d with metal, facilitating the ingress-barrier function of the moat 150 along the ACC edge 145.
A single redistribution layer (e.g., 185b) is on the ACC edges 145a-d of adjacent cells. The redistribution layers (or ACC redistribution traces) 185a-c go from the ACCs 140a-d exposed through the vias or openings 180a-d to the ACC edges 145a-d, in the opposite direction from the CCC edges 125 (
The ACC redistribution traces 185a-c electrically contact the ACCs 140a-d through the vias 180a-d, but are physically and electrically insulated from the CCCs/substrates 110a-b by the barrier/insulation films 170a-b. When the ACC redistribution traces 185a-c are a metal, they form an intrinsic barrier to ambient ingress in the region of the vias or openings 180a-d. The ACC redistribution traces 185a-c are both physically on the top surface of the cell and covering at least part of the corresponding sidewalls 145a-d. The ACC redistribution traces 185a-c on the sidewalls 145a-d enable electrical connection to the cells through a terminal on the side of the battery at a later stage of the method.
In some embodiments, the method comprises printing both the insulator for the barrier/insulation film 170a-b and the metal (e.g., the ACC redistribution traces 185a-c, and optionally, the ACCs 140a-d), using dual (separate) inkjet printer heads. Preferably, the materials for the barrier/insulation film 170a-b and the ACC redistribution traces 185a-c are printed separately, with an optional curing step between the separate printing steps, if necessary or desired, although they may be printed simultaneously in some cases (e.g., where the solvents for the different layers are immiscible). This allows for faster cycle times and more efficient use of capital for manufacturing equipment.
In both cases (
The adhesive, when in a pre-cured or partially cured state, can flow into any depressions in or above the ACC redistribution traces 185a-c in the vias or openings 180a-d, as well as any openings in the moats 150a-d. Eliminating voids or trapped gasses in such depressions and in the moats 150a-d can provide benefits during cycling (e.g., preservation of electrical contact with the ACCs 140a-d).
In some embodiments, it may be beneficial to avoid printing the adhesive onto the redistribution layer 185 along the ACC edge 145 of a cell. This avoids any need to remove some of the adhesive prior to forming the contact with the redistribution layer 185 along the ACC edge 145. The adhesive can be printed over the cell pairs to fill the moats 150 and any depression over the openings 180 to the ACCs 140, but not so close to the edges of the cell pairs that adhesive is on the redistribution layer 185 along the sidewall 145 of the cells.
Bottom-side printing of the adhesive is shown in
In either top-side or bottom-side adhesive printing, the printed adhesive may have a length and/or a width that is 80-95% of the length and/or width of the die/cell, respectively, leaving 5-20% of the die along two or more edges uncovered. Such embodiments can avoid having to cut uncured or partially-cured adhesive during singulation, thereby minimizing cleaning and/or maintenance of the singulation equipment. However, such embodiments still provide sufficient coverage of the die/cell for the adhesion function and the air/water ingress prevention function to work.
As shown in
Cell stacking may comprise a conventional pick-and-place technique. However, other stacking methods, such as strip folding, strip stacking, etc. (see, e.g., U.S. patent application Ser. No. 17/185,122, filed Feb. 25, 2021 [Attorney Docket No. IDR2020-02], and U.S. Provisional Pat. Appl. No. 63/598,912, filed Nov. 14, 2023 [Attorney Docket No. IDR2022-10-PR], the relevant portions of each of which are incorporated herein by reference), before or after dicing are also acceptable. A dummy cell 210 (e.g., an encapsulated metal foil substrate, for example as described with respect to
Battery terminal dipping and plating the stacked set of cells 200 forms external electrical contacts 230a-b, as shown in
In some embodiments, the conductive epoxy 230a-b contains a relatively high metal content, which can retard ambient ingress (e.g., of oxygen or water vapor). The epoxy 230a-b may be plated with one or more pure metal layers, to further block ambient ingress. Both of these features help with ambient air and moisture resistance, particularly on the CCC edge 125, due to the barrier/insulation film 170 being unapplied (or diced) at this edge during cell or cell strip singulation from the cell or cell strip pairs (
Structures formed during an alternative process for printing the barrier and/or passivation layer and a conductive adhesive (e.g., in the openings in the barrier and/or passivation layer) on an array of solid-state battery cells is shown in
The conductive paste 380aa-380gj may comprise an electrical conductor (e.g., filaments, flakes or a powder of a metal such as silver, nickel or copper, or of another electrically conductive material such as graphite) in a liquid or otherwise flowable medium. The liquid/flowable medium may comprise a varnish, a synthetic and/or adhesive resin such as an epoxy resin, a (meth)acrylate resin, a poly(alkylene oxide), ethyl cellulose or hydroxyethyl cellulose, or an adhesive silicone polymer, optionally in one or more organic solvents such as methanol, ethanol, isopropanol, 1-methoxypropan-2-ol, 1-ethoxypropan-2-ol, 1-methoxy-propan-3-ol, 1-ethoxypropan-3-ol, acetone, methyl ethyl ketone, methyl acetate, ethyl acetate, diethyl ether, methyl t-butyl ether, etc. Alternatively or additionally, the conductive paste may include a synthetic resin such as cellulose or a thixotropic agent such as castor oil, hydrogenated castor oil, an amide-modified castor oil derivative, a fatty amide, etc. In some embodiments, the conductive paste 380aa-380gj is a conductive adhesive paste or a solder. The solder generally comprises an alloy of tin and one or more alloying elements selected from bismuth, silver, copper, zinc, and indium. In other or further embodiments, the conductive paste 380aa-380gj is cured prior to the next step, thereby forming conductive bumps 382aa-382gj (
The bumps formed from the conductive paste 380aa-380gj may have a thickness of 0.1 to 50 μm (e.g., 0.3-10 μm or any value or range of values therein) and a diameter of 20 to 2000 μm (e.g., 50-1500 μm or any value or range of values therein) at half of the height (or thickness) of the bumps. The conductive bumps 380aa-380gj may have a radius at the base of 30 to 3000 μm (e.g., 60-2000 μm or any value or range of values therein). For example, when screen printed, the conductive bumps 380aa-380gj can be formed when the screen has holes or openings with a radius of 20 to 2000 μm (e.g., 50-1500 μm or any value or range of values therein).
As shown in
In some embodiments, the openings 375aa-375fj in the insulator layer 370 have an area or diameter slightly larger than that of the conductive bumps 382aa-382gj. For example, the openings 375aa-375fj may have an area that is 1-50% larger than that of the conductive bumps 382aa-382gj, or a radius or diameter that is 1-20% larger than that of the conductive bumps 382aa-382gj.
The insulator layer 370 has a thickness less than that of the conductive bump 382. Ideally, the thickness of the insulator layer 370 is 40-80% of the thickness of the conductive bump 382. The greater the mass loading of the insulating material or insulator precursor in the material printed for the insulator layer 370, the closer that the thickness of the insulator layer 370 can be to the thickness of the conductive bump 382, as the thickness of the printed material for the insulator layer 370 (e.g., including solvent, binder, etc.) should also be less than the thickness of the conductive bump 382 to avoid the possibility of insulator material remaining on the entire uppermost surface of the conductive bump 382. In addition, the closer the thickness of the insulator layer 370 is to 100% of the thickness of the conductive bump 382, the less surface area of the conductive bump 382 is available for ohmic contact to an overlying conductor (e.g., a redistribution layer 385; see
The redistribution metal layer 385aa-385ge may be formed by selective deposition, such as thermal evaporation (e.g., through a mask that exposes regions of the cells corresponding to the pattern of the redistribution layers 385aa-ge, followed by removal of the mask), inkjet printing, aerosol-jet printing or screen printing. When printed, the redistribution layers 385aa-ge may be deposited as a metal precursor in an ink or paste. The paste may be as described herein, and the ink may comprise a metal salt, compound or complex in one or more solvents such as water, an alcohol, a cyclic or acyclic ether or polyether (e.g., dimethoxyethane, diglyme), an alkoxysilane, a cyclic or acyclic ketone, a cyclic or acyclic ester, an amide (e.g., dimethyl formamide), a dialkyl sulfoxide (e.g., dimethyl sulfoxide), etc., and one or more optional additives (e.g., a mineral acid). Examples of such inks are disclosed in U.S. Pat. No. 8,066,805, the relevant portions of which are incorporated herein by reference. The redistribution layers 385aa-ge may be cured as described above for redistribution layer 185.
Following formation of the redistribution metal layer 385aa-385ge, an adhesive is printed on the battery cells as discussed with respect to
The invention provides solid-state battery cells with an adhesive having a reduced thickness, compared to relatively fragile, expensive and material-consuming DAF films. This substantially increases the volumetric energy density of the unit cell. Expensive UV tape is eliminated, and material costs are substantially reduced due to printing (lower material utilization, no wastage of DAF) and cheaper materials.
The foregoing descriptions of specific embodiments of the present invention have been presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the invention to the precise forms disclosed, and obviously many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated.
This application claims the benefit of U.S. Provisional Pat. Appl. No. 63/593,512, filed Oct. 26, 2023, pending, incorporated herein by reference in its entirety.
| Number | Date | Country | |
|---|---|---|---|
| 63593512 | Oct 2023 | US |
