In a printing device, a printhead, such as in an inkjet pen or print bar, may include a number of dies containing nozzles for delivering printing fluid to a printing medium. For example, each die may include channels that carry printing fluid to ejection chambers for each of the nozzles. Each die may also include electronic components, such as gated logic and other micro-electro-mechanical structures (MEMS) for controlling the delivery of the printing fluid to the printing medium. For example, a resistive heating element or a piezoelectric ejection element may be used to heat the printing fluid in an ejection chamber to force a droplet of printing fluid out of the nozzle. Accordingly, each die may be electrically connected to other components of the printhead, such as an application specific integrated circuit (ASIC), a surface mounted device (SMD), and so forth, or to other components of the printing device.
In one example, the present disclosure describes a method for fabricating a printhead. For example, the method may include applying an electrical interconnect between a printhead die and an electrical fan out structure embedded in a molding of a printhead via a direct patterning additive process. The method may further include applying a passivation layer over the electrical interconnect as a dry film laminate.
In another example, the present disclosure describes a device that may include a printhead die, a printed circuit assembly, and a molding, where the printhead die and the printed circuit assembly are embedded in a surface of the molding. The device may further have an interconnect structure that includes an electrical interconnect over an electrical contact of the printhead die, an electrical contact of the printed circuit assembly, and a portion of the surface of the molding between the printhead die and the printed circuit assembly, and a passivation layer over the electrical interconnect. In one example, a thickness of the interconnect structure may be less than 100 microns.
In still another example, the present disclosure describes a method for fabricating a printhead. For example, the method may include applying a conductive layer between a printhead die and a printed circuit assembly embedded in a molding of a printhead via a shadow mask process to form an electrical interconnect, and applying a dielectric layer over the electrical interconnect as a dry film laminate.
Examples of the present disclosure relate to printheads that may be referred to as “molded printheads.” In one example, the present disclosure relates to printheads for thermal inkjet printing. As used herein, the terms “printhead” and “printhead die” refer to the parts of a printing device that can dispense fluid from one or more openings. A molded printhead may comprise one or more printhead dies, where each die may include printhead nozzles for dispensing a printing fluid, such as dye-based ink, pigment-based ink, liquid toner, ultraviolet (UV)-curable ink, and so forth, as well as microelectromechanical structures (MEMSs), and other electronic circuits, such as metal-oxide-semiconductor (MOS) logic. The one or more dies may be embedded in a molding, such as an epoxy mold compound (EMC), a plastic, or other substrate. An electrical fan out structure, such as a printed circuit assembly (PCA), including a printed circuit board (PCB), a flex circuit, a lead frame, and so forth, all of which may be referred to herein as a “board,” may also be embedded in the molding and electrically connected to the die. For example, an electrical fan out structure may be used to enable a smaller sized die to support a larger number of input-output pins than would be able to fit on the die itself.
The present disclosure describes methods or processes to fabricate electrical interconnects on a molded printhead, e.g., the electrical interconnects between a printhead die and a board. One example of the present disclosure features an electrical interconnect comprising a direct-patterned, thin film conductive layer over the molding between the die and the board, passivated with a dielectric layer. The dielectric layer may electrically isolate and protect the conductive layer from any printing fluids or other materials that may contact the surface of the printhead. In one example, the conductive layer is directly-patterned via an additive process, in contrast to subtractive based approaches, such as those involving plating and photoresist. In addition, examples of the present disclosure also focus patterning around the electrical interconnect structure, while not exposing the rest of the die to the processes. For instance, in screen printing electrodes between the die and the board, the rest of the die regions, such as near the nozzles, are exposed to the chemistry and other processes associated with the electrode screen printing. Thus, materials for forming the interconnect structure that may be deposited in the nozzle region may need to be removed via further operations, e.g., subtractive processes, such as etching. However, such operations may be difficult and time consuming to complete, and may not be fully effective. In contrast, in examples of the present disclosure, materials for forming the electrical interconnect structure are not deposited in a nozzle region of the printhead die. In one example, the present disclosure creates an interconnect structure with a low profile, e.g., less than 100 microns of height, inclusive of the conductive layer and the passivation layer. A thinner electrical interconnect structure may make the printhead easier to service. It may also reduce the size of the die and the cost of the printhead. In one example of the present disclosure, the height of the electrical interconnect and passivation layer may be reduced to 20-50 microns or less.
In one previous approach, a wire bond is used between the die and a pad, and from the pad to the board. However, it may be difficult to reduce the height, or thickness of the interconnect structures below 150 microns using this technique. Another approach is to form a thin conductive layer for an electrical interconnect using plating or other photolithography based processes. However, the nozzles on the die may be exposed to chemistry, such as plating chemistry, or the photoresist that is used in metal patterning. The nozzles on the die may also be exposed to other materials during deposition processes, such as sputtering or evaporation. Thus, the materials may need to be removed from the die to re-expose the nozzles. Still another previous approach comprises using through silicon vias (TSVs) in the die, wire bonding the die to the board through the back-end, and then embedding the wire bonds in the mold compound. However, TSVs may weaken the dies and are more costly to implement.
In one example of the present disclosure, a shadow mask approach is used where a conductive layer, e.g., one or more electrical interconnects, is deposited locally between the die and the board. In another example, a jet dispensing of the conductive layer is used. Using either approach, e.g., a shadow mask or jet dispensing, the material for the conductive layer, e.g., a metal, is deposited at or near the ends of the die such that the nozzles are not exposed to the material. In addition, where a shadow mask is used, there is no stripping involved in removing the shadow mask, once application of the material for the conductive layer is complete.
As mentioned above, a passivation layer, e.g., a dielectric layer, may be patterned on top of the conductive layer to act as an electrical isolator between printing fluid that may linger on the surface of the printhead and the underlying electrical interconnects. In one example, by applying a passivation layer using dry film lamination, the nozzles are not filled with resist or passivation layer material, e.g., as when applied wet, which would then need to be stripped from the nozzles and ejection chambers. In addition, it may be impractical to use a dry film laminate in connection with wire bond based electrical interconnects for example, since it may result in crushing of the wire bonds. In contrast, in the present disclosure, when a thin film electrical interconnect is deposited, it is possible to apply the passivation layer in the form of a dry film, localized dielectric layer over those regions. In one example, the fabrication of the passivation layer may include stamping, where a pattern is created in the passivation layer and then transferred to the printhead assembly. In another example, the passivation layer may be applied as a dry film laminate and then features photo-defined or patterned in the passivation layer using a stencil or mask. For example, the dry film laminate may tend to “tent” over surface features, such as nozzles of the printhead die, rather than fill the nozzles and the ejection chambers. Therefore, the dielectric material may be removed from such locations via a photo-patterning after it is laid.
In one example, the material used for the passivation layer over the conductive layer of the electrical interconnect can be the same material that is used for the nozzle and/or ejection chamber layer, or layers. In this way, there may be fewer unique material interfaces in the surface of the printhead. In one example, the material may comprise a negative photoimageable epoxy, e.g., a photoimageable siloxane or similar silicon based material, resist, or dielectric film. For instance, the material may comprise a UV-sensitive negative photo-resist comprising epoxy resin, gamma butyrolactone, and triaryl sulfonium salt, or a similar commercially available material. In one example, such materials may be applied as the passivation layer in a dry film (laminate) format. However, in another example, such materials may be applied as the passivation layer via a needle/jet-dispensing. For instance, a jet-dispensed dielectric material may be deposited as a gel, which may then be cured by photo-exposure, e.g., to ultraviolet (UV) light. In addition, the application via jet-dispensing may be localized over the conductive layer, e.g., the electrical interconnects, such that the nozzles of the printhead are not affected, even when use of a mask or stencil is omitted.
These and other aspects of the present disclosure are described in greater detail below in connection with the example
In one example, the passivation layer 800 comprises a dielectric layer that electrically isolates and protects the electrical interconnects 700, e.g., a conductive layer, from any printing fluids or other materials that may contact the surface of the printhead, As illustrated in
The method 1000 begins in block 1005. In block 1010, an electrical interconnect is applied between a printhead die and an electrical fan out structure embedded in a molding. For instance, the printhead die, electrical fan out structure, and the molding in which the printhead die and electrical fan out structure are embedded may comprise a printhead for a printing device. In one example, the electrical fan out structure may comprise a printed circuit assembly, a flex circuit, or a lead frame. In one example, the molding may comprise an epoxy mold compound. In one example, the electrical interconnect may be formed by a direct patterning additive process. For example, the electrical interconnect may comprise a thin film of conductive material that is deposited via a shadow mask process and/or via a jet dispensing process. In one example, the shadow mask process may comprise the placing of a shadow mask over the printhead followed by deposition of the conductive material by an evaporation, e.g., electron beam evaporation, or a sputtering of the conductive material. In another example, the shadow mask process may comprise a screen printing, where a shadow mask is used as a stencil and the conductive material is applied as a silver or nano-carbon tube containing isotropic conductive paste, for instance. In one example, the shadow mask covers a portion of the printhead die that contains at least one printhead nozzle. In one example, the shadow mask may also cover at least a portion of the electrical fan out structure, e.g., a portion containing an electrical contact pad. However, the shadow mask may include one or more openings to define a region for forming the electrical interconnect(s) of the interconnect structure. Thus, the application of the electrical interconnects at block 1010 may comprise depositing the conductive material over a portion of the printhead defined by the one or more openings in the shadow mask. For instance, the portion of the printhead may comprise: a contact pad of the printhead die, a portion of the molding, and a contact pad of the electrical fan out structure. In one example, the operations of block 1010 may involve application of an electrical interconnect, as illustrated in
In block 1020, a passivation layer is applied over the electrical interconnect as a dry film laminate. In one example, the passivation layer may comprise a dielectric material, e.g., a negative photo resist, such as a photoimageable epoxy, to electrically isolate and protect the electrical interconnects/conductive layer from any printing fluids or other materials that may contact the surface of the printhead. For instance, in one example, the negative photo resist may comprise an epoxy resin, a gamma butyrolacetone, and a triaryl sulfonium salt. In one example, the passivation layer may comprise a material that is used for at least a portion of the printhead die, e.g., one or more layers forming nozzles and ejection chambers of the printhead die. In one example, block 1020 may involve application of a passivation layer as illustrated in
The method 1100 begins in block 1105. In block 1110, a printhead die is attached to a support medium. In one example, the support medium may comprise a thermal release tape, which may also comprise a double sided tape. In one example, the operations of block 1110 may involve attaching a printhead die to a support medium as illustrated in
In block 1120, an electrical fan out structure is attached to the support medium. In one example, the operations of block 1120 may involve attaching an electrical fan out structure, e.g., a board, to a support medium as illustrated in
In block 1130, the printhead die and the electrical fan out structure are embedded in a molding to create a printhead, In one example, the operations of block 1130 may involve embedding a printhead die an electrical fan out structure in a molding as illustrated in
In block 1140, the support media is removed from the printhead. In one example, the operations of block 1140 may involve removal of a support medium from a printhead as illustrated in
In block 1150, an electrical interconnect is applied between the printhead die and the electrical fan out structure embedded in the molding. In one example, the operations of block 1150 may comprise the same or similar operations to those described above in connection with block 1010 of
In block 1160, a passivation layer is applied over the electrical interconnect as a dry film laminate. In one example, the operations of block 1160 may comprise the same or similar operations to those described above in connection with block 1020 of
In block 1170, a printing fluid channel is formed in a side of the molding opposite to a side of the molding containing the printhead die and the electrical fan out structure. In one example, the operations of block 1170 may involve forming a printing fluid channel, e.g., via one of sawing, blasting, or etching, as illustrated in
The method 1200 begins in block 1205. In block 1210, a conductive layer is applied between a printhead die and a printed circuit assembly embedded in a molding of a printhead via a jet dispensing process to form an electrical interconnect. In one example, the jet dispensing process may be localized to a region of the printhead between electrical contact pads of the printhead die and the printed circuit assembly such that the nozzles of the printhead are not affected, even when use of a shadow mask is omitted. However, in one example, a shadow mask may also be used in conjunction with the jet dispensing process for further protection of the printhead nozzles. In one example, the operations of block 1210 may comprise application of a conductive layer, e.g., an electrical interconnect, via jet dispensing, as illustrated in
In block 1220, a dielectric layer, e.g., a passivation layer, is applied over the electrical interconnect as a dry film laminate. In one example, the operations of block 1220 may comprise the same or similar operations to those described above in connection with blocks 1020 and 1160 of the example methods 1000 and 1100 of
The method 1300 begins in block 1305. In block 1310, a conductive layer is applied between a printhead die and a printed circuit assembly embedded in a molding of a printhead via a shadow mask process to form an electrical interconnect. In one example, the shadow mask process may include placing a shadow mask over the printhead to cover a nozzle portion of the printhead die and at least a portion of the printed circuit assembly. The shadow mask process may further include applying the conductive material via an evaporation or a sputtering to form the electrical interconnect in a region of the printhead defined by an open portion of the shadow mask. In one example, the operations of block 1310 may comprise application of a conductive layer via a shadow mask process, as illustrated in
In block 1320, a dielectric layer, e.g., a passivation layer, is applied over the electrical interconnect as a dry film laminate. In one example, the operations of block 1320 may comprise the same or similar operations to those described above in connection with blocks 1020, 1160, and/or 1220 of the example methods 1000, 1100, and 1200 of
It should be noted that various blocks of the respective methods 1000, 1100, 1200, and 1300 may be considered optional in various examples. For instance, in one example, method 1100 may omit one or more of blocks 1110, 1120, 1130, 1140 or 1170. In addition, it should be noted that the respective methods 1000, 1100, 1200, and 1300 may also be expanded to include additional or alternative operations and functions, as described above in connection with various examples.
It will be appreciated that variants of the above-disclosed and other features and functions, or alternatives thereof, may be combined into many other different systems or applications. Various presently unforeseen or unanticipated alternatives, modifications, or variations therein may be subsequently made, which are also intended to be encompassed by the following claims.
Filing Document | Filing Date | Country | Kind |
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PCT/US15/56596 | 10/21/2015 | WO | 00 |