This application claims priority from Japanese Patent Application No. 2022-061987 filed on Apr. 1, 2022. The entire content of the priority application is incorporated herein by reference.
The present disclosures relate to a printing device configured to eject ink.
There has been known a printer configured to generate first-fourth driving pulses respectively having different amplitudes for driving piezo elements provided to nozzles of the printer. Such a printer is typically configured such that the first-fourth driving pulses are sequentially generated during one period to print one pixel. Specifically, one of the first-fourth driving pulses is selected and applied to the piezo element of each nozzle. Then, the nozzle ejects ink of which amount corresponds to the amplitude of the selected driving pulse, thereby a dot having a desired size being formed.
According to the above-describe conventional printer, four driving pulses are sequentially generated during one period, only one driving pulse is selected. Therefore, time periods corresponding to the unselected three driving pulses serve as a standby time of the nozzle.
The present disclosures are advantageous in that such a standby time of the nozzle can be reduced by adjusting the amplitude of a drive waveform applied to an energy-applying element such as the piezo element.
According to aspects of the present disclosures, there is provided a printing device comprising a nozzle configured to eject liquid by an energy generating element, a signal generator configured to generate a time-division multiplexed signal where first data indicating a first drive waveform and second data indicating a second drive waveform are multiplexed, the first data and the second data being transmittable by the time-division multiplexed signal through a single signal line, the time-division multiplexed signal being generated based on at least the first data and the second data, the time-division multiplexed signal including a first part of the first drive waveform, a second part of the first drive waveform, a third part of the second drive waveform and a fourth part of the second drive waveform, the third part being arranged between the first part and the second part, the second part being arranged between the third part and the fourth part, and a separator configured to separate one of a first drive waveform signal indicating the first drive waveform and a second drive waveform signal indicating the second drive waveform from the time-division multiplexed signal. The energy generating element is configured to be driven by one of a first separated waveform signal and a second separated waveform signal, the first separated waveform signal being a signal separated by the separator by a first pulse signal having a period shorter than a period of the first part and a second pulse signal having a period shorter than a period of the second part, the second separated waveform signal being a signal separated by the separator by a third pulse signal having a period shorter than a period of the third part and a fourth pulse signal having a period shorter than a period of the fourth part.
Hereinafter, a printing device 1 according to an embodiment of the present disclosures will be described with reference to the drawings.
As shown in
On the upper side of the platen 2, two guide rails 11 and 12 extending in the right-left direction are provided to guide the carriage 6. The carriage 6 is connected with an endless belt 13 that extends in the right-left direction. The endless belt 13 is driven, by the carriage driving motor 14, to move. As the endless belt 13 moves, the carriage 6 is guided by the guide rails 11 and 12, and is moved reciprocally in the scanning direction within an area facing the platen. More concretely, with supporting the four inkjet heads 8, the carriage 6 performs a first movement to move the inkjet head 8, in the scanning direction, from left to right, from a certain position to another position, and a second movement to move the inkjet head 8, in the scanning direction, from right to left, from a certain position to another position.
Between the guide rails 11 and 12, a cap 20 and flushing receiver 21 are provided. The cap 20 and the flushing receiver 21 are arranged on a lower side with respect to the ink ejection device 3. The cap 20 are arranged on a right end portion of the guide rails 11 and 12, while the flushing receiver 21 is arranged on a left end portion of the guide rails 11 and 12. It is noted that the cap 20 and flushing receiver 21 may be arranged reversely on the left and right.
The sub tank 7 and the four inkjet heads 8 are mounted on the carriage 6, and are moved, together with the carriage 6, reciprocally in the scanning direction. The sub tank 7 is connected to a cartridge holder 15 via a tube 17. To the cartridge holder 15, ink cartridges 16 of one or multiple colors (four colors, in the present embodiment) are mounted. The four colors are, for example, black, yellow, cyan, and magenta.
Inside the sub tank 7, for ink chambers are formed. In the four ink chambers, four colors of ink supplied by the four ink cartridges 16 are reserved, respectively.
The four inkjet heads 8 are arranged below the sub tank 7 in the scanning direction. On a lower surface of each inkjet head 8, multiple nozzles 80 (see
Each inkjet head 8 is provided with an ink inlet and an ink outlet. The ink inlet and the ink outlet are connected to the corresponding ink chamber via tubes. Between each ink inlet and the corresponding ink chamber, a circulation pump is interposed.
The ink sent from the ink chamber by the circulation pump flows into the inkjet heads 8 through the ink inlet and is ejected from the nozzles 80. The ink that is not ejected from the nozzles 80 returns to the inkjet head 8 through the ink inlet. The ink circulates between the ink chambers and the inkjet heads 8. The four inkjet heads 8 eject the four colors of ink toward the printing sheet 200 supplied from the sub tank 7, moving together with the carriage 6 in the scanning direction.
As shown in
Inside the piezoelectric body 83, a second common electrode 86 is provided. The second common electrode 86 is arranged on an upper side with respect to each pressure chamber 81 and on an upper side with respect to the first common electrode 84. The common electrode 86 is arranged at a position that does not face the first common electrode 84. On an upper side of each pressure chamber 81, and on an upper surface of the piezoelectric body 83, an individual electrode 85 is formed. The individual electrode 85 is arranged opposite, in the up-down direction, to the first common electrode 84 and the second common electrode 86 with the piezoelectric body 83 sandwiched therebetween. The vibrating plate 82, the piezoelectric body 83, the first common electrode 84, the individual electrode 85 and the second common electrode 86 constitute an actuator 88.
On a lower part of each pressure chamber 81, a nozzle plate 87 is provided. On the nozzle plate 87, multiple nozzles 80, each of which penetrates through the nozzle plate 87 in the up-down direction, are formed. The nozzles 80 are arranged on the bottom surface of each pressure. The multiple nozzles constitute multiple nozzle arrays, each of which extends along the pressure chamber array.
The first common electrode 84 is connected to a com terminal (in the present embodiment, the ground), and the second common electrode 86 is connected to a VCOM terminal. It is noted that a VCOM voltage is higher than a COM voltage. The individual electrode 85 is connected to a switch group 54 (see
The D/A converter 52 converts a digital signal to an analog signal. The amplifier 53 amplifies the analog signal. The switch group 54 includes multiple n-th switches 54(n), (n=1, 2, . . . ). The n-th switch 54(n) is configured by, for example, an analog switch IC. One ends of the multiple n-th switches 54(n) are connected to the amplifier 53 through a common bus. The other ends of the multiple n-th switches 54(n) are connected to respective individual electrode 85 corresponding to the multiple nozzles 80, respectively. The control circuit 51 transmits a selection signal S1 to select any of the switches 54(n) and a synchronization signal S2 to the switch group 54. The synchronization signal S2 contains synchronization signals S2a, S2b and S2c, which will be described later. The control circuit 51 transmits the selection signal S1 in association with, for example, one of the synchronization signals S2a, S2b and S2c.
The individual electrode 85, the first common electrode 84 and the piezoelectric body 83 constitute a first condenser 89a. Further, the individual electrode 85, the second common electrode 86 and the piezoelectric body 83 constitute a second condenser 89b.
In each of
The quantized data A0 is continuous with the quantized data B0, the quantized data B0 is continuous with the quantized data C0, and the quantized data C0 is continuous with the quantized data A1. Therefore, there is no quantized data C0, other quantized data or other waveform data between the quantized data A0 and the quantized data B0. Further, there is no quantized data A0, other quantized data or other waveform data between the quantized data B0 and the quantized data C0. Furthermore, there is no quantized data B0, other quantized data or other waveform data between the quantized data C0 and the quantized data A1. It is noted that the sampling frequency is 24 MHz, and the data length of the quantized data Ak, Bk, and Ck is about 41 ns.
The control circuit 51 outputs the time-series data to the D/A converter 52. As shown in
In other words, the time-division multiplexed signal is not an analog signal corresponding only to data Ak, an analog signal corresponding only to data Bk, or an analog signal corresponding only to data Ck. Further, the time-division multiplexed signal is configured in such a manner that at least an analog signal corresponding to a group of three pieces of data including one piece of data Ak, one piece of data Bk, and one piece of data Ck, and an analog signal corresponding to a group of three pieces of data including one piece of data A(k+1), one piece of data B(k+1), and one piece of data C(k+1), and are consecutive in time series.
For example, in
In a time-division multiplexed signal, when the portion corresponding to data Ak−1 is indicated as the first part, the portion corresponding to data Ak is indicated as the second part, the portion corresponding to data Bk−1 is indicated as the third part, and the portion corresponding to data Bk is indicated as the fourth part, the third part is arranged between the first part and the second part, and the second part is arranged between the third part and the fourth part. In other words, the first and third parts are continuous, the third part and the second part are continuous, and the second part and the fourth part are continuous. That is, in the time-division multiplexed signal, there is no second part, fourth part, or other waveforms between the first and third parts.
In the time-division multiplexed signal, there is no first part, fourth part and other waveforms between the third part and the second part. Furthermore, in the time-division multiplexed signal, there is no first part, third part, or other waveforms between the second and fourth parts. There are similar relationships are between data Ak and Ck, and there are similar relationships between data Bk and Ck. The control circuit 51, the D/A converter 52, the amplifier 53, and the memory 55 constitute a signal generator. One time-division multiplexed signal is contained within one ejection drive period. For example, when the ejection drive frequency (ejection frequency) is 100 kHz, one ejection drive period (ejection period) is 10 μs, and one time-division multiplexed signal is less than 10 μs in length. It is preferable that there are at least three pieces of data Ak, three pieces of data Bk and three pieces of data Ck in a single time-division multiplexed signal. The reason will be described later.
In
The value of AS(A(k−3)) reaches from the value of AS(C(k−4)) to the value of data A(k−3) after a particular time has elapsed. The value of AS(B(k−3)) reaches from the value of AS(A(k−3)) to the value of data B(k−3) after a particular time has elapsed. The value of AS(Ck−3) reaches from the value of AS(B(k−3)) to the value of data C(k−3) after a particular time has elapsed. That is, the analog signal reaches the value of the digital signal after elapse of a particular delay time from the point at which the conversion from a digital signal to an analog signal begins. These characteristics are the same for the time-division multiplexed signal 94 which is an amplified analog signal, as shown in the bottom-most
A time between t1a and t2a, a time between t1b and t2b, and a time between t1c and t2c are so-called transient response times, which are delay times td, respectively. The delay time td has been stored in the memory in advance. The time point t2a is a rising edge (i.e., ON point) of the pulse of the synchronization signal S2a. The time point t2b is a rising edge (i.e., ON point) of the pulse of the synchronization signal S2b. The time point t2c is a rising edge (i.e., ON point) of the pulse of the synchronization signal S2c. The time point t3a is a falling edge (i.e., OFF point) of the pulse of the synchronization signal S2a. The time point t3b is a falling edge (i.e., OFF point) of the pulse of the synchronization signal S2b. The time point t3c is a falling edge (i.e., OFF point) of the pulse of the synchronization signal S2c.
A time interval Δt is provided between the rising edge of the pulse of the synchronization signal S2a and the rising edge of the pulse of the synchronization signal S2b. Furthermore, a time interval Δt is provided between the rising edge of the pulse of synchronization signal S2b and the rising edge of the pulse of synchronization signal S2c. The time interval Δt corresponds to the period of each drive waveform signal Pa, Pb, and Pc.
A time Δt−td between time t2a and time t3a corresponds to a period of the synchronization signal S2a, and is shorter than a period Δt of the drive waveform signal Pa. A time Δt−td between time t2b and time t3b corresponds to a period of the synchronization signal S2b, and is shorter than a period Δt of the drive waveform signal Pb. A time Δt−td between time t2c and time t3c corresponds to a period of the synchronization signal S2c, and is shorter than a period Δt of the drive waveform signal Pc.
As mentioned above, the data Ak, Bk and Ck constituting the time-series data are arranged in sequence with the time interval Δt. Further, after the elapse of the delay time td, the drive waveform signal Pa reaches a target value (i.e., a value corresponding to the value of the data Ak). After the elapse of delay time td, the drive waveform signal Pb reaches a target value (i.e., a value corresponding to the value of data Bk). After the elapse of delay time td, the drive waveform signal Pc reaches a target value (i.e., a value corresponding to the value of data Ck).
Therefore, when the control circuit 51 accesses the time-division multiplexed signal at t2a, i.e., at the rising edge of the pulse of the synchronization signal S2a, the control circuit 51 can obtain the drive waveform signal Pa, which corresponds to data Ak and indicates drive waveform A. When the control circuit 51 accesses the time-division multiplexed signal at t2b, i.e., at the rising edge of the pulse of the synchronization signal S2b, the control circuit 51 can obtain the drive waveform signal Pb, which corresponds to data Bk and indicates drive waveform B. When the control circuit 51 accesses the time-division multiplexed signal at t2c, i.e., at the rising edge of the pulse of the synchronization signal S2c, the control circuit 51 can obtain the drive waveform signal Pc, which corresponds to data Ck and indicates drive waveform C. In other words, one type of time-division multiplexed signal is input to one n-th switch 54(n), thereby one of the drive waveform signal Pa, the drive waveform signal Pb, and the drive waveform signal Pc is separated from one type of time-division multiplexed signal. The n-th switch 54(n) is an example of an separator according to aspects of the present disclosures.
The switch group 54 selects the n-th switch 54(n) indicated by the selection signal S1, and selects the synchronization signals S2a, S2b or S2c associated with the selection signal S1 as selected. The switch group 54 opens and closes the selected n-th switch at the opening/closing timings indicated by the selected one of the synchronization signals S2a-S2c. In other words, the switch group 54 opens/closes the n-th switch 54(n) in accordance with a particular sampling frequency.
When the synchronization signal S2b is selected, the switch group 54 closes the n-th switch 54(n) during a period where the pulse of the synchronization signal S2b is in the high-level state, and opens the n-th switch 54(n) during a period where the pulse of the synchronization signal S2b is in the low-level state. Electrical charge applied to the individual electrode 85 when the n-th switch 54(n) is closed is held by the first condenser 89a and the second condenser 89b, and the drive waveform B1 is input to the actuator 88 as shown in
When the synchronization signal S2c is selected, the switch group 54 closes the n-th switch 54(n) during a period where the pulse of the synchronization signal S2c is in the high-level state, and opens the n-th switch 54(n) during a period where the pulse of the synchronization signal S2c is in the low-level state. Electrical charge applied to the individual electrode 85 when the n-th switch 54(n) is closed is held by the first condenser 89a and the second condenser 89b, and the drive waveform C1 is input to the actuator 88 as shown in
The particular sampling frequency is higher than a resonance frequency of the inkjet head 8. The resonance frequency of the inkjet head 8 is a resonance frequency when the pressure chamber 81 is not filled with liquid (ink), or a resonance frequency when the pressure chamber 81 is filled with the liquid (ink). When, for example, the resonance frequency when the pressure chamber 81 is not filled with the ink is 100 kHz, the resonance frequency when the pressure chamber 81 is filled with the ink is less than 100 kHz. Concretely, for example, the resonance frequency when the pressure chamber 81 is filled with the ink is 90 kHz. In other words, the resonance frequency of the inkjet head 8 when the pressure chamber 81 is not filled with the ink is greater than the same when the pressure chamber 81 is filled with the ink.
In the printing device 1 according to the present embodiment, the time-division multiplexed signal is generated based on the waveform data Da, Db and Dc which represent the waveforms A, B and C, respectively. From the generated time-division multiplexed signal, the drive waveform signal Pa indicating the drive waveform A, the drive waveform signal Pb indicating the drive waveform B, and the drive waveform signal Pc indicating the drive waveform C are separated. The actuator 88 is driven by the drive waveform signal Pa, Pb or Pc. That is, by selecting the drive waveform signal Pa, Pb or Pc, the amplitude of the drive waveform applied to the actuator 88 can be adjusted. Within a single period for printing one pixel, a cycle of only one of the selected drive waveforms A1, A2 and A3, while cycles of the unselected drive waveforms are not included. Therefore, a standby time of the nozzles 80 can be reduced.
There could be a case where the target values of the drive waveforms Pa, Pb and Pc are different. For example, in a case where the drive waveform signal Pb is output after the drive waveform signal Pa is output, and the target value of the drive waveform signal Pa and the target value of the drive waveform signal Pb are different, a particular time is required until the target value of the drive waveform signal Pa is changed to reach the target value of the drive waveform signal Pb. If the pulse of the synchronization signal S2b rises during this particular time, a value different from the target value of the drive waveform signal Pb is obtained, an ejection waveform is not formed to be the targeted waveform, thereby the ejection amount of the ink may easily be increased/decreased with respect to the target ejection amount. In the printing device 1 according to the present embodiment, the pulse of the synchronization signal S2b rises after elapse of the particular time (i.e., the delay time), it is ensured that the target value of the drive waveform can be obtained. That is, the ejection waveform is formed as the targeted waveform, and the ejection amount of the ink is hardly increased/decreased from the target ejection amount.
Hereinafter, a printing device according to a modified embodiment will be described. In a configuration according to the modified embodiment, components same as those in the above-described embodiment are assigned with the same reference numerals, and detailed descriptions thereof will be omitted.
Before the printing is started, the time-division multiplexed signal is input, from the amplifier 53, to the clip circuit 57. When the amplitude of the signal (i.e., a voltage value) of the signal input to the clip circuit 57 is equal to or greater than that of a digital signal for generating the time-division multiplexed signal (hereinafter, referred to as a threshold value), the clip circuit 57 deletes a portion equal to or greater than the threshold value from the input signal, and outputs a portion less than the threshold value from the input signal to the detection circuit 58. It is noted that the threshold value has been input in advance. For example, when the drive waveform signal Pc shown in
The clip circuit 57 may be configured such that, when the amplitude (i.e., the voltage value) of the input signal is equal to or less than the threshold value, the clip circuit 57 may delete a portion of the input signal equal to or less than the threshold value and output the processed signal to the detection circuit 58. It is noted that the threshold value has been stored, in advance, in the clip circuit 57. For example, when the drive waveform signal Pa shown in
When obtaining the delay time td, the switch group 54 turns on the pulse of the synchronization signals S2a, S2b or S2c after the elapse of the delay time td with respect to the input time t1a, t1b or t1c of the drive waveform signal Pa, Pb or PC. That is, the switch group 54 turns on the pulse of the synchronization signals S2a, S2b or S2c at time t2a, t2b or t2c. In response, the switch group 54 opens/closes the n-th switch 54(n) to separate the drive waveform signals Pa, Pb or PC from the time-division multiplexed signal. Then, the ink is ejected from the nozzle 80, and the process similar to the flushing process is performed.
The switch group 54 may be configured such that the n-th switch 54(n) is kept opened. By keeping the n-th switch 54(n) in the opened state, unnecessary ink ejection can be prevented in the obtaining process of the delay time td.
The control circuit 51 may be configured to output the digital signal of a non-ejection waveform. The digital signal of the non-ejection waveform is converted into an analog signal by the D/A converter 52, amplified by the amplifier 53 and input to the clip circuit 57. An analog signal of the non-ejection waveform is a signal having a lower voltage than the drive waveform signal not for ejecting ink from the nozzles 80. The use of the analog signal representing the non-ejection waveform, unnecessary ink ejection can be prevented. When the analog signal representing the non-ejection waveform is input to the clip circuit 57 and the detection circuit 58, the n-th switch 54(n) may be closed. In this case, although the ink is not ejected, by swinging a surface (i.e., meniscus) of the ink, drying of the ink at the nozzle 80 can be prevented. The clip circuit 57 and the detection circuit 58 may be included in the switch group 54.
Based on the delay time td, the control circuit 51 sets a point of time of a rising edge of a pulse that is a part of the synchronization signal S2a corresponding to one drive waveform signal Pa as time t2a, and sets a point of time of a rising edge of another pulse that is a part of the synchronization signal S2a corresponding to another drive waveform signal Pa also as time t2a. Then, the control circuit 51 may set a point of time of a falling edge of the pulse that is a part of the synchronization signal S2a corresponding to one drive waveform signal Pa as time t3a, and set a point of time of a falling edge of the other pulse that is a part of the synchronization signal S2a corresponding to the other drive waveform signal Pa also as time t3a, and output the synchronization signal S2a.
Further, based on the delay time td, the control circuit 51 sets a point of time of a rising edge of a pulse that is a part of the synchronization signal S2b corresponding to one drive waveform signal Pb as time t2b, and sets a point of time of a rising edge of another pulse that is a part of the synchronization signal S2b corresponding to another drive waveform signal Pb also as time t2b. Then, the control circuit 51 may set a point of time of a falling edge of the pulse that is a part of the synchronization signal S2b corresponding to one drive waveform signal Pb as time t3b, and set a point of time of a falling edge of the other pulse that is a part of the synchronization signal S2b corresponding to the other drive waveform signal Pa also as time t3a, and output the synchronization signal S2b.
Furthermore, based on the delay time td, the control circuit 51 sets a point of time of a rising edge of a pulse that is a part of the synchronization signal S2c corresponding to one drive waveform signal Pc as time t2c, and sets a point of time of a rising edge of another pulse that is a part of the synchronization signal S2c corresponding to another drive waveform signal Pc also as time t2c. Then, the control circuit 51 may set a point of time of a falling edge of the pulse that is a part of the synchronization signal S2c corresponding to one drive waveform signal Pc as time t3c, and set a point of time of a falling edge of the other pulse that is a part of the synchronization signal S2c corresponding to the other drive waveform signal Pa also as time t3c, and output the synchronization signal S2c.
Based on the delay time td, the control circuit 51 sets a point of time of a rising edge of a pulse that is a part of the synchronization signal S2a corresponding to one drive waveform signal Pa as time t2a, and sets a point of time of a rising edge of another pulse that is a part of the synchronization signal S2a corresponding to another drive waveform signal Pa also as time t2a. Then, the control circuit 51 may set a point of time of a falling edge of the pulse that is a part of the synchronization signal S2a corresponding to one drive waveform signal Pa as time t3a, and set a point of time of a falling edge of the other pulse that is a part of the synchronization signal S2a corresponding to the other drive waveform signal Pa also as time t3a, and output the synchronization signal S2a. Further, based on the delay time td, the control circuit 51 sets a point of time of a rising edge of a pulse that is a part of the synchronization signal S2b corresponding to one drive waveform signal Pb as time t2b, and sets a point of time of a rising edge of another pulse that is a part of the synchronization signal S2b corresponding to another drive waveform signal Pb also as time t2b. Then, the control circuit 51 may set a point of time of a falling edge of the pulse that is a part of the synchronization signal S2b corresponding to one drive waveform signal Pb as time t3b, and set a point of time of a falling edge of the other pulse that is a part of the synchronization signal S2b corresponding to the other drive waveform signal Pa also as time t3a, and output the synchronization signal S2b.Furthermore, based on the delay time td, the control circuit 51 sets a point of time of a rising edge of a pulse that is a part of the synchronization signal S2c corresponding to one drive waveform signal Pc as time t2c, and sets a point of time of a rising edge of another pulse that is a part of the synchronization signal S2c corresponding to another drive waveform signal Pc also as time t2c. Then, the control circuit 51 may set a point of time of a falling edge of the pulse that is a part of the synchronization signal S2c corresponding to one drive waveform signal Pc as time t3c, and set a point of time of a falling edge of the other pulse that is a part of the synchronization signal S2c corresponding to the other drive waveform signal Pa also as time t3c, and output the synchronization signal S2c.
As shown in
The control circuit 51 outputs time-series data to the D/A converter 52. The D/A converter 52 converts the time-series data to analog signal and outputs the converted signal to the sample and hold unit 61. The control circuit 51 also outputs sampling signals S3a-S3c representing sampling frequencies to the sample and hold unit 61. The sampling signal S3a is input to the first sample and hold unit 61, the sampling signal S3b is input to the second sample and hold circuit 61b, and the sampling signal S3c is input to the third sample and hold circuit 61c. It is noted that the sampling periods of respective sampling signals S3a-S3c are different from each other, and shifted by a time interval Δt. In the following description, the three sampling signals S3a, S3b and S3c will occasionally be referred simply as “sampling signals S3” (see
The first sample and hold circuit 61a samples and holds an analog signal with the sampling period of the sampling signal S3a and outputs the signal to the amplifier 53a. The second sample and hold circuit 61b samples and holds an analog signal with the sampling period of the sampling signal S3b and outputs the signal to the amplifier 53b. The third sample and hold circuit 61c samples and holds the analog signal with the sampling period of the sampling signal S3c and outputs the signal to the amplifier 53c.
The control circuit 51 outputs a time-division signal S4a corresponding to the analog signal output by the amplifier 53a, a time-division signal S4b corresponding to the analog signal output by the amplifier 53b, and a time-division signal S4c corresponding to the analog signal output by the amplifier 53c to the switch controller 60. In the following description, the three time-division signals S4a, S4b, and S4c may also simply be referred to as time-division signals S4 (see
The time-division signals S4a, S4b and S4c are pulse waves. Between the rise point of the pulse of the time-division signal S4a and the rise point of the pulse of the time-division signal S4b, a time interval Δt is provided. Furthermore, between the rise point of the pulse of the time-division signal S4b and the rise point of the pulse of the time-division signal S4c, a time interval Δt is provided, and between the rise point of the pulse of the time-division signal S4c and the rise point of the pulse of the time-division signal S4a, a time interval Δt is provided. The time-division signals S4a, S4b, and S4c correspond to the above-mentioned s S2a, S2b, and S2c, respectively.
The first switch 60a closes when the pulse of the time-division signal S4a is in the high-level range and opens when the pulse of the time-division signal S4b is in the low-level range. The second switch 60b closes when the pulse of the time division signal S4b is in the high-level range and opens when the pulse is in the low-level range. The third switch 60c closes when the pulse of the time-division signal S3c is in the high-level range and opens when the pulse of the time-division signal S3c is in the low-level range. The first, second, and third switches 60A, 60B, and 60C may be open at the same time, but not closed at the same time. This is because if the first, second and third switches 60a, 60b and 60c are closed at the same time, the analog signals 61A, 61B and 61C will be mixed together.
The switch controller 60 outputs a time-division multiplexed signal that is a composite of the analog signals 61A-61C. The time-division multiplexed signal is similar to the analog signal shown in
As shown in
To drive the actuator 88, the control circuit 51 accesses the memory 55 to obtain the drive waveform data Da, and outputs the obtained drive waveform data Da to the first D/A converter 52a. Further, the control circuit 51 accesses the memory 55 to obtain the drive waveform data Db, and outputs the obtained drive waveform data Db to the second D/A converter 52b. Furthermore, the control circuit 51 accesses the memory 55 to obtain drive waveform data Dc and output the obtained drive waveform data Dc to the third D/A converter 52c.
The first D/A converter 52a, second D/A converter 52b, and third D/A converter 52c output analog signals 61A, 61B, and 61C to three amplifiers 53a, 53b, and 53c, respectively. The amplifiers 53A, 53B, and 53C amplify the analog signals 61A, 61B, and 61C and output the analog signals 61A, 61B, and 61C amplified by the three amplifiers 53a, 53b, and 53c, respectively to the switch controller 60, respectively. The analog signals 61A, 61B, and 61C are the same as those shown in
As shown in
The control circuit 51 performs the flushing process (S4). The flushing process is a process of causing the nozzles 80 to eject the ink for the purpose other than the printing, and is performed by a flushing receiver 21. The control circuit 51 determines whether the flushing process is completed (S5). Until the flushing process is completed (S5: NO), determination in S5 is repeated.
When the flushing process has been completed (S5: YES), the control circuit 51 becomes in a standby state (S6).
The control circuit 51 may execute the delay time obtaining process during the execution of the printing process. For example, the delay time obtaining process may be performed after receiving a print job and before executing one print task. A print task is a unit that constitutes a print job. For example, one printing task is a liquid ejection process that is performed while the inkjet head 8 moves to the right or left by an amount of a width of the printing sheet 200. Further, the delay time obtaining process may be executed after the print job has been completed and before the flushing process is performed. Furthermore, when a non-ejection flushing process is to be executed, the delay time obtaining process may be executed prior to the execution of the non-ejection flushing process. The delay time obtaining process may be executed after the completion of the execution of one printing task and before the execution of the flushing process. The control circuit 51 is an example of an obtaining circuit according to aspects of the present disclosures.
Hereinafter, the printing device 1 according to another modification of the embodiment will be described. The same reference numerals are used for the same components as in the above-described embodiment and modified embodiment, and the detailed description thereof is omitted.
In
A time period K1 indicates the time that the drive waveform signal Pa′ remains in an ON state, that is, the time that the pulse of the synchronization signal S2a′ remains in an ON state. A time period K2 indicates the time that the drive waveform signal Pb′ remains in an ON state, that is, the time that the pulse of the synchronization signal S2b′ remains in an ON state. A time period K3 indicates the time that the drive waveform signal PC′ remains in an ON state, that is, the time that the pulse of the synchronization signal S2c′ remains in an ON state. The time periods K1, K2 and K3 are arranged in sequence without gaps.
During the time period K2, the drive waveform signal Pb′ is separated from the ideal time-division multiplexed signal by the synchronization signal S2b′. During the time period K3, the drive waveform signal Pc′ is separated from the ideal time-division multiplexed signal by the synchronization signal S2c′.
Te indicates a start of an ON state of the drive waveform signal Pa, and Td indicates an end of an ON state of the drive waveform signal Pa. Te is the time point later than Ta, and Td is the time point later than Tc. As shown in
As described above, time Td is later than time Tc. That is, the point of time when the pulse signal of the synchronization signal S2a ends the ON state is later than the start point of time period K2. Similarly, the point of time when the pulse signal of the synchronization signal S2b ends the ON state is later than the start of time period K3, and the point of time when the pulse signal of the synchronization signal S2c ends the ON state is later than the start of time period K1.
A point of time Te at which the drive waveform signal Pa is turned on is delayed with respect to the start time Ta at which the ideal drive waveform signal Pa′ is turned on, by the delay time (Te−Ta). Furthermore, the point of time Tb at which the drive waveform signal Pa reaches the target value is delayed with respect to the point of time Te by a delay time (Te−Tb). The sum of the delay time (Te−Tb) and the delay time (Te−Ta) includes the delay time due to transient response occurring in the amplifier 53, the delay time occurring in the D/A converter, and the delay time occurring in the transmission path between the amplifier 53 and the switch group 54.
That is, the time during which the drive waveform signal Pa reaches the target value is the time between time Tb and time Td. Each pulse of the synchronization signal S2a is turned on for the time between time tb and time td. The timing at which each pulse of the synchronization signal S2a turns on is the same as the timing at which the drive waveform signal Pa turns on. In other words, the drive waveform signal Pa is separated from the time-division multiplexed signal by the synchronization signal S2a. Similarly, the timing at which each pulse of the synchronization signal S2b turns on is the same as the timing at which the drive waveform signal Pb turns on, and the timing at which each pulse of the synchronization signal S2c turns on is the same as the timing at which the drive waveform signal Pc turns on. The drive waveform signal Pc is separated from the time-division multiplexed signal by the synchronization signal S2c.
As described above, the start of the ON state of the pulse of the synchronization signal S2a is not the start time Ta of the ON state of the ideal drive waveform signal Pa′, but time Te which is later than time Ta. Further, the end time of the ON state of the pulse of the synchronization signal S2a is not the end time Ec of the ideal drive waveform signal Pa′, but time Td which is later than time Tc. If the start of the ON state of the pulse of the synchronization signal S2a is time Ta and the end of the ON state of the pulse of the synchronization signal S2a is time Tc, a part of the drive waveform signal PC or a transient response part of the drive waveform signal Pa (i.e., a portion not reaching the target value of the drive waveform signal Pa) is extracted. That is, a value different from the target value of the drive waveform signal Pa is obtained, the ejection waveform does not form the target waveform, and the ink ejection amount tends to increase or decrease from the target ejection amount. In the printing device according to embodiment 3, the pulse of the synchronization signal S2a rises after the delay time has elapsed, so the target value of the drive waveform signal Pa can be obtained. That is, the ejection waveform forms the target waveform and the ink ejection amount is less likely to increase or decrease from the target ejection amount.
Furthermore, as the amplitudes of the drive waveform signals Pa′ and Pa increase, the difference between the rising time of the drive waveform signal Pa′ and the rising time of the drive waveform signal Pa increases. Therefore, as the amplitudes of the drive waveform signals Pa′ and Pa increase, the time at which the drive waveform signal Pa reaches the target value becomes slower, and the time at which the synchronization signal S2a begins to be turned on also becomes slower as the amplitudes of the drive waveform signals Pa′ and Pa increase. The same applies to the drive waveform signals Pb and Pc and the s S2b and S2c.
In the above description, the case where the drive waveform signals Pa′ and Pa are convex is described, but the same applies to the case where the drive waveform signals Pa′ and Pa are concave. In other words, the synchronization signal S2a remains in ON state at the rising edge of the drive waveform signal Pa′, the synchronization signal S2b remains in ON state at the rising edge of the drive waveform signal Pb′, and the synchronization signal S2c remains in ON state at the rising edge of the drive waveform signal PC′. In other words, the synchronization signal S2a extends across the drive waveform signals Pa′ and Pb′ and overlaps the time when the drive waveform signal Pb′ is sent out. Furthermore, the synchronization signal S2b extends across the drive waveform signal Pb′ and the drive waveform signal PC′, and overlaps the time when the drive waveform signal PC′ is sent out. Furthermore, the synchronization signal S2c extends across the drive waveform signal PC′ and the drive waveform signal Pa′, and overlaps the time when the drive waveform signal Pa′ is sent out.
The embodiment, modified embodiments and modifications thereof disclosed herein should be considered in all respects illustrative and not restrictive. The technical features described above can be combined with each other where appropriate, and aspects of the present disclosures are intended to include all changes within the scope of the claims and their equivalents.
Number | Date | Country | Kind |
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2022-061987 | Apr 2022 | JP | national |