The present disclosure relates to communication equipment and, more specifically but not exclusively, to methods and apparatus for (i) transmitting information using probabilistic signal shaping and (ii) generating codes therefor.
This section introduces aspects that may help facilitate a better understanding of the disclosure. Accordingly, the statements of this section are to be read in this light and are not to be understood as admissions about what is in the prior art or what is not in the prior art.
Signal shaping can beneficially provide energy savings often referred to as the shaping gain. In a representative implementation of signal shaping, constellation symbols of a relatively large energy are transmitted less frequently than constellation symbols of a relatively small energy. For example, when constellation symbols are transmitted over a linear communication channel with a rate of occurrence that approximates a continuous Gaussian distribution in every dimension of the operative constellation, the shaping gain can theoretically approach 1.53 dB.
Disclosed herein are various embodiments of a shaping encoder configured to use a variable-length shaping code to implement fixed-input fixed-output (FIFO) probabilistic signal shaping. In various embodiments, the variable-length shaping code can be a variable-input fixed-output (VIFO) code, a fixed-input variable-output (FIVO) code, or a variable-input variable-output (VIVO) code. The FIFO functionality of the shaping encoder is enabled by a control circuit that operates to: (i) check an output-overflow condition for each bit-word to be encoded using the variable-length shaping code and (ii) switch the shaping encoder from using the variable-length shaping code to using a suitable FIFO code if the output-overflow condition is satisfied.
Some embodiments of the shaping encoder can incorporate a conventional FEC encoder in a manner that substantially preserves the shaping gain realized by the shaping encoder.
In some embodiments, the variable-length shaping code can be constructed and optimized, using the disclosed methods, to maximize the shaping gain.
Some embodiments beneficially lend themselves to being implemented using digital circuits of relatively small size and/or relatively low complexity.
According to an example embodiment, provided is an apparatus comprising: a shaping encoder configured to use a variable-length shaping code to convert an input block of bits into an output sequence of constellation symbols, the input block of bits having a first fixed number of bits, and the output sequence of constellation symbols having a second fixed number of constellation symbols; and a transmitter operatively coupled to the shaping encoder to transmit a modulated signal carrying the output sequence of constellation symbols.
According to another example embodiment, provided is a machine-implemented communication method comprising the steps of: receiving an input block of bits having a first fixed number of bits; and converting the input block of bits into an output sequence of constellation symbols having a second fixed number of constellation symbols, said converting being performed using a shaping encoder configured to use a variable-length shaping code.
According to yet another example embodiment, provided is a communication method comprising the steps of: configuring a shaping encoder to use a variable-length shaping code to convert an input block of bits into an output sequence of constellation symbols, the input block of bits having a first fixed number of bits, and the output sequence of constellation symbols having a second fixed number of constellation symbols; and operatively coupling a transmitter to the shaping encoder, the transmitter being capable of transmitting a modulated signal carrying the output sequence of constellation symbols.
Other aspects, features, and benefits of various disclosed embodiments will become more fully apparent, by way of example, from the following detailed description and the accompanying drawings, in which:
Modern forward-error-correction (FEC) codes, such as low-density parity-check (LDPC) codes, already approach the constrained Shannon limit to within approximately 0.5 dB. Hence, further investment in the development of better and/or more-sophisticated FEC codes can only provide diminished returns that are limited by this relatively low incremental value of the FEC-coding gain. For comparison, a practically attainable value of the shaping gain can be approximately 1 dB for linear channels, and even higher for nonlinear channels. Due to the latter value being higher than the still-possible increase of the FEC-coding gain (i.e., 1 dB>0.5 dB), development of methods and apparatus for signal shaping is currently being pursued by the telecom industry. Signal-shaping methods that can be implemented with relatively low complexity and/or cost of the corresponding electronic circuits appear to be especially desirable.
There are two general types of signal shaping that are referred to as geometric and probabilistic, respectively. Geometric shaping can be implemented to optimize the location of constellation points (symbols) on the complex plane for a fixed (but not necessarily uniform) symbol probability. Probabilistic shaping can be implemented to optimize the probability of constellation symbols that are located on a fixed (but not necessarily uniform) grid on the complex plane. Although both types of signal shaping can theoretically be implemented to achieve the shaping gain of up to 1.53 dB for an additive-white-Gaussian-noise (AWGN) channel, probabilistic shaping offers several important advantages over geometric shaping. These advantages include but are not limited to compatibility with conventional (e.g., available off-the-shelf) constellations and FEC codes.
System 100 implements probabilistic signal shaping using a shaping encoder 110 at transmitter 104 and a shaping decoder 160 at receiver 108. Shaping encoder 110 operates to transform an input data stream 102 into a corresponding sequence 138 of constellation symbols in which different constellation symbols appear with different respective rates of occurrence. A front-end (FE) module 140 of transmitter 104 then uses sequence 138 to generate a corresponding modulated communication signal 142 suitable for transmission over link 106 and having encoded thereon the constellation symbols of sequence 138.
Link 106 imparts a noise 144 and possibly other linear and/or nonlinear signal impairments (not explicitly shown in
If noise 144 and/or other signal impairments imparted onto the received communication signal 142′ by link 106 are relatively strong, then additional measures can be taken to cause output data stream 102′ to have an acceptably low bit-error rate (BER). An example of such measures is described in more detail below in reference to
Shaping encoder 110 comprises a constellation mapper 136 that operates to (i) parse input data stream 102 into bit-words using the codebooks stored in look-up tables (LUTs) 1201 and 1202, (ii) convert each of the bit-words into a corresponding codeword using the codebooks stored in LUTs 1201 and 1202, and (iii) further convert each of the codewords into a corresponding constellation symbol or set of constellation symbols, thereby generating constellation-symbol sequence 138.
As used herein, the term “constellation symbol” should be construed to encompass both constellation symbols of a one-dimensional constellation and of a multi-dimensional constellation. An example one-dimensional constellation enables the transmission of a single constellation symbol in a single signaling interval (time slot) over a single dimension of the carrier. In contrast, a multi-dimensional constellation enables the transmission of a single constellation symbol using multiple signaling intervals and/or multiple dimensions of the carrier. For a one-dimensional carrier, the dimensionality of the multi-dimensional constellation can be defined as the number of signaling intervals used for the transmission of a single constellation symbol. An N-dimensional constellation can be constructed using N different one-dimensional constellations or N copies of the same one-dimensional constellation.
A person of ordinary skill in the art will understand that other constellations that differ from the example constellations of
For illustration purposes and without any implied limitation, system 100 is described herein below in reference to an example embodiment in which constellation mapper 136 is implemented using a 4-PAM constellation, such as constellation 210 (
Referring back to
A codebook selector 132 operates to connect constellation mapper 136 to either LUT 1201 or LUT 1202. The state of codebook selector 132 is controlled by a control signal 114 that is generated by a control circuit 112. In an example embodiment, codebook selector 132 connects constellation mapper 136 to LUT 1201 to enable the constellation mapper to read from codebook C1 if control circuit 112 is de-asserted (e.g., is “low”). Codebook selector 132 connects constellation mapper 136 to LUT 1202 to enable the constellation mapper to read from codebook C2 if control circuit 112 is asserted (e.g., is “high”). Control circuit 112 changes the state (asserts or de-asserts) control signal 114 based on the analysis of input data stream 102 as further described below, e.g., in reference to Eqs. (1)-(4).
Shaping encoder 110 operates as a FIFO encoder despite the fact that it uses a variable-length signal-shaping code of codebook C1. More specifically, shaping encoder 110 operates on a block of input bits of a predetermined fixed length K to transform it into a corresponding set of constellation symbols of a predetermined fixed length L2, where K and L2 are positive integers. The numbers K and L2 are fixed for each particular embodiment, but can change from embodiment to embodiment. In other words, the numbers K and L2 are parameters of the signal-shaping algorithm used in system 100.
The FIFO functionality of shaping encoder 110 is enabled by the data processing performed in control circuit 112. More specifically, a variable-length signal-shaping code, such as that of codebook C1, naturally produces a variable-length output from a fixed-length input. The length of the output depends on the input bit sequence and fluctuates around an average length L0, which is a characteristic of the code. The length L2 is selected such that L2>L0, but is not too large in the sense that some input bit sequences of the length K can still cause the length L of the corresponding C1-coded output to be greater than the length L2. This condition is hereafter referred to as the “output overflow.” The data processing performed in control circuit 112 is designed to predict a possible output overflow for each particular block of input bits that is being encoded by shaping encoder 110 and switch constellation mapper 136 from the use of variable-length (VIFO, FIVO, or VIVO) signal-shaping code of codebook C1 to the use of the FIFO signal-shaping code of codebook C2 at an appropriate point within the input block such that the output overflow can be avoided.
On the other hand, for some blocks of input bits, the length L of the corresponding C1-coded output can be smaller than the length L2. This condition is hereafter referred to as the “output underflow.” In this situation, control circuit 112 does not switch constellation mapper 136 from the use of codebook C1 to the use of codebook C2. Instead, constellation mapper 136 appends (L2-L) constellation symbols, each having fixed arbitrary amplitude, after the encoding of the input block is completed. A person of ordinary skill in the art will understand that the amplitude bits representing the fixed arbitrary amplitude of the appended constellation symbols do not carry any useful information.
Shaping encoder 110 can generate L2 output constellation symbols for any block of K input bits by (i) switching constellation mapper 136 from the use of the variable-length (VIFO, FIVO, or VIVO) signal-shaping code of codebook C1 to the use of the FIFO code of codebook C2 in case of a predicted output overflow and (ii) appending constellation symbols of arbitrary fixed amplitude in case of the output underflow. A method of generating a suitable codebook C1 that enables system 100 to optimize the shaping gain (e.g., realize a maximum, practically achievable shaping gain) is described in more detail below in reference to
The following non-limiting examples, which are described below in reference to
Pr[1]=0.79;
Pr[3]=0.21.
The average transmit energy per constellation symbol for codebook 310 is 2.71. The average number of amplitudes per information bit is 1.35.
Note that each of the codewords of C1 codebook 310 has three amplitudes and, as such, can be transmitted using three signaling intervals. As a result, in some embodiments, C1 codebook 310 can be used in conjunction with an appropriately constructed 3-dimensional constellation.
Pr[1]=0.80;
Pr[3]=0.20.
The average transmit energy per constellation symbol for codebook 320 is 2.6. The average number of amplitudes per information bit is 1.45.
Pr[1]=Pr[3]=0.5.
The average transmit energy per constellation symbol for codebook 400 is 5. The number of amplitudes per information bit is 1.
Comparing the average transmit energy of each of codebooks 310, 320, and 330 with the average transmit energy of codebook 400, one arrives at the following theoretical values of energy savings: 2.66 dB for codebook 310; 2.84 dB for codebook 320; and greater than about 2.84 dB for codebook 330.
At step 502 of method 500, shaping encoder 110 receives an input block of K input bits supplied via input data stream 102. The received K input bits are sorted into first and second groups, the first group having L2 bits that are designated as sign bits, and the second group having L1 (=K−L2) bits that are designated as amplitude bits. The sign bits are temporarily stored in a buffer (not explicitly shown in
At step 504, the sequence of amplitude bits is parsed to determine a next bit-word to be encoded. The parsing is performed in accordance with codebook C1 stored in LUT 1201. To determine the next bit-word, constellation mapper 136 compares several initial bits of the remaining (unprocessed) portion of the sequence of amplitude bits with the bit-words listed in the bit-word column of codebook C1 (see, e.g.,
At step 506, control circuit 112 checks whether or not an output overflow is expected. The quantitative condition used at step 506 to predict an output overflow depends on the particular embodiment in general, and on the particular codebook C1 stored in LUT 1201 in particular. Several examples of a quantitative condition that can be used at step 506 to predict an output overflow are provided below.
A first example corresponds to codebook 310 of
Eq. (1) provides a mathematical expression that is based on the above-described considerations:
where vi is the length of the i-th codeword (in this case v1=3); ui is the length of the i-th bit-word (in this case ui ε{1, 2, . . . , 6}); and n is an integer that indicates that method 500 is currently processing the n-th bit-word of the received sequence of amplitude bits. Qualitatively, the term on the left-hand side of Eq. (1) represents the number of available output-amplitude positions in the fixed-length output block after encoding of the n-th bit-word is completed. The term on the right-hand side of Eq. (1) represents the required space to encode the (n+1)-th bit-word and all subsequent bit-words using the FIFO codebook C2, after having encoded the n-th bit-word using codebook C1. It can mathematically be proven that, if the condition expressed by Eq. (1) is satisfied for the n-th bit-word, then shaping encoder 110 can proceed to encode the n-th bit-word using codebook C1 without expecting an output overflow.
Eqs. (2)-(4) provide additional examples of mathematical expressions that can be used at step 506 to determine whether or not an output overflow is expected. Eq. (2) corresponds to codebook 310 of
In Eqs. (2)-(4), m is the number of codewords in codebook C1; L1≈round(βL2), where β is the information rate of the code represented by codebook C1; sn-1 is the sum of the lengths of the initial (n−1) bit-words; un is the length of the n-th bit-word; and tn is the sum of the lengths of the n codewords.
If the corresponding one of Eqs. (1)-(4) is satisfied, then an output overflow is not expected. In this case, the processing of method 500 is directed to step 508. On the other hand, if the corresponding one of Eqs. (2)-(4) is not satisfied, then an output overflow is expected with the continued use of codebook C1. In this case, the processing of method 500 is directed to step 510.
Based on the above examples of the output-overflow condition, a person of ordinary skill in the art will be able to construct and use an output overflow condition suitable for each specific embodiment. For example, for some embodiments, Eqs. (1)-(4) can be modified such that some of the variables ui and vi are replaced by max(ui) and max(vi), respectively. The definition of tn can also be modified accordingly. Another possible modification of Eqs. (1)-(4) is to use a corresponding complementary inequality, in which the “≧” sign is replaced by the “<” sign.
At step 508, the bit-word determined by parsing the input sequence of amplitude bits at step 504 is converted into the corresponding codeword using codebook C1. In the mathematical nomenclature used above in the description of step 506, the bit-word processed at step 508 is the n-th bit-word. The resulting codeword is the n-th codeword.
At step 510, control circuit 112 asserts the previously de-asserted control signal 114, which causes constellation mapper 136 to switch to reading from LUT 1202, instead of reading from LUT 1201. As a result, constellation mapper 136 is reconfigured to use codebook C2 instead of codebook C1. Constellation mapper 136 then proceeds to use codebook C2 until the remainder the input sequence of amplitude bits is converted into amplitudes.
At step 512, it is determined whether or not the input sequence of amplitude bits has been processed in its entirety. If all bits of the input sequence of amplitude bits have been processed, then the processing of method 500 is directed to step 514. Otherwise, the processing of method 500 is directed back to step 504.
At step 514, the sum S of the lengths of the generated codewords is compared with L2. If S is smaller than L2, then an output underflow has occurred and the processing of method 500 is directed to step 516. Otherwise, the processing of method 500 is directed to step 518.
At step 516, a set of (L2−S) fixed amplitudes (e.g., all “ones”) is appended to the S previously generated amplitudes to generate a total of L2 amplitudes.
At step 518, the L2 sign bits stored in the buffer of constellation mapper 136 at step 502 are combined with the L2 amplitudes generated in the preceding steps to generate L2 4-PAM constellation symbols for sequence 138.
Referring back to
In an example embodiment, shaping decoder 160 comprises a control circuit 154, LUTs 1641 and 1642, a codebook selector 172, and a constellation demapper 176. LUTs 1641 and 1642 contain the same codebooks C1 and C2 as LUTs 1201 and 1202, respectively. The state of codebook selector 172 is controlled by a control signal 156 that is similar to the above-described control signal 114. Control circuit 154 generates control signal 156 by analyzing constellation-symbol sequence 152 to determine the locations in the sequence where shaping encoder 110 switched from the use of codebook C1 to the use of codebook C2. Based on this analysis, control circuit 154 operates to appropriately change the state of control signal 156 when the decoding process reaches the determined locations. Demapper 176 operates to: (i) partially demap a block of constellation symbols to generate a corresponding set of sign bits and a corresponding sequence of amplitudes; (ii) parse the sequence of amplitudes into codewords using codebooks C1 and C2 stored in LUTs 1641 and 1642; (iii) convert each codeword into a corresponding bit-word using the codebooks; and (iv) appropriately combine the set of sign bits and the bit-words to generate a block of L1 bits for output data stream 102′.
At step 602, shaping decoder 160 receives a block of L2 constellation symbols of constellation-symbol sequence 152. As already indicated above in reference to
At step 604, the sequence of amplitudes is parsed to determine a next codeword to be decoded. The parsing is performed in accordance with codebook C1 stored in LUT 1641. To determine the next codeword, constellation demapper 176 compares several initial amplitudes of the remaining (unprocessed) portion of the sequence with the codewords listed in the codeword column of codebook C1 (see, e.g.,
At step 606, control circuit 154 determines whether the codeword was encoded using codebook C1 or codebook C2. This determination can be carried out by checking the same condition as that used at step 504 of the counterpart method 500. Several examples of such condition are already presented and explained above in reference to Eqs. (1)-(4).
If the corresponding one of Eqs. (1)-(4) is satisfied, then the corresponding codeword was generated by shaping encoder 110 using codebook C1. In this case, the processing of method 600 is directed to step 608. On the other hand, if the corresponding one of Eqs. (1)-(4) is not satisfied, then the corresponding codeword was generated by shaping encoder 110 using codebook C2. In this case, the processing of method 600 is directed to step 610.
At step 608, the codeword determined by parsing the sequence of amplitudes at step 604 is converted into the corresponding bit-word using codebook C1. In the mathematical nomenclature, the codeword processed at step 608 is the n-th codeword. The resulting bit-word is the n-th bit-word.
At step 610, control circuit 154 asserts the previously de-asserted control signal 156, which causes constellation demapper 176 to switch to reading from LUT 1642, instead of reading from LUT 1641. As a result, constellation demapper 176 is reconfigured to use codebook C2 instead of codebook C1. Constellation demapper 176 then proceeds to use codebook C2 until the remainder the amplitude sequence is converted into bits.
At step 612, the sum S of the lengths of the generated bit-words is compared with L1. If S is smaller than L1, then the processing of method 600 is directed back to step 604. Otherwise, the processing of method 600 is directed to step 614.
At step 614, the remaining (unprocessed) portion (if any) of the amplitude sequence is discarded. A person of ordinary skill in the art will understand that the discarded amplitudes do not carry any useful information because they were appended at shaping encoder 110 due to the output underflow.
At step 616, the sign bits stored in the buffer of constellation demapper 176 at step 602 are appropriately combined with the bit-words generated in the preceding steps to generate L1 bits for output data stream 102′.
Transmitter 104 in system 700 includes a systematic FEC encoder 720 that performs FEC encoding in a conventional manner. More specifically, FEC encoder 720 receives an input bit sequence generated by concatenating a first set of bits 718 and a second set of bits 706 and converts this bit sequence into an expanded bit sequence by appending to the former bit sequence a set of parity bits generated in accordance with the operative FEC algorithm. The parity bits are appended to the second set of bits 706, thereby transforming it into a set of bits 722. Although FEC encoder 720 uses the first set of bits 718 in the process of generating the set of parity bits, the first set of bits 718 passes through FEC encoder 720 without any changes. The first set of bits 718 and the second set of bits 706 are generated from a block of input bits received via input data stream 102 as further detailed below.
A block of K bits of input data stream 102 is applied to a bit sorter 702 that operates to sort the received block into two groups (sets) that are labeled in
In an example embodiment, shaping encoder 710 performs steps 504-516 of method 500 (
Receiver 108 in system 700 includes a conventional 4-PAM demapper 740 that operates to generate, based on the output signal 152 received from FE module 150, an amplitude set 712′ containing L2 amplitudes and a sign-bit set of 722′ containing L2 sign bits. The set 712′ might differ from the set 712 generated at transmitter 104 due to the presence of errors induced by noise 144. The set 722′ might also differ from the set 722 generated at transmitter 104 for the same reason.
A/B converter 716 converts the amplitude set 712′ into bits as described above, thereby generating a set of bits 718′. If the amplitude set 712′ differs from the amplitude set 712, then the set 718′ differs from the set 718 due to error propagation. An FEC decoder 750 operates to correct any errors in the sets 718′ and 722′ using the same FEC code as that used in FEC encoder 720, thereby recovering the sets 718 and 722. FEC decoder 750 then discards the parity bits from the recovered set 722, thereby recovering the sign-bit set 706. B/A converter 724 converts the recovered set 718 into amplitudes as described above, thereby recovering the amplitude set 712. A shaping decoder 760 then decodes the recovered amplitude set 712 to recover the set 704 of amplitude bits. In an example embodiment, shaping decoder 760 can perform the decoding by executing steps 604-614 of method 600.
A bit combiner 770 operates to regenerate the original block of K bits of input data stream 102 by performing an inverse operation to the sorting operation performed by bit sorter 702. Bit combiner 770 then outputs the regenerated block of K bits as part of the output data stream 102′.
Some embodiments of communication systems 100 (
where the parameter λ≧0 determines the information rate and average energy, and Z(λ) is the partition function given by Eq. (6):
For example, to enumerate all of the trees T(2)εΩ(2), one can begin with a root node, and then append a tree T(1)εΩ(1) to the left edge of the root node and another tree T(1)εΩ(1) to the right edge of the root node, as depicted in
From a graph theory perspective, the above-described trees T(m) belong to a class of rooted ordered full binary trees. The number of such trees in the corresponding set Ω(m). i.e., the cardinality of Ω(m), equals the Catalan number Cm-1, as expressed by Eq. (7):
Suppose now that every left edge has the weight of 1, and every right edge has the weight of 9, which correspond to the transmit energies of the amplitudes 1 and 3, respectively, of a PAM-4 constellation. One can then define the following quantities.
The weight of a leaf node is defined by the sum of the edge weights along the path from the root node to the leaf node.
The sum weight of a tree is defined by the sum of the weights of all leaf nodes.
The depth of a leaf node is defined by the number of the edges on the path from the root node to the leaf node.
The sum depth of a tree is defined by the sum of the depths of all leaf nodes.
A tree T(m, n) is a binary full tree of m leaf nodes, whose sum depth is n. For example, the tree 900 (
It can then be verified in a relatively straightforward manner that that the following statements are true:
As used herein the term “optimal tree” refers to a tree T*(m, n) that has a minimum sum weight among all trees in the corresponding subset Ω(m, n).
For example, as indicated in
The information rate of the tree T*(4, 8) of
As used herein, the term “optimal codebook” refers to a codebook that is represented by an optimal tree of the corresponding subset Ω(m, n). From the above-provided description, a person of ordinary skill in the art will understand that an optimal codebook enables the corresponding communication system to achieve a given information rate β with a minimum average symbol-transmit energy.
In one example embodiment, an optimal tree T*(m, n) (and hence the corresponding optimal codebook) can be found for each pair of m and n using an exhaustive search. Such an exhaustive search can be conducted in a recursive manner starting from the pair (m, n)=(1,1) and continuing on by (i) incrementally increasing the value of m; (ii) inspecting the properties of all trees T(m, n) in the corresponding subsets Ω(m, n); and (iii) identifying the optimal tree of each subset Ω(m, n) based on the results of the inspection. This search method works well for relatively small values of m. However, for relatively large values of m, the search space of the exhaustive search may become too large for the computational power available to the code developer, e.g., because the search space grows substantially exponentially with the increase of m (see, e.g., Eq. (7)). In such situations, it might be advisable for the code developer to use an alternative method of finding an optimal tree T*(m, n) and the corresponding optimal codebook, which alternative method is described in more detail below in reference to Eqs. (8)-(12). A beneficial feature of the latter method is that it can reduce the search space to a manageable volume, thereby enabling the code developer to construct optimal codebooks corresponding to larger values of m than would have been technically feasible with the same computational power using the exhaustive search.
In general, a mathematical problem is said to have an optimal substructure if a solution to the problem can be constructed efficiently from the solutions of its sub-problems. It can be shown, e.g., as indicated below, that the problem of finding optimal trees T*(m, n) and constructing the corresponding optimal codebooks has an optimal substructure.
Suppose that the optimal tree T*(m, n) has a sub-tree T(i, j), where i<m and j<n, on either side of the root. If the sub-tree T(i, j) is not an optimal tree, then there exists a sub-tree T*(i, j) that has a smaller sum weight than that of T(i, j), in which case one can construct a tree T(m, n) that has a smaller sum weight than that of T*(m, n) by replacing the sub-tree T(i, j) by the sub-tree T*(i, j) in T*(m, n). The latter result contradicts the initial assumption of the tree T*(m, n) being an optimal tree. It therefore follows that an optimal tree T*(m, n) is composed of optimal sub-trees T*(i, j). The latter property is a manifestation of the optimal substructure for the aforementioned problem of finding optimal trees T*(m, n) and constructing the corresponding optimal codebooks.
It can be verified in a relatively straightforward manner that the number of symbols in the codebooks of size m (assuming that m is an integer power of 2) is bounded by the following inequality:
The left equality of Eq. (8) holds for unshaped uniform signaling, and the right equality of Eq. (8) corresponds to the case of relatively extreme signal shaping, wherein only the left (or the right) edge from the root is chosen in the process of tree expansion until all m leaves of the tree are obtained, e.g., as shown in
Due to the above-described properties of optimal sub-trees, it is sufficient to construct one optimal tree for each pair of m and n. It follows from Eqs. (8)-(9) that, for a given m, the number of all optimal trees that need to be constructed is the same as the number of distinct integers for that m, which can be calculated using Eq. (10) as follows:
When constructing a tree T(m), the code developer can attach T*(i) as the left child and T*(m−i) as the right child of the root node, for every 1≦i≦m−1. Under this method of construction, the size of the search space Ψm, from which to select the optimal trees T*(m, n) for the given value of m, can be calculated using Eq. (11) as follows:
In some embodiments, further reduction of the search space Ψm can be achieved by exploiting the fact that an unbalanced optimal tree has more leaf nodes on the left edge than on the right edge of the root (see, e.g.,
As already indicated above, the reduction of the search space advantageously enables the code developer to efficiently construct a signal-shaping codebook having a relatively large number m of codewords therein. Having such codebooks available for use in the corresponding communication system typically enables the resulting distribution of transmitted constellation symbols to better approximate the M-B distribution and, as such, achieve a higher shaping gain.
According to an example embodiment disclosed above in reference to
In some embodiments of the above apparatus, the shaping encoder is configured to generate the output sequence of constellation symbols using a PAM constellation (e.g., one or both of 210 and 220,
In some embodiments of any of the above apparatus, the first fixed number and the second fixed number are constants that do not depend on a bit sequence of the input block of bits.
In some embodiments of any of the above apparatus, the variable-length shaping code causes a rate of occurrence of different constellation symbols in the output sequence of constellation symbols to depend on a symbol transmit energy (e.g., as described in reference to
In some embodiments of any of the above apparatus, the variable-length shaping code causes a distribution of the constellation symbols over the symbol transmit energy to approximate a Gaussian distribution.
In some embodiments of any of the above apparatus, the variable-length shaping code is a VIFO code (e.g., 310,
In some embodiments of any of the above apparatus, the shaping encoder comprises a code-selector circuit (e.g., 112/132,
In some embodiments of any of the above apparatus, the code-selector circuit is configured to: check an output-overflow condition (e.g., expressed by one of Eqs. (1)-(4)) for each bit-word to be encoded using the variable-length shaping code; and switch the shaping encoder from using the variable-length shaping code to using the FIFO code if the output-overflow condition is satisfied.
In some embodiments of any of the above apparatus, the output-overflow condition is satisfied if a continued use of the variable-length shaping code is expected to cause the output sequence of constellation symbols to have more constellation symbols than the second fixed number.
In some embodiments of any of the above apparatus, the apparatus further comprises an FEC encoder (e.g., 720,
In some embodiments of any of the above apparatus, the apparatus further comprises a sorter circuit (e.g., 702,
In some embodiments of any of the above apparatus, the FEC encoder is configured to convert the second set into a third set of bits by appending the set of parity bits to the second set; wherein the shaping encoder is further configured to: apply the variable-length shaping code to the first set to generate a set of amplitudes; and generate the output sequence of constellation symbols in a manner that causes each constellation symbol to have (i) a respective amplitude from the set of amplitudes and (ii) a phase defined by a respective subset of bits from the third set of bits.
In some embodiments of any of the above apparatus, each respective subset has a single respective bit (e.g., if a PAM constellation, such as 210 or 220 of
In some embodiments of any of the above apparatus, each respective subset has a respective pair of bits (e.g., if a QAM constellation, such as 230 of
In some embodiments of any of the above apparatus, the apparatus further comprises: a receiver (e.g., 150,
In some embodiments of any of the above apparatus, the transmitter comprises an optical transmitter; and the receiver comprises a coherent optical receiver that is optically coupled to the optical transmitter by way of an optical fiber or fiber-optic cable (e.g., 106,
According to another example embodiment disclosed above in reference to
In some embodiments of the above method, the method further comprises generating a modulated optical signal (e.g., 142,
In some embodiments of any of the above methods, said converting comprises: checking (e.g., 506,
In some embodiments of any of the above methods, the first fixed number and the second fixed number are constants that do not depend on a bit sequence of the input block of bits.
In some embodiments of any of the above methods, the variable-length shaping code causes a rate of occurrence of different constellation symbols in the output sequence of constellation symbols to depend on a symbol transmit energy (e.g., as described in reference to
In some embodiments of any of the above methods, the variable-length shaping code causes a distribution of the constellation symbols over the symbol transmit energy to approximate a Gaussian distribution.
In some embodiments of any of the above methods, the variable-length shaping code is a VIFO code (e.g., 310,
According to yet another example embodiment disclosed above in reference to
While this disclosure includes references to illustrative embodiments, this specification is not intended to be construed in a limiting sense.
Although representative embodiments of transmitter 104 and receiver 108 are described above in reference to the general device architectures shown in
Various modifications of the described embodiments, as well as other embodiments within the scope of the disclosure, which are apparent to persons skilled in the art to which the disclosure pertains are deemed to lie within the principle and scope of the disclosure, e.g., as expressed in the following claims.
As used herein, the terms “assert” and “de-assert” are used when referring to the rendering of a control signal, status bit, or other relevant functional feature or element into its logically true and logically false state, respectively. If the logically true state is a logic level one, then the logically false state is a logic level zero. Alternatively, if the logically true state is logic level zero, then the logically false state is logic level one.
In various alternative embodiments, each logic signal described herein may be generated using positive or negative logic circuitry. For example, in the case of a negative logic signal, the signal is active low, and the logically true state corresponds to a logic level zero. Alternatively, in the case of a positive logic signal, the signal is active high, and the logically true state corresponds to a logic level one.
Unless explicitly stated otherwise, each numerical value and range should be interpreted as being approximate as if the word “about” or “approximately” preceded the value or range.
It will be further understood that various changes in the details, materials, and arrangements of the parts which have been described and illustrated in order to explain the nature of this disclosure may be made by those skilled in the art without departing from the scope of the disclosure, e.g., as expressed in the following claims.
Although the elements in the following method claims, if any, are recited in a particular sequence with corresponding labeling, unless the claim recitations otherwise imply a particular sequence for implementing some or all of those elements, those elements are not necessarily intended to be limited to being implemented in that particular sequence.
Reference herein to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the disclosure. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments necessarily mutually exclusive of other embodiments. The same applies to the term “implementation.”
Also for purposes of this description, the terms “couple,” “coupling,” “coupled,” “connect,” “connecting,” or “connected” refer to any manner known in the art or later developed in which energy is allowed to be transferred between two or more elements, and the interposition of one or more additional elements is contemplated, although not required. Conversely, the terms “directly coupled,” “directly connected,” etc., imply the absence of such additional elements.
The described embodiments are to be considered in all respects as only illustrative and not restrictive. In particular, the scope of the disclosure is indicated by the appended claims rather than by the description and figures herein. All changes that come within the meaning and range of equivalency of the claims are to be embraced within their scope.
The description and drawings merely illustrate the principles of the disclosure. It will thus be appreciated that those of ordinary skill in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the principles of the disclosure and are included within its spirit and scope. Furthermore, all examples recited herein are principally intended expressly to be only for pedagogical purposes to aid the reader in understanding the principles of the disclosure and the concepts contributed by the inventor(s) to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the disclosure, as well as specific examples thereof, are intended to encompass equivalents thereof.
The functions of the various elements shown in the figures, including any functional blocks labeled as “processors” and/or “controllers,” may be provided through the use of dedicated hardware as well as hardware capable of executing software in association with appropriate software. Some circuit elements may be implemented using, without limitation, digital signal processor (DSP) hardware, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a read only memory (ROM) for storing software, a random access memory (RAM), and non-volatile storage. Other hardware, conventional and/or custom, may also be included.
It should be appreciated by those of ordinary skill in the art that any block diagrams herein represent conceptual views of illustrative circuitry embodying the principles of the disclosure. Similarly, it will be appreciated that any flow charts, flow diagrams, state transition diagrams, pseudo code, and the like represent various processes which may be substantially represented in computer readable medium and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.
This application claims priority from U.S. Provisional Patent Application Ser. No. 62/396,644 filed on 19 Sep. 2016, and entitled “PROBABILISTIC SIGNAL SHAPING AND CODES THEREFOR.”
Number | Date | Country | |
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62396644 | Sep 2016 | US |