The present invention is directed to a process for automatic dynamic reloading of data flow processors.
Programmable units presently used (DFPs, FPGAs—Field Programmable Gate Arrays) can be programmed in two different ways:
Configuration data is loaded into programmable units through a hardware interface. This process is slow and usually requires hundreds of milliseconds due to the limited band width accessing the external memory where the configuration data is stored, after which the programmable unit is available for the desired/programmed function as described in the configuration file.
A configuration is obtained by entering a special bit pattern of any desired length into the configurable elements of the unit. Configurable elements can be any type of RAM cells, multiplexers, interconnecting elements or ALUs. A configuration string is stored in such an element, so that the element preserves its configuration determined by the configuration string during the period of operation.
The existing methods and options present a series of problems, such as:
The present invention makes it possible to reconfigure a programmable unit considerably more rapidly. The present invention allows different configurations of a programmable unit to be used in a flexible manner during operation without affecting or stopping the operability of the programmable unit. Unit configuration changes are performed simultaneously, so they are rapidly available without need for additional configuration data to be occasionally transmitted. The method can be used with all types of configurable elements of a configurable unit and with all types of configuration data, regardless of the purpose for which they are provided within the unit.
The present invention makes it possible to overcome the static limitations of conventional units and to improve the utilization of existing configurable elements. By introducing a buffer storage device, a plurality of different functions can be performed on the same data.
In a programmable unit, there is a plurality of ring memories, i.e., memories with a dedicated address control, which, upon reaching the end of the memory, continues at the starting point, thus forming a ring. These ring memories have read-write access to configuration registers, i.e., the circuits that receive the configuration data, of the elements to be configured. Such a ring memory has a certain number of records, which are loaded with configuration data by a PLU as described in German Patent No. 44 16 881 A1. The architecture of the records is selected so that their data format corresponds to the configurable element(s) connected to the ring memory and allows a valid configuration to be set.
Furthermore, there is a read position pointer, which selects one of the ring memory records as the current read record. The read position pointer can be moved to any desired position/record within the ring memory using a controller. Furthermore there is a write position pointer, which selects one of the ring memory records as the current write record. The write position pointer can be moved to any desired position/record within the ring memory using a controller.
At run time, to perform reconfiguration, a configuration string can be transmitted into the element to be configured without the data requiring management by a central logic or transmission. By using a plurality of ring memories, several configurable elements can be configured simultaneously.
Since a ring memory with its complete controller can switch configurable cells between several configuration modes, it is referred to as a switching table.
a shows a step in the data processing sequence.
b shows another step in the data processing sequence.
c shows another step in the data processing sequence.
d shows another step in the data processing sequence.
There is a plurality of ring memories in a programmable unit or connected externally to said unit. The one or more ring memories have one or more controllers controlling the one or more ring memories. These controllers are part of the PLU named in German Patent No. DE 44 16 881 A1. The ring memories contain configuration strings for the configurable elements of one or a plurality of configurable units; the configurable elements can also be expressly used for interconnecting function groups and they can be crossbar circuits or multiplexers for interconnecting bus architectures, which are conventional.
Ring memories and ring memory controllers can be either directly hardware-implemented or first obtained by configuring one or more configurable cells of a configurable unit (e.g., FPGA).
Conventional ring memories can be used as ring memories, in particular ring memories and/or controllers with the following properties:
The switching table controller is implemented using a regular state machine. In addition to simple controllers required by a conventional ring memory, controllers with the following properties are best suited for performing or possibly expanding the control of the switching tables of a programmable unit (in particular also of FPGAs and DPGAs (Dynamically Programmable Gate Arrays, a new subgroup of FPGAs)) according to the present invention:
In particular the following commands or a subset of those commands can be used as command strings for the appropriate control of a switching table requiring command string control. The command strings concerning position pointers can be used on the read position pointer(s) or on the write position pointer(s). Possible command strings include:
The indication of the direction of jump can end either in a forward movement or in a backward movement of the position pointer with the use of a positive or negative number.
The ring memory record architecture has the following format:
The first bit identifies a record as a command or a data string. The controller of the switching table thus decides whether the bit string in the data portion of the record should be treated as a command or as configuration data.
The second bit identifies whether the controller should proceed immediately even without the occurrence of another event, should proceed with the next record, or wait for the next event. If an oversampling process is used and the RUN bit is set, the subsequent records will be processed with the help of this oversampling cycle. This continues until a record without a RUN bit set has been reached or the number or records that can be processed at the oversampling cycle rate within one system cycle has been reached.
If an oversampling process is used, the normal system cycle and the RUN bit set cause commutation to take place. Events occurring during the execution of a command sequence marked with the RUN bit are analyzed and the trigger signal is stored in a flip-flop. The controller then analyzes this flip-flop again when a record without a RUN bit set is reached.
The rest of a record contains, depending on the type (data or command), all the necessary information, so that the controller can fully perform its function.
The size of the ring memory can be implemented according to the application; this is true in particular for programmable units, where the ring memory is obtained by configuring one or more configurable cells.
A ring memory is connected to an element to be configured (or a group of elements to be configured), so that a selected configuration string (in the ring memory) is entered in the configuration register of the element to be configured or group of elements to be configured.
Thus a valid and operational configuration of the element or group to be configured is obtained.
Each ring memory has one controller or a plurality of controllers, which control the positioning of the read position pointer and/or the write position pointer.
Using the feedback channels described in German Patent No. DE 44 16 881 A1, the controller can respond to events of other elements of the unit or to external events that are transmitted into the unit (e.g., interrupt, IO protocols, etc.) and, in response to these internal or external events, moves the read position pointer and/or the write position pointer to another record.
The following events are conceivable, for example:
If a unit has several ring memories, the controller of each ring memory can respond to different events.
After each time the pointer is moved to a new record, the configuration string in this record is transferred to the configurable element(s) connected to the ring memory.
This transfer takes place so that the operation of the unit parts that are not affected by the reconfiguration remains unchanged.
The ring memory(ies) may be located either in a unit or connected to the unit from the outside via an external interface.
Each unit may have a plurality of independent ring memories, which can be concentrated in a region of the unit, but can also be distributed in a reasonable manner on the surface of the unit.
The configuration data is loaded by a PLU, such as described in German Patent No. DE 44 16 881 A1, or by other internal cells of the unit into the memory of the switching table. The configuration data can also be simultaneously transferred by the PLU or other internal cells of the unit to several different switching tables in order to allow the switching tables to load simultaneously.
The configuration data can also be in the main memory of a data processing system and be transferred by known methods, such as DMA or other processor-controlled data transfer, instead of the PLU.
After the PLU has loaded the ring memory of the switching table, the controller of the switching table is set to a start status, which establishes a valid configuration of the complete unit or parts of the unit. The control of the switching table starts now with repositioning of the read position pointer and/or the write position pointer as a response to events taking place.
In order to cause new data to be loaded into the switching table or a number of switching tables, the controller can return a signal to the PLU, as described in German Patent No. DE 44 16 881 A1, or other parts of the unit that are responsible for loading new data into the ring memory of the switching table. Such a feedback can be triggered by the analysis of a special command, a counter status, or from the outside (the State-Back UNIT described in Patent Application PACT02, i.e., DE).
The PLU or other internal cells of the unit analyze this signal, respond to the signal by executing a program possibly in a modified form, and transfer new or different configuration data to the ring memory(ies). Only the data of each ring memory that is involved in a data transfer as determined by the signal analysis, rather than the configuration data of a complete unit, must be transferred.
Buffer: A memory can be connected to individual configurable elements or groups thereof (hereinafter referred to as functional elements). Several known procedures can be used to configure this memory; FIFOs are well-known, in particular. The data generated by the functional elements are stored in the memory until a data packet with the same operation to be performed is processed or until the memory is full. Thereafter the configuration elements are reconfigured through switching tables, i.e., the functions of the elements are changed. FullFlag showing that the memory is full can be used as a trigger signal for the switching tables. In order to freely determine the amount of data, the position of the FullFlag is configurable, i.e., the memory can also be configured through the switching table. The data in the memory is sent to the input of the configuration elements, and a new operation is performed on the data; the data is the operand for the new computation. The data can be processed from the memory only, or additional data can be requested from the outside (outside the unit or other functional elements) for this purpose. As the data is processed, it (the result of the operation) can be forwarded to the next configuration elements or written into the memory again. In order to provide both read and write access to the memory, the memory can have two memory arrays, which are processed alternately, or separate read and write position pointers can exist in the same memory.
One particular configuration option is the connection of a plurality of memories as described above, which allows several results to be stored in separate memories; then, at a given time, several memory regions are sent to the input of a functional element and processed in order to execute a given function.
Architecture of a ring memory record: One possible structure of the records in a switching table ring memory, used in a data processing system as described in OL DE 44 16 881 A1 is described below. The following tables show the command architecture using the individual bits of a command string.
Thus, if a record is a data record, bit number 0 has the value 0, so the bits from position two have the following meanings:
If the record is a command, bit number 0 has the value 1, and the bits from position two have the following meanings:
In the following table, bits 2–6 and 8–n are shown for each of the commands listed. The overall bit length of a data string depends on the unit where the switching table is used. The bit length must be chosen so as to code all data needed for the commands in the bits starting from position 8.
Reconfiguring ALUs: One or more switching tables can be used for controlling an ALU. The present invention can be used, for example, to improve on Patent PACT02, where the switching table is connected to the M/F PLUREG registers or the M/F PLUREG registers are fully replaced by a switching table.
a shows the masking of the trigger signals. The trigger signals and lines from A are connected to the inputs of AND gate 0706. The outputs of AND gate 0706 are OR-linked with 0707 to generate the output signal.
In addition to the configuration of the ring memory by the PLU, the ring memory can also be set as follows: Configurable element 0903 is wired so that it generates, alone or as the last element of a group of elements, records for ring memory 0906. It generates a trigger pulse, which advances the write position pointer in the ring memory. In this mode, multiplexer 0904 switches the data from 0903 through to the ring memory, while with a configuration by the PLU the data are switched through by the PLU. It would, of course, be conceivable that additional permanently implemented functional units might serve as sources of the configuration signals.
a shows how external data 1204, i.e., data of another functional unit or from outside the unit, is computed in the functional element 1202 and then written into write memory 1210.
b shows the next step after
c shows the step following
d shows the next step after
a shows how external data 1204, i.e., from another functional unit or from outside the unit, is computed in functional element 1202 and then written in write memory 1510 via bus 1511.
b shows the next step after
c shows the next step after
Number | Date | Country | Kind |
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196 54 846 | Dec 1996 | DE | national |
This application is a continuation of U.S. patent application Ser. No. 09/613,217, filed Jul. 10, 2000 now U.S. Pat. No. 6,477,643, which is a continuation of U.S. patent application Ser. No. 08/947,002 filed on Oct. 8, 1997 now U.S. Pat. No. 6,088,795, now U.S. Pat. No. 6,088,795, expressly incorporated herein by reference in the entirety.
Number | Name | Date | Kind |
---|---|---|---|
2067477 | Cooper | Jan 1937 | A |
3242998 | Gubbins | Mar 1966 | A |
3681578 | Stevens | Aug 1972 | A |
3757608 | Willner | Sep 1973 | A |
3855577 | Vandierendonck | Dec 1974 | A |
4498134 | Hansen et al. | Feb 1985 | A |
4498172 | Bhavsar | Feb 1985 | A |
4566102 | Hefner | Jan 1986 | A |
4663706 | Allen et al. | May 1987 | A |
4682284 | Schrofer | Jul 1987 | A |
4720780 | Dolecek | Jan 1988 | A |
4852043 | Guest | Jul 1989 | A |
4860201 | Stolfo et al. | Aug 1989 | A |
4891810 | de Corlieu et al. | Jan 1990 | A |
4910665 | Mattheyses et al. | Mar 1990 | A |
5047924 | Fujioka et al. | Sep 1991 | A |
5065308 | Evans | Nov 1991 | A |
5072178 | Matsumoto | Dec 1991 | A |
5144166 | Camarota et al. | Sep 1992 | A |
5193202 | Jackson et al. | Mar 1993 | A |
5203005 | Horst | Apr 1993 | A |
5274593 | Proebsting | Dec 1993 | A |
5294119 | Vincent et al. | Mar 1994 | A |
5349193 | Mott et al. | Sep 1994 | A |
5353432 | Richek et al. | Oct 1994 | A |
5379444 | Mumme | Jan 1995 | A |
5425036 | Liu et al. | Jun 1995 | A |
5428526 | Flood et al. | Jun 1995 | A |
5530873 | Takano | Jun 1996 | A |
5530946 | Bouvier et al. | Jun 1996 | A |
5574930 | Halverson, Jr. et al. | Nov 1996 | A |
5600265 | El Gamal Abbas et al. | Feb 1997 | A |
5611049 | Pitts | Mar 1997 | A |
5617547 | Feeney et al. | Apr 1997 | A |
5625806 | Kromer | Apr 1997 | A |
5634131 | Matter et al. | May 1997 | A |
5649176 | Selvidge et al. | Jul 1997 | A |
5649179 | Steenstra et al. | Jul 1997 | A |
5655069 | Ogawara et al. | Aug 1997 | A |
5657330 | Matsumoto | Aug 1997 | A |
5675743 | Mavity | Oct 1997 | A |
5680583 | Kuijsten | Oct 1997 | A |
5732209 | Vigil et al. | Mar 1998 | A |
5754827 | Barbier et al. | May 1998 | A |
5760602 | Tan | Jun 1998 | A |
5773994 | Jones | Jun 1998 | A |
5784636 | Rupp | Jul 1998 | A |
5794062 | Baxter | Aug 1998 | A |
5802290 | Casselman | Sep 1998 | A |
5828229 | Cliff et al. | Oct 1998 | A |
5848238 | Shimomura et al. | Dec 1998 | A |
5854918 | Baxter | Dec 1998 | A |
5859544 | Norman | Jan 1999 | A |
5865239 | Carr | Feb 1999 | A |
5867723 | Chin et al. | Feb 1999 | A |
5884075 | Hester et al. | Mar 1999 | A |
5887162 | Williams et al. | Mar 1999 | A |
5887165 | Martel et al. | Mar 1999 | A |
5889982 | Rodgers et al. | Mar 1999 | A |
5892370 | Eaton et al. | Apr 1999 | A |
5901279 | Davis, III | May 1999 | A |
5924119 | Sindhu et al. | Jul 1999 | A |
5933642 | Greenbaum et al. | Aug 1999 | A |
5943242 | Vorbach et al. | Aug 1999 | A |
5966534 | Cooke et al. | Oct 1999 | A |
5970254 | Cooke et al. | Oct 1999 | A |
5978260 | Trimberger et al. | Nov 1999 | A |
6011407 | New | Jan 2000 | A |
6020758 | Patel et al. | Feb 2000 | A |
6021490 | Vorbach et al. | Feb 2000 | A |
6023564 | Trimberger | Feb 2000 | A |
6023742 | Ebeling et al. | Feb 2000 | A |
6038650 | Vorbach et al. | Mar 2000 | A |
6038656 | Martin et al. | Mar 2000 | A |
6047115 | Mohan et al. | Apr 2000 | A |
6049222 | Lawman | Apr 2000 | A |
6058469 | Baxter | May 2000 | A |
6081903 | Vorbach et al. | Jun 2000 | A |
6085317 | Smith | Jul 2000 | A |
6086628 | Dave et al. | Jul 2000 | A |
6088795 | Vorbach et al. | Jul 2000 | A |
6092174 | Roussakov | Jul 2000 | A |
6105105 | Trimberger et al. | Aug 2000 | A |
6119181 | Vorbach et al. | Sep 2000 | A |
6125408 | McGee et al. | Sep 2000 | A |
6150837 | Beal et al. | Nov 2000 | A |
6150839 | New et al. | Nov 2000 | A |
6172520 | Lawman et al. | Jan 2001 | B1 |
6173434 | Wirthlin et al. | Jan 2001 | B1 |
6219833 | Solomon et al. | Apr 2001 | B1 |
6230307 | Davis et al. | May 2001 | B1 |
6240502 | Panwar et al. | May 2001 | B1 |
6243808 | Wang | Jun 2001 | B1 |
6260179 | Ohsawa et al. | Jul 2001 | B1 |
6263430 | Trimberger et al. | Jul 2001 | B1 |
6279077 | Nasserbakht et al. | Aug 2001 | B1 |
6288566 | Hanrahan et al. | Sep 2001 | B1 |
6289440 | Casselman | Sep 2001 | B1 |
6298472 | Phillips et al. | Oct 2001 | B1 |
6311200 | Hanrahan et al. | Oct 2001 | B1 |
6321366 | Tseng et al. | Nov 2001 | B1 |
6321373 | Ekanadham et al. | Nov 2001 | B1 |
6338106 | Vorbach et al. | Jan 2002 | B1 |
6341318 | Dakhil | Jan 2002 | B1 |
6347346 | Taylor | Feb 2002 | B1 |
6349346 | Hanrahan et al. | Feb 2002 | B1 |
6370596 | Dakhil | Apr 2002 | B1 |
6378068 | Foster et al. | Apr 2002 | B1 |
6389379 | Lin et al. | May 2002 | B1 |
6389579 | Phillips et al. | May 2002 | B1 |
6392912 | Hanrahan et al. | May 2002 | B1 |
6404224 | Azegami et al. | Jun 2002 | B1 |
6405299 | Vorbach et al. | Jun 2002 | B1 |
6421817 | Mohan et al. | Jul 2002 | B1 |
6425068 | Vorbach et al. | Jul 2002 | B1 |
6457116 | Mirsky et al. | Sep 2002 | B1 |
6477643 | Vorbach et al. | Nov 2002 | B1 |
6480937 | Vorbach et al. | Nov 2002 | B1 |
6480954 | Trimberger et al. | Nov 2002 | B1 |
6496971 | Lesea et al. | Dec 2002 | B1 |
6513077 | Vorbach et al. | Jan 2003 | B1 |
6519674 | Lam et al. | Feb 2003 | B1 |
6526520 | Vorbach et al. | Feb 2003 | B1 |
6538468 | Moore | Mar 2003 | B1 |
6539477 | Seawright | Mar 2003 | B1 |
6542998 | Vorbach et al. | Apr 2003 | B1 |
6571381 | Vorbach et al. | May 2003 | B1 |
6587939 | Takano | Jul 2003 | B1 |
6657457 | Hanrahan et al. | Dec 2003 | B1 |
6687788 | Vorbach et al. | Feb 2004 | B1 |
6697979 | Vorbach et al. | Feb 2004 | B1 |
6704816 | Burke | Mar 2004 | B1 |
6717436 | Kress et al. | Apr 2004 | B1 |
20020038414 | Taylor et al. | Mar 2002 | A1 |
20020143505 | Drusinsky | Oct 2002 | A1 |
20020144229 | Hanrahan | Oct 2002 | A1 |
20020165886 | Lam | Nov 2002 | A1 |
20030014743 | Cooke et al. | Jan 2003 | A1 |
20030046607 | Vorbach | Mar 2003 | A1 |
20030052711 | Taylor et al. | Mar 2003 | A1 |
20030055861 | Lai et al. | Mar 2003 | A1 |
20030056085 | Vorbach | Mar 2003 | A1 |
20030056091 | Greenberg | Mar 2003 | A1 |
20030056202 | Vorbach | Mar 2003 | A1 |
20030093662 | Vorbach et al. | May 2003 | A1 |
20030097513 | Vorbach et al. | May 2003 | A1 |
20030123579 | Safavi et al. | Jul 2003 | A1 |
20030135686 | Vorbach et al. | Jul 2003 | A1 |
20040015899 | May et al. | Jan 2004 | A1 |
20040025005 | Vorbach et al. | Feb 2004 | A1 |
Number | Date | Country |
---|---|---|
42 21 278 | Jan 1994 | DE |
38 55 673 | Nov 1996 | DE |
196 51 075 | Jun 1998 | DE |
196 54 593 | Jul 1998 | DE |
196 54 595 | Jul 1998 | DE |
196 54 846 | Jul 1998 | DE |
197 04 044 | Aug 1998 | DE |
197 04 728 | Aug 1998 | DE |
197 04 742 | Sep 1998 | DE |
198 07 872 | Aug 1999 | DE |
198 61 088 | Feb 2000 | DE |
199 26 538 | Dec 2000 | DE |
100 28 397 | Dec 2001 | DE |
100 36 627 | Feb 2002 | DE |
101 29 237 | Apr 2002 | DE |
102 04 044 | Aug 2003 | DE |
0 463 721 | Jan 1992 | EP |
0 477 809 | Apr 1992 | EP |
0 485 690 | May 1992 | EP |
0 497 029 | Aug 1992 | EP |
0 628 917 | Dec 1994 | EP |
0 686 915 | Dec 1995 | EP |
0 707 269 | Apr 1996 | EP |
0 835 685 | Oct 1996 | EP |
0 926 594 | Jun 1999 | EP |
1 102 674 | Jul 1999 | EP |
1 146 432 | Oct 2001 | EP |
WO9004835 | May 1990 | WO |
WO9311503 | Jun 1993 | WO |
WO9500161 | Jan 1995 | WO |
WO9526001 | Sep 1995 | WO |
WO9826356 | Jun 1998 | WO |
WO9828697 | Jul 1998 | WO |
WO9829952 | Jul 1998 | WO |
WO9831102 | Jul 1998 | WO |
WO9835299 | Aug 1998 | WO |
WO9900731 | Jan 1999 | WO |
WO9900739 | Jan 1999 | WO |
WO9932975 | Jul 1999 | WO |
WO9940522 | Aug 1999 | WO |
WO9944120 | Sep 1999 | WO |
WO9944147 | Sep 1999 | WO |
WO0017771 | Mar 2000 | WO |
WO0038087 | Jun 2000 | WO |
WO0077652 | Dec 2000 | WO |
WO0213000 | Feb 2002 | WO |
WO0221010 | Mar 2002 | WO |
WO0229600 | Apr 2002 | WO |
WO0271248 | Sep 2002 | WO |
WO0271249 | Sep 2002 | WO |
WO02103532 | Dec 2002 | WO |
WO0317095 | Feb 2003 | WO |
WO0323616 | Mar 2003 | WO |
WO0325781 | Mar 2003 | WO |
WO0332975 | Apr 2003 | WO |
WO0336507 | May 2003 | WO |
Number | Date | Country | |
---|---|---|---|
20030093662 A1 | May 2003 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 09613217 | Jul 2000 | US |
Child | 10265846 | US | |
Parent | 08947002 | Oct 1997 | US |
Child | 09613217 | US |