BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of a physical computer where a virtual computer system is operated according to the first embodiment.
FIG. 2 is a block diagram of hardware and software in the physical computer according to the first embodiment.
FIG. 3 is an explanatory diagram showing an example of a code conversion setting table according to the first embodiment.
FIG. 4 is a block diagram showing a configuration of the frequency judgment module according to the first embodiment.
FIG. 5 is an explanatory diagram showing an example of the HW operation frequency table according to the first embodiment.
FIG. 6 is an explanatory diagram showing an example of the conversion code management table according to the first embodiment.
FIG. 7 is an explanatory diagram showing an example of the conversion code LRU list according to the first embodiment.
FIG. 8 is a flowchart of processing when the VMM operates the guest according to the first embodiment.
FIG. 9 is a flowchart showing the emulation processing of the VMM according to the first embodiment.
FIG. 10 is a flowchart showing the conversion code invalidation processing according to the first embodiment.
FIG. 11 is a flowchart showing the frequency judgment processing according to the first embodiment.
FIG. 12 is a flowchart showing the selection processing of the according to the first embodiment.
FIG. 13 is a flowchart showing the application processing of the code conversion system according to the first embodiment.
FIG. 14 is a flowchart showing the code conversion setting update processing according to the first embodiment.
FIG. 15 is an explanatory diagram of a code conversion setting table according to the second embodiment.
FIG. 16 is an explanatory diagram showing an HW operation frequency table according to the second embodiment.
FIG. 17 is a flowchart showing conversion code invalidation processing according to the second embodiment.
FIG. 18 is a flowchart showing the frequency judgment processing according to the second embodiment.
FIG. 19 is a block diagram of hardware and software including guests and the VMM according to the third embodiment.
FIG. 20 is a block diagram showing a configuration of the frequency judgment module according to the third embodiment.
FIG. 21 is an explanatory diagram showing an example of the HW operation frequency table according to the third embodiment.
FIG. 22 is an explanatory diagram showing an example of the HW operation frequency table according to the third embodiment.
FIG. 23 is a block diagram showing a configuration of the switching module according to the third embodiment.
FIG. 24 is an explanatory diagram showing an example of the emulation system table according to the third embodiment.
FIG. 25 is an explanatory diagram showing an example of the conversion code management table according to the third embodiment.
FIG. 26 is a flowchart of processing when the VMM operates the guest according to the third embodiment.
FIG. 27 is a flowchart showing the emulation processing of the VMM according to the third embodiment.
FIG. 28 is a flowchart showing the conversion code invalidation processing according to the third embodiment.
FIG. 29 is a flowchart showing the frequency judgment processing according to the third embodiment.
FIG. 30 is a flowchart showing the selection processing according to the third embodiment.
FIG. 31 is a flowchart showing the conversion code retrieval processing according to the third embodiment.