The subject matter herein generally relates to cooling fans of electronic devices.
Fans are arranged in electronic devices to dissipate heat. Protection circuits for fans are arranged on motherboards of electronic devices.
Implementations of the present technology will now be described, by way of example only, with reference to the attached FIGURE.
The FIGURE is a circuit diagram of an embodiment of a fan with a protection circuit.
It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures and components have not been described in detail so as not to obscure the related relevant feature being described. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features. The description is not to be considered as limiting the scope of the embodiments described herein.
Several definitions that apply throughout this disclosure will now be presented.
The term “coupled” is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections. The connection can be such that the objects are permanently connected or releasably connected. The term “comprising” means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in a so-described combination, group, series and the like.
The present disclosure is described in relation to a fan 2.
The FIGURE illustrates a fan 2 which can comprise a connector 200, a fan operation circuit 300, and a protection circuit 100. The protection circuit 100 can comprise a controller U1, an electronic switch Q1, resistors R1-R6, and capacitors C2, C3.
A sense pin SENSE of the controller U1 is coupled to a power pin VCC of the connector 200 through the resistor R1. An input pin VIN of the controller U1 is coupled to the power pin VCC of the connector 200. A first voltage pin UVLO of the controller U1 is coupled to the input pin VIN of the controller U1 through the resistor R2. A second voltage pin OVLO of the controller U1 is coupled to the first voltage pin UVLO of the controller U1 through the resistor R3. The second voltage pin OVLO of the controller U1 is also coupled to ground through the resistor R4. A ground pin GND of the controller U1 is coupled to ground. A timing pin TIMER of the controller U1 is coupled to ground through the capacitor C2. A control pin PWM of the controller U1 is coupled to ground through the resistor R5. A power good pin PGD of the controller U1 is coupled to an output pin OUT of the controller U1 through the resistor R6. The output pin OUT of the controller U1 is coupled to the fan operation circuit 300, and is coupled to ground through the capacitor C3. A gate pin GATE of the controller U1 is coupled to a control terminal of the electronic switch Q1. A first terminal of the electronic switch Q1 is coupled to the sense pin SENSE of the controller U1. A second terminal of the electronic switch Q1 is coupled to the output pin OUT of the controller U1.
A fan connector 400 is located on a motherboard for connection to the connector 200 of the fan 2. A power pin VCC of the fan connector 400 is coupled to a power supply P12V of the motherboard.
In operation, the connector 200 of the fan 2 is connected to the fan connector 400 of the motherboard. The power supply P12V supplies power to the fan 2 through the fan connector 400.
When a current flowing through the resistor R1, as sensed by the sense pin SENSE and the input pin VIN of the controller U1, is greater than a preset current as determined by the controller U1, the gate pin GATE of the controller U1 outputs a first signal. The electronic switch Q1 receives the first signal and is turned off. The connector 200 is disconnected from the fan operation circuit 300. The fan operation circuit 300 does not receive power from the power supply P12V and the fan 2 is not activated.
When the current flowing through the resistor R1 is less than the preset current determined by the controller U1, the gate pin GATE of the controller U1 outputs a second signal. The electronic switch Q1 receives the second signal and is turned on. The connector 200 is connected to the fan operation circuit 300 through the electronic switch Q1. The fan operation circuit 300 receives power from the power supply P12V and the fan 2 works normally.
In at least one embodiment, the electronic switch Q1 can be an N-channel field effect transistor.
The embodiments shown and described above are only examples. Even though numerous characteristics and advantages of the present technology have been set forth in the foregoing description, together with details of the structure and function of the present disclosure, the disclosure is illustrative only, and changes may be made in the detail, including in matters of shape, size and arrangement of the parts within the principles of the present disclosure up to, and including, the full extent established by the broad general meaning of the terms used in the claims.
Number | Date | Country | Kind |
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2013103025909 | Jul 2013 | CN | national |