Claims
- 1. A semiconductor structure for the protection of integrated circuit devices, comprising:
- (a) a substrate of semiconductor material of a first conductivity type;
- (b) a semiconductor layer of a second conductivity type on the substrate, the semiconductor layer having a surface;
- (c) a first region of the first conductivity type formed in the semiconductor layer to extend into the semiconductor layer from the surface in order to form a PN junction between the first region and the adjacent portions of the semiconductor layer;
- (d) a second region of the second conductivity type formed in the first region to extend into the first region from the surface in order to form a PN junction between the second region and the first region;
- (e) a third region of the first conductivity type extending from the surface through the layer to the substrate, the third region being separated from the first region by a portion of the semiconductor layer which portion extends to the surface;
- (f) an insulating layer formed on the surface of the semiconductor layer to extend over the surface between the second region and the third region and which overlies the portion of the first region which extends to the surface as well as the portion of the semiconductor layer which extends to the surface, and at least portions of the second region and the third region on the surface;
- (g) first conductive means making direct electrical contact to the third region to form one terminal of the semiconductor structure; and
- (h) a second conductive means making direct electrical contact to the second region to form another terminal of the semiconductor structure, the second conductive means extending to and overlapping a portion of the third region and in close proximity to the first conductive means where the first conductive means contacts to the third region.
- 2. The protection circuit of claim 1 wherein said substrate has P type conductivity.
- 3. The protection circuit of claim 2 wherein said layer is an epitaxial layer of N type conductivity, said first region is of P type conductivity and said second region is of N type conductivity.
- 4. The protection circuit of claim 3 wherein said substrate is comprised of silicon.
- 5. The protection circuit of claim 4 wherein said insulating layer is comprised of silicon dioxide.
- 6. The protection circuit of claim 5 wherein said conductive means is comprised of a layer of metal overlying said silicon dioxide layer.
- 7. The protection circuit of claim 6 wherein said third region is a highly doped P type region which extends from the surface of said layer to the underlying P type substrate.
Parent Case Info
This is a continuation of Ser. No. 06/616,794 filed June 4, 1984, which was a continuation of Ser. No. 06/212,534 filed Dec. 3, 1980, both now abandoned.
US Referenced Citations (10)
Foreign Referenced Citations (7)
Number |
Date |
Country |
0014435 |
Aug 1980 |
EPX |
2951421 |
Sep 1980 |
DEX |
2181052 |
Nov 1973 |
FRX |
1094336 |
Dec 1967 |
GBX |
1119297 |
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GBX |
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GBX |
1585790 |
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GBX |
Non-Patent Literature Citations (1)
Entry |
Hamilton & Howard, Basic Integrated Circuit Engineering, (McGraw-Hill, NY, 1975), pp. 4-7, 12-13, 18-29. |
Continuations (2)
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Number |
Date |
Country |
Parent |
616794 |
Jun 1984 |
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Parent |
212534 |
Dec 1980 |
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