Patent Application
20160180203
Communication lines for communication have become nowadays ubiquitous. Some prominent examples are low-voltage differential signaling (LVDS), universal serial bus (USB), peripheral component interconnect (PCI), or high-definition multimedia interface. One of most desired requisites on communication lines is allowing high speed communication, for example communication above 10 MByte/second. Communication lines provide a solution to a variety of interfaces requiring high speed communication. One example of such interfaces is the communication line between a printer and a printhead.
Generally, a communication line interfaces a data generation circuit (e.g., a printer circuit that generates signals for operating a printhead) with an output (e.g., the interface of a printhead). If the communication line is subjected to a short circuit, the integrity of the data generation circuit might become compromised. In some short circuit events, the data generation circuit might become even irreparably damaged.
In order that the present disclosure may be well understood, various examples will now be described wilh reference to the following drawings.
In the following description, numerous details are set forth to provide an understanding of the examples disclosed herein. However, it will be understood that the examples may be practiced without these details. While a limited number of examples have been disclosed, it should be understood that there are numerous modifications and variations therefrom. Similar or equal elements in the Figures may be indicated using the same numeral.
As set forth above, if a communication line is subjected to a short circuit, the integrity of a data generation circuit interfaced by the communication line might be compromised.
In at least some examples herein, as illustrated by
In operation of the system, controllably conductive device 108 (a) allows conductance across communication line 102 during normal operation thereof; and (b) turns off communication line 102 when subjected to a short circuit compromising the an emitter circuit connected to the emitter terminal. By turning off communication line 102 it is referred to controllably conductive device 108 imposing a resistivity high enough to sufficiently restrict current across the line and thereby protect circuits connected to the line. For example, for the FET example, controllably conductive device 108 turns off communication line 102 by increasing the resistance of the channel from source to drain.
Further, in system 100 values of the control resistance can be selected for preventing that the controllably conductive device introduces any undesired impedances into the communication line, in particular for high speed signals travelling across it. For example, controllably conductive device 108 may have an internal capacitance. High speed signals travelling across communication line 102 might capacitively couple to control input 114 and thereby undesirably increase impedance across line 102. Control resistance might be selected to be high enough so that the frequency dependent impedance introduced by controllably conductive device 108 does not impair high speed communication across communication line 102.
In view of the illustrated configuration of transmission circuit 212, digital signal 214 may be a) high when both switches S1 and S2 are on, b) low when switch S1 is off and switch S2 is on, and c) float when both switches S1 and S2 are off. Transmission circuit 212 is shown to further include clamper diodes D1 and D2 for limiting the voltage generated by voltage divider 216 at emitter terminal 104.
It will be understood that there are other circuit configurations for generating a digital signal at emitter terminal 104. In general, a switch configuration as illustrated in
In the illustrated example of
In order to set the voltage to control source-gate conductance across FET 208, reference voltage terminal 118 is connected to FET gate 222 via control resistor 116. In at least some examples herein, FET 208 has an internal capacitance (not shown); the combination of control resistor 116 and the FET internal capacitance forms a low pass filter with a cut-off frequency selected to prevents leakage of a high frequency signal via FET gate 222.
FET 208 may be any suitable FET such as a junction FET (JFET) or a metal-oxide-semiconductive FET (MOSFET). FET 208 may be configured as an n-type FET or as a p-type FET. Values of voltage reference to be applied at voltage reference terminal 118 and of values of control resistor 116 are chosen depending on the specific type of the used FET. In the following discussion, it is considered that FET 208 is an n-type transistor.
In the illustrated example, when a gate-to-source voltage VGS is below a threshold for FET 208 to constitute a source-to-drain conductive channel, there is little or no conduction between FET source 218 and FET drain 220 so that emitter terminal 104 and output terminal 106 are disconnected. This is hereinafter referred to as the blocking mode of FET 208. If VGS is above the threshold, FET there is conduction between FET source 218 and FET drain 220 so that digital signal 214 can be transmitted from transmitter pad 104 to output 106 via communication line 102. This is hereinafter referred to as the conductive mode of FET 208.
It will be understood that the different components of protection system may be chosen depending on, among other factors, the type of FET 208 and the type of signal being transmitted along communication line 102 (e.g., bandwidth and signal levels). In particular, the values of the voltage at reference terminal 118 and resistor 116 may be chosen in view of these particular parameters. In an example for protection of a LVDS line, a FET of type n is disposed across the communication line connected to a reference voltage of between 3.3 and 5 Volts, and a control resistor is used with a resistance of between 1 and 100 kOhms.
In at least some examples herein, the communication line to be protected is a differential communication line including two connection lines. In such examples, a controllably conductive device is connected as disclosed herein to protect one of the connection lines. A second controllably conductive device is connected as disclosed herein to protect the another one of the connection lines. Such examples are disclosed in the following with reference to
Protection system 300 includes protection sub-systems 300a and 300b to individually protect each of communicating lines 302a, 302b. Protection sub-systems 200a, 200b are respectively shown protecting communication lines 302a, 302b via FETs 208a, 208b. FETs 208a, 208b have FET sources 218a, 218b and FET gates 220a, 220b respectively connected across communication lines 302a, 302b. Reference voltage terminals 118a, 118b are respectively connected to FET gates 222a, 222b via control resistors 116a, 116b. Thereby, protection sub-systems 300a and 300b individually protect communicating lines 302a, 302b against short cuts (not shown in
As if will be understood, a protection system may be implemented in different applications involving communication via electrical signals. As set forth above, it might be particularly convenient for applications involving high speed data transmission such as, for example, data transmission higher than 10 Mbyte second. A specific application of protection systems as disclosed herein is to protect a communication line in a printer, since printer operation may require high speed data communication for achieving satisfactory operational time for printing. Moreover, short cut protection as described herein might be in particular desirable for protecting a communication line for transmitting print data to operate a printhead in the printer. Such a communication line may be particularly prone to short cuts since ink might be spilled thereon during printer operation. An example of implementation of protection systems as described herein is set forth in the following with respect to
The example is illustrated for a printhead 402 for ejecting a print fluid over a print media. A print fluid may be a colored ink or a transparent ink fluid, such as a treatment fluid for improving print quality (e.g., a fixer fluid or a coater). The depicted elements of printhead 402 are not to scale and are exaggerated for simplification. Printhead 402 includes nozzle array 408 formed by individual nozzles 418. Nozzles 418 may be of any size, number, or pattern. A fluid ejection chamber (not shown) may be located behind nozzles 418 and contains IEEs associated to nozzles 418. A specific group of nozzles (hereinafter referred to as a primitive 420) may be allocated for being fired simultaneously. Nozzle array 408 may be arranged into any number of multiple subsections with each subsection having a particular number of primitives operated by a particular number of IEEs. In the illustrated example, printhead 202 has 192 nozzles with 192 associated filing IEEs; the 192 nozzles (nozzles 1 to 192) are allocated in 24 primitives (primitives P1 to P24) arranged in two columns of 12 primitives each.
The particular fluid ejection mechanism within the printhead may take on a variety of different forms such as those using piezo-electric or thermal printhead technology. For example, if the fluid ejection mechanism is based on a thermal printhead technology, the pulses forwarded to an IEE of IEE array 406 may be forwarded as a current pulse that is applied to a resistor within the particular IEE. The current pulse causes a fluid droplet (not shown), formed with fluid (i.e., ink or treatment fluid) from a fluid reservoir 416 to be ejected from the nozzle associated with the particular IEE.
A print controller 448 may provide a print mask 404 to a pulser 410. Print mask 404 defines how nozzles in printhead 402 are to be operated in order to complete a specific print job. In the illustrated examples, pulser 410 is located off of printhead 202 and is interfaced with printhead 402 via communication line 102. More specifically, communication line 102 interfaces an emitter terminal 104 as pulser 410 and an output terminal at an ink ejection element (IEE) array 406 of printhead 102. Printer 400 may include further communication lines interlacing pulser 410 and IEE array 106 being protected analogously as illustrated. For example, a communication line might be included for each IEE in the array.
Pulser 410 may process data from print mask 404 to generate pulses that control an IEE array 406 associated to nozzle array 418. IEE array 206 includes IEEs (not shown) operatively coupled to nozzles 418 of printhead 402. In the illustrated example, controller 448 provides firing data to pulser 410 on two lines: i) a rate line 412 for setting the pulse rate; and ii) a gate line 414 for setting which pulses are to be forwarded to a particular IEE. Based on the firing data, pulser 410 can generate print data 411 to operate printhead 402
Since communication line 102 is in the proximity of printhead 408, the risk of short cut caused by ink being spilled thereon might be particularly high. Therefore, a protection system 401 is provided across communication line 102 in printer 400. Protection system 410 is constituted analogously as illustrated above with respect to
At block 502, a reference voltage is maintained on a reference voltage terminal (e.g., terminal 118 illustrated above with respect to
In the foregoing description, numerous details are set forth to provide an understanding of the examples disclosed herein. However, it will be understood that the examples may be practiced without these details. While a limited number of examples have been disclosed, numerous modifications and variations therefrom are contemplated. It is intended that the appended claims cover such modifications and variations. Further, flow charts herein illustrate specific block orders; however, if will be understood that the order of execution may differ from that which is depicted. For example, the order of execution of two or more blocks may be scrambled relative to the order shown. Also, two or more blocks shown in succession may be executed concurrently or with partial concurrence. Further, claims reciting “a” or “an” with respect to a particular element contemplate incorporation of one or more such elements, neither requiring nor excluding two or more such elements. Further, at least the terms “include” and “comprise” are used as open-ended transitions.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/EP2013/066911 | 8/13/2013 | WO | 00 |
