Protocol for coordinating the distribution of shared memory

Information

  • Patent Grant
  • 7240169
  • Patent Number
    7,240,169
  • Date Filed
    Friday, January 18, 2002
    22 years ago
  • Date Issued
    Tuesday, July 3, 2007
    17 years ago
Abstract
Methods, systems, and articles of manufacture consistent with the present invention coordinate distribution of shared memory to threads of control executing in a program by using a cooperative synchronization protocol. The protocol serializes access to memory by competing threads requesting assignment of memory space, while allowing competing threads that have already been assigned memory space, to share access to the memory. A designated area of memory assigns the memory to requesting threads. The protocol is an application level entity and therefore does access the operating system to serialize the memory allocation process.
Description
FIELD OF THE INVENTION

This invention relates generally to multi-threaded applications, and more particularly to methods for coordinating the distribution of shared memory to threads of control executing in a data processing system.


BACKGROUND OF THE INVENTION

Multi-threading is the partitioning of a computer program that performs a particular process into logically independent “threads” of control that can execute in parallel. Each thread includes a sequence of instructions and data used by the instructions to carry out a particular program task, such as a computation or input/output function.


Although a single processor can execute instructions of only one thread at a time, the processor can execute multiple threads in parallel by, for example, executing instructions corresponding to one thread until reaching a selected instruction, suspending execution of that thread, and executing instructions corresponding to another thread, until all threads have completed. In this scheme, as long as the processor has begun executing instructions for more than one thread during a given time interval all executing threads are said to be “running” during that time interval, and multi-processing is achieved.


A process includes multiple threads operating out of a common address space. Processes may be configured such that portions of their address space are shared, that is, are mapped to a common physical location, or a memory. Multiple threads within a process share portions of that memory address space. It is possible for more than one thread to believe it has sole access to a portion of memory and for it to perform a series of reads and writes to an area of memory while another thread is performing reads and writes to the same area of memory. Such concurrent operation by competing threads may confuse operation of a process. Therefore, in a shared memory environment the shared memory must be allocated to each thread based on a coordination technique ensuring that only one thread has access to an area of shared memory at a time.


Current memory allocation techniques assign address space to threads in one of two ways: distribution or mutual exclusion. Distribution techniques partition shared memory into equal-sized blocks and assign the memory blocks to threads as requested. Each memory block must be large enough to meet the memory requirements of the thread requiring the most memory. Total memory requirements are dictated by the maximum demand for access to shared memory of a given thread multiplied by the total number of threads involved. This method is particularly wasteful when individual threads do not require similar amounts of shared memory. Even slight differences in the threads' memory requirements can have a significant impact on the total memory requirement.


Mutual exclusion techniques, which may be implemented in hardware or software, coordinate use of shared memory among threads by reading and writing shared variables and pointers referring to the shared addresses. Implementation of these techniques requires accessing the operating system, which is both slow and expensive.


In a mutual exclusion implementation the operating system only permits one thread at a time to access shared memory. Shared memory is assigned to a thread by exchanging signals between threads, such that a thread can be forced to stop at a specified point during execution until it has received a specific signal. More specifically, the operating system may allow a thread to access shared memory by locking the shared memory, allocating the memory for exclusive use of the thread, and unlocking the memory once the thread has completed the memory operation.


While the memory area is locked other threads are prevented from accessing it until the lock has been removed. This method is an acceptable way of allocating memory for one-time or infrequent operations, for example, the one-time startup required by a process. However, computing generally requires execution of operations that occur hundreds or even thousands of times per second, for example, when many threads are modifying a common memory area by performing a “write” operation. For such operations this method of locking and unlocking shared memory creates bottlenecks in system performance. As the number of threads making demands on system performance increases, the likelihood of a system bottleneck increases. This of course negatively impacts system performance.


SUMMARY OF THE INVENTION

Methods, systems, and articles of manufacture consistent with the present invention allocate blocks of a shared memory to threads during execution in a data processing system. Methods, systems, and articles of manufacture consistent with the present invention, as embodied and broadly described herein, involve operations that include receiving a memory allocation request, determining whether access to the shared memory is permitted for purposes of the allocation request, identifying a next available memory block in response to the memory allocation request, and designating the next available memory block in response to the request.





BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate an implementation of the invention and, together with the description, serve to explain the advantages and principles of the invention. In the drawings,



FIG. 1 depicts a block diagram of a data processing system suitable for practicing methods and systems consistent with the present the invention;



FIG. 2 depicts a logical view of multiple threads accessing a shared memory;



FIG. 3 depicts a block diagram used to explain the operation of a shared memory system operating in accordance with a shared memory protocol consistent with the present invention;



FIG. 4 depicts a physical representation of threads being allocated blocks of a shared memory in a manner consistent with the present invention; and



FIG. 5 depicts a flow chart illustrating operations performed by a shared memory allocation and coordination process consistent with an implementation of the present invention.





DETAILED DESCRIPTION

Reference will now be made in detail to an implementation consistent with the present invention as illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the following description to refer to the same or like parts.


Overview


In accordance with methods and systems consistent with the present invention, a programmer writing a multi-threaded application program specifies in the program a total amount of memory space to be shared by the program threads during execution. The programmer also specifies a “block size,” that is, the size of each partition of the total memory space to be allocated on an as-needed basis to the threads during execution. Blocks of the shared memory space are allocated to the threads serially, meaning that when a thread requires memory (for example, the computational task being performed by the thread exceeds the thread's current memory allocation), the thread determines whether its request can be processed and, if so, the thread is allocated the next available block in the shared memory space. Each thread may have a unique identifier and all thread identifiers may be provided at the beginning of program execution. Memory blocks may be assigned to the threads using the identifiers. Information may also be maintained in a designated area of the shared memory to identify each thread by its identifier as well as the specific block(s) of shared memory assigned to each thread.


A next available block indicator located in a designated area of the shared memory maintains information identifying the location (i.e., beginning address) in the shared memory for the next available block. Since all blocks are the same size, the indicator is simply updated by a fixed value based on the block size at the conclusion of each memory allocation cycle.


The programmer also specifies a shared memory protocol for the threads. This protocol, which may be included as part of the program itself or separate from the program, consists of a set of rules governing the way in which threads cooperate to access the shared memory for purposes of performing the memory allocation function. According to this protocol, when a thread requires memory, it first determines whether another thread is currently accessing the shared memory space for memory allocation purposes. This may be done by providing a “token” in a designated area of the shared memory space. The needy thread determines whether the token is available, meaning that no other thread is accessing the shared memory space to be allocated a memory block. If the token is available, the needy thread “takes” the token (i.e., indicates that the token is not currently available) and proceeds to be allocated the next available block.


If, however, the token is “taken,” meaning that another thread is accessing the shared memory space to be allocated a memory block, the needy thread does not proceed. Rather, the needy thread monitors the token, waiting for it to become available, at which time the thread can be allocated a next available memory block.


Once a thread completes the allocation process, it releases the token, thus making the token available for other memory allocation cycles. At the completion of an allocation cycle the next available block indicator is updated so that the next time a thread seeks to be allocated a memory block the indicator reflects the next available block.


Although access to the shared memory space is exclusive to a single thread for purposes of the allocation process, all of the threads operating in parallel can access their designated block(s), even when the allocation process for a particular thread is ongoing. The only restriction in this scheme relates to memory block allocation, only one thread at a time can be allocated a block. Additionally, all of the threads potentially have access to all of the shared memory space. In other words, no thread has exclusive control over a particular block or set of blocks specified at the beginning of program execution.


Computer Architecture



FIG. 1 depicts an exemplary data processing system 100 suitable for practicing methods and implementing systems consistent with the present invention. Data processing system 100 includes a computer system 105 connected to a network 190, such as a Local Area Network, Wide Area Network, or the Internet.


Computer system 105 contains a main memory 125, a secondary storage device 130, a processor 140, an input device 150, and a video display 160. All of these components operate in a manner commonly understood by those skilled in the art. For example, processor 140 executes an operating system and application programs. Input device 150 receives user input and video display 160 displays output, for example, from an application program being executed by processor 140.


Main memory 125 and secondary storage device 130 may be used to store all of portions of the operating system and applications programs when they are not being executed by processor 140. For purposes of this description, however, main memory 125 is shown in FIG. 1 as including both an operating system 120 and application program 110. Operating system 120 represents any operating system, although an operating system that specifically facilitates multi-threaded program execution may be preferred, for example, the Solaris® operating system from Sun Microsystems, Inc.


Application program 110 is a multi-threaded program that performs a particular process using independent, logical threads of control that execute in parallel on processor 140. Although a single processor is shown, one skilled in the art will appreciate multiple processors may be used to implement methods and practice systems consistent with the present invention.


During execution of application program 110, its threads share access to main memory 125 and secondary storage 130. Specific implementations of memory in a data processing system may use a virtual memory to store some of the data associated with a process, allowing main memory to store data associated with more processes. In that type of system threads also share access to the virtual memory area.


Application program 110 includes a shared memory protocol 115. Shared memory protocol 115 provides a set of guidelines for threads to follow when accessing memory. Shared memory protocol 115 interacts with the threads of an application running in program 110 and with memory 125. One skilled in the art will appreciate that other implementations consistent with the present invention may implement shared memory protocol 115 separate from program 110 in either software or hardware.


Although aspects of this implementation are depicted as being stored in memory 125, one skilled in the art will appreciate that all or part of system and methods consistent with the present invention may be stored on or read form other computer-readable media, such as secondary storage devices, like hard disks, floppy disks, and CD-ROM; a digital signal received from a network such as the Internet; or other forms of ROM or RAM.



FIG. 2 depicts a logical representation of multiple threads sharing access to memory. When multiple threads share access to memory, each of the threads is able to access any portion of the memory. FIG. 2 shows multiple threads 210a210n sharing access to memory 200. Because each of the threads 210a210n may simultaneously access all of memory, it is possible for more than one thread use a portion of memory being used by another thread, confusing an operation. Therefore, threads operating in a shared memory environment compete for use of memory. Methods and systems consistent with the present invention are directed to coordinating the distribution of access to shared memory by competing threads.


Shared-Memory Allocation and Distribution System



FIG. 3 is a logical representation of a shared memory configuration consistent with the present invention. Threads 304, 306, 308, and 310 may correspond to one or more processes that are being executed concurrently by processor 320. Again, although one processor 320 is shown in FIG. 3, methods and systems consistent with the present invention may operate in multi-processor environments as well.


Memory 340 includes a file allocation table (“FAT”) 345. To facilitate parallel execution of multiple threads, memory 340 is logically partitioned into segments of equal size, as designated by a user of a shared memory system operating in accordance with the principles of the shared memory protocol 330. The partition size is used to assign a block of memory, corresponding to address space, to a thread.


When an application program begins execution and spawns its threads, each thread agrees to access memory 340 according to the rules of shared memory protocol 330 Shared memory protocol 330 describes the format of the FAT 345 to each thread. According to protocol 330, each thread agrees to view an indicator indicating whether another thread is accessing memory, to be allocated a block, before securing memory for itself The protocol 330 allows threads that have already secured access to a block of memory to use that block for the duration of the application's execution. Each time a thread needs to secure access to a new block of memory, it must follow the rules of the shared memory protocol 330.


For example, if thread 304 has secured access to memory block 350, it may access that block of memory for the duration of a program's execution. However, while thread 306 secures access to memory block 355, thread 304 may not attempt to secure access to another block of memory 340. While thread 306 secures access to a block of memory 340, thread 304 may only access the block(s) of memory it has already secured. Once the indicator in the FAT 345 indicates that thread 306 has completed its secure operation, thread 304 may attempt to secure an additional block of memory.


The FAT 345 is used to assign a block of memory to a thread. Included in the FAT 345 are tables corresponding to current assignments of blocks of memory to threads using shared memory 340, an indicator reflecting whether a thread is currently attempting to secure access to a block of memory, and a pointer indicating a next available memory block. A thread secures access to a block of memory by receiving an assignment of a block of memory from the FAT. When a thread secures a block of memory, it increments a pointer in the FAT to the next available memory block, shown in FIG. 4.



FIG. 4 is a physical representation of how a shared memory 400 may be allocated to threads and maintained by methods and systems consistent with the present invention. Before a program executes, a user specifies both the size of a shared memory 400 and the size of individual memory blocks 415, 420, 425, and 430. Each memory block corresponds to a set of addresses. Once the size of the shared memory 400 and the size of its blocks 415, 420, 425, and 430 have been assigned, they remain constant throughout a program's execution.


Each thread that accesses memory 400 in accordance with the principles of the present invention is uniquely identifiable. Upon a first thread in a process beginning to execute, the process is assigned a process identification code. When a thread receives assignment of a memory block it is assigned a thread identification code and a memory location code. Each thread of a program may be uniquely identified by a global thread identification code, a combination of a process identification code for the process corresponding to the thread, and a thread identification code. This identification feature enables methods and systems consistent with the present invention to handle any parallel processing application, including multi-threaded applications as well as multi-processor applications running processes containing multiple threads.


Further details on operation of a shared memory system operating in accordance with the principles of the shared memory protocol will now be explained with reference to the flow diagram of FIG. 5. Shared memory protocol begins with user initialization. During initialization, the user's program specifications are set for the size of both the shared memory and of the individual memory blocks to be assigned to threads accessing memory (step 505). The size of the shared memory area and the size of the memory blocks do not affect the operation of a shared memory allocation or distribution process consistent with the present invention. Therefore, the user may specify the sizes by using any number of criteria, for example, the memory requirements of a majority of the threads running.


Before attempting to secure access to a block of memory a thread determines whether another thread is securing access to a block of memory. If a thread determines that a “token” to secure access to memory is available (step 530), the thread secures a block of memory for itself by accessing the FAT (step 535).


Upon securing access to a block of memory, the FAT is used to assign the thread a memory location code representing the memory location of the memory block and a thread identification code, used to identify the thread within a process (step 535). Because threads are automatically assigned a next available memory block, threads of different processes may be assigned consecutive memory blocks. Each thread receives a memory block corresponding to the size of the memory blocks set by the user during initialization 505. If a thread requires more memory than that contained in an individual memory block, the thread will be assigned enough memory blocks to meet its request.


Once all of the location and identification assignments have been made, a memory assignment counter, maintained in the FAT region of the shared memory, is incremented (step 540). Incrementing the counter initiates setting a pointer to a next available memory location. Once a thread has secured access to a block of memory, the thread releases the “token” so that another thread may secure access to a block of memory (step 545).


A thread may place as many memory requests as needed. A shared memory system operating in accordance with the principles of the shared memory protocol ensures that all executing threads needing memory have an opportunity to secure access to memory by repeating the memory assignment process until all threads have completed execution (step 550).


CONCLUSION

Methods and systems consistent with the present invention coordinate distribution of shared memory among threads of control executing in a parallel computing environment. Distributing shared memory resources in a manner consistent with the principles of the present invention does not require accessing the operating system, a costly and time consuming event, to distribute shared memory among threads. Nor does a system consistent with the principles of the present invention require prohibiting competing threads from accessing a shared memory area while another thread accesses the memory.


Systems consistent with the present invention are applicable to all multi-threaded programs written in all computer programming languages, including Fortran 77, Java, C, and C++.


Although the foregoing description has been described with reference to a specific implementation, those skilled in the art will know of various changes in form and detail which may be made without departing from the spirit and scope of the present invention as defined in the appended claims and the full scope of their equivalents.

Claims
  • 1. A system for assigning blocks of memory, the system comprising: an area of a memory designated for coordinating the assignment of the memory to one or more threads requiring access to the memory, wherein the area includes usage information reflecting usage of the memory; anda processor for performing a protocol for serializing access to the memory by the one or more threads based on the usage information, wherein the protocol allows a first thread to access a first designated block of the memory while another thread requests and secures access to another block of the memory.
  • 2. The system of claim 1, wherein the another thread secures access to the another block of memory based on a token obtained from the area of memory that was previously used by the thread to secure access to the designated block of memory.
  • 3. The system of claim 1, wherein the size of the designated block of memory is determined by a user.
  • 4. The system of claim 1, wherein the another designated block of memory is adjacent to the designated block of memory.
  • 5. A method, comprising: allocating to a first process, without accessing an operating system, a first block of a memory that has a size designated by a user; andallocating to a second process, without accessing an operating system, a second block of the memory that has a size designated by the user while the first process is accessing the first block of memory.
  • 6. The method of claim 5, wherein the allocating of the first and second blocks of memory to the first and second processes, respectively, is based on a token obtained from a designated area of the memory.
  • 7. The method of claim 6, wherein the first and second blocks of memory are consecutive blocks of memory.
  • 8. The method of claim 6, wherein allocating the first block of memory comprises: incrementing a value that reflects a location in the memory corresponding to the first block of memory.
  • 9. The method of claim 8, wherein allocating the second block of memory comprises: determining the second block of memory based on the incremented value.
Parent Case Info

This is a continuation of application Ser. No. 09/244,135, filed Feb. 4, 1999, now U.S. Pat. No. 6,341,338 which is incorporated herein by reference.

US Referenced Citations (154)
Number Name Date Kind
4675832 Robinson et al. Jun 1987 A
4685082 Cheung et al. Aug 1987 A
5021947 Campbell et al. Jun 1991 A
5073851 Masterson et al. Dec 1991 A
5075847 Fromme Dec 1991 A
5107417 Yokoyama Apr 1992 A
5119465 Jack et al. Jun 1992 A
5146593 Brandle et al. Sep 1992 A
5168563 Shenoy et al. Dec 1992 A
5179702 Spix et al. Jan 1993 A
5274813 Itoh Dec 1993 A
5274821 Rouquie Dec 1993 A
5297274 Jackson Mar 1994 A
5301312 Christopher, Jr. et al. Apr 1994 A
5325499 Kummer et al. Jun 1994 A
5325533 McInerney et al. Jun 1994 A
5353401 Iizawa et al. Oct 1994 A
5390314 Swanson Feb 1995 A
5438659 Notess et al. Aug 1995 A
5450542 Lehman et al. Sep 1995 A
5481708 Kukol Jan 1996 A
5485619 Lai et al. Jan 1996 A
5497458 Finch et al. Mar 1996 A
5499349 Nikhil et al. Mar 1996 A
5500881 Levin et al. Mar 1996 A
5519866 Lawrence et al. May 1996 A
5526507 Hill Jun 1996 A
5530816 Holt Jun 1996 A
5535364 Resman et al. Jul 1996 A
5535393 Reeve et al. Jul 1996 A
5539907 Srivastava et al. Jul 1996 A
5553235 Chen et al. Sep 1996 A
5574922 James Nov 1996 A
5613063 Eustace et al. Mar 1997 A
5636374 Rodgers et al. Jun 1997 A
5640550 Coker Jun 1997 A
5650948 Gafter Jul 1997 A
5673387 Chen et al. Sep 1997 A
5675790 Walls Oct 1997 A
5675802 Allen et al. Oct 1997 A
5689712 Heisch Nov 1997 A
5696937 White et al. Dec 1997 A
5710727 Mitchell et al. Jan 1998 A
5734822 Houha et al. Mar 1998 A
5737605 Cunningham et al. Apr 1998 A
5740431 Rail Apr 1998 A
5740433 Carini Apr 1998 A
5742793 Sturges et al. Apr 1998 A
5745897 Perkins et al. Apr 1998 A
5748892 Richardson May 1998 A
5748961 Hanna et al. May 1998 A
5754820 Yamagami May 1998 A
5761426 Ishizaki et al. Jun 1998 A
5774724 Heisch Jun 1998 A
5784698 Brady et al. Jul 1998 A
5787285 Lanning Jul 1998 A
5787480 Scales et al. Jul 1998 A
5805795 Whitten Sep 1998 A
5812799 Zuravleff et al. Sep 1998 A
5835705 Larsen et al. Nov 1998 A
5850554 Carver Dec 1998 A
5860024 Kyle et al. Jan 1999 A
5864867 Krusche et al. Jan 1999 A
5867649 Larson Feb 1999 A
5867735 Zuravleff et al. Feb 1999 A
5872977 Thompson Feb 1999 A
5890171 Blumer et al. Mar 1999 A
5905488 Demers et al. May 1999 A
5905856 Ottensooser May 1999 A
5913223 Sheppard et al. Jun 1999 A
5920895 Perazzoli, Jr. et al. Jul 1999 A
5940616 Wang Aug 1999 A
5943499 Gillies et al. Aug 1999 A
5963975 Boyle et al. Oct 1999 A
5968114 Wentka et al. Oct 1999 A
5970510 Sher et al. Oct 1999 A
5974510 Cheng et al. Oct 1999 A
5974536 Richardson Oct 1999 A
5978892 Noel et al. Nov 1999 A
5987479 Oliver Nov 1999 A
5991708 Levine et al. Nov 1999 A
5991893 Snider Nov 1999 A
6006031 Andrews et al. Dec 1999 A
6009514 Henzinger et al. Dec 1999 A
6014517 Shagam et al. Jan 2000 A
6016474 Kim et al. Jan 2000 A
6018793 Rao Jan 2000 A
6023583 Honda Feb 2000 A
6044438 Olnowich Mar 2000 A
6049798 Bishop et al. Apr 2000 A
6049855 Jeddeloh Apr 2000 A
6052708 Flynn et al. Apr 2000 A
6052763 Maruyama Apr 2000 A
6055368 Kunioka Apr 2000 A
6065019 Ault et al. May 2000 A
6066181 DeMaster May 2000 A
6072951 Donovan et al. Jun 2000 A
6077312 Bates et al. Jun 2000 A
6081868 Brooks Jun 2000 A
6085029 Kolawa et al. Jul 2000 A
6088771 Steely, Jr. et al. Jul 2000 A
6098169 Ranganathan Aug 2000 A
6101325 Flaat Aug 2000 A
6101525 Hecker Aug 2000 A
6108343 Cruickshank et al. Aug 2000 A
6119198 Fromm Sep 2000 A
6125430 Noel et al. Sep 2000 A
6141692 Loewenstein et al. Oct 2000 A
6145054 Mehrotra et al. Nov 2000 A
6167565 Kanamori Dec 2000 A
6173327 De Borst et al. Jan 2001 B1
6173368 Krueger et al. Jan 2001 B1
6205537 Albonesi Mar 2001 B1
6253252 Schofield Jun 2001 B1
6263485 Schofield Jul 2001 B1
6263489 Olsen et al. Jul 2001 B1
6269457 Lane Jul 2001 B1
6282702 Ungar Aug 2001 B1
6286130 Poulsen et al. Sep 2001 B1
6295600 Parady Sep 2001 B1
6304951 Mealey et al. Oct 2001 B1
6311320 Jibbe Oct 2001 B1
6314429 Simser Nov 2001 B1
6317871 Andrews et al. Nov 2001 B1
6341338 Dennie Jan 2002 B1
6345384 Sato Feb 2002 B1
6351845 Hinker et al. Feb 2002 B1
6353829 Koblenz et al. Mar 2002 B1
6353869 Ofer et al. Mar 2002 B1
6366994 Kalyur Apr 2002 B1
6367071 Cao et al. Apr 2002 B1
6369725 Busaba Apr 2002 B1
6430657 Mittal et al. Aug 2002 B1
6434714 Lewis et al. Aug 2002 B1
6434741 Mirani et al. Aug 2002 B1
6438745 Kanamaru et al. Aug 2002 B1
6442162 O'Neill et al. Aug 2002 B1
6473833 Arimilli et al. Oct 2002 B1
6480818 Alverson et al. Nov 2002 B1
6496902 Faanes et al. Dec 2002 B1
6502136 Higuchi et al. Dec 2002 B1
6523090 Tremblay Feb 2003 B2
6542919 Wendorf et al. Apr 2003 B1
6574725 Kranich et al. Jun 2003 B1
6629214 Arimilli et al. Sep 2003 B1
6647546 Hinker et al. Nov 2003 B1
6684296 Hayter et al. Jan 2004 B2
6802057 Hinker et al. Oct 2004 B1
20010003831 Boland Jun 2001 A1
20010051974 Saad Dec 2001 A1
20020046201 Hembry Apr 2002 A1
20020073360 Lewis et al. Jun 2002 A1
20020078010 Ehrman et al. Jun 2002 A1
20030061395 Kingsbury et al. Mar 2003 A1
Foreign Referenced Citations (14)
Number Date Country
199 34 515 Jan 2000 DE
0 144 779 Jun 1985 EP
0 390 339 Mar 1990 EP
0 817 044 Jan 1998 EP
0 965 921 Dec 1999 EP
1 026 592 Feb 2000 EP
1 024 432 Aug 2000 EP
1 081 585 Mar 2001 EP
2 793 908 Nov 2000 FR
2 324 942 Nov 1998 GB
2 343 029 Apr 2000 GB
2 357 873 Apr 2001 GB
03-282731 Dec 1991 JP
07-056716 Mar 1995 JP
Related Publications (1)
Number Date Country
20020059503 A1 May 2002 US
Continuations (1)
Number Date Country
Parent 09244135 Feb 1999 US
Child 10050774 US