Patent Application
20170055235
I. Field of the Disclosure
The technology of the disclosure relates generally to clock synchronization within wireless multimedia systems.
II. Background
As the use of wireless mobile devices, such as smart phones, has proliferated, the number and types of applications available for the wireless mobile devices have increased. One of the most common types of mobile applications provides for the storage and playback of multimedia content. While earlier generations of such applications have focused on music, the use of video files is also being enabled on newer mobile devices as wireless networks provide greater bandwidth and the mobile devices provide greater processing power.
In the earliest aspects of audio- and video-capable mobile devices, a user would typically listen to audio or audio elements within a video file using wired headphones, and later using a wireless headphone set. Many wireless headsets initially were designed to work using the Bluetooth® protocol, and this protocol remains popular among many users. Recently, however, the Wi-Fi Alliance has promulgated the Miracast™ standard, also known as Wi-Fi Display (WFD), to enable wireless screencasting based on underlying 802.11 standards promulgated by the Institute for Electrical and Electronics Engineering (IEEE). Screencasting according to the Miracast standard enables wireless delivery of audio and video to or from desktops, tablets, smart phones, and other devices. For example, a user may echo a display from a phone or tablet onto a television, or share a laptop screen with a conference room projector in real-time, as non-limiting examples.
The ability to provide precision timing and accurate time data, even in poor wireless channel conditions, is becoming increasingly important for next-generation wireless Miracast devices. As non-limiting examples, applications providing timing of real-time events, timed triggers and alarms, multimedia synchronization, ranging, and/or physical proximity and location detection may require precise synchronization of system clocks across multiple wireless devices. However, in the Miracast standard as promulgated by the Wi-Fi Alliance, the role of providing a master clock signal is entrusted to a multimedia source device or to a wirelessly connected multimedia sink device, without regard to the availability of other potentially more accurate time sources. Moreover, conventional multimedia source devices and multimedia sink devices employ application processors that execute a high-level operating system (HLOS) that may be subject to unpredictable concurrency workloads and unplanned schedules and preemption. Consequently, such conventional multimedia source devices and multimedia sink devices may be unable to implement more accurate timing and synchronization protocols such as the Precision Timing Protocol (PTP).
Aspects disclosed in the detailed description include providing Precision Timing Protocol (PTP) timing and clock synchronization for wireless multimedia devices. In this regard, in some aspects, a primary wireless multimedia device (e.g., a multimedia source device or a multimedia sink device, as non-limiting examples, that is responsible for selecting a master clock) is provided. The primary wireless multimedia device comprises a timing synchronization control system. When wirelessly connected to one or more connected wireless multimedia devices, the timing synchronization control system applies a PTP Best-Master-Clock (BMC) algorithm logic to select a master clock. The master clock may be a system clock of the primary wireless multimedia device, one of the one or more connected wireless multimedia devices, or one of one or more external nodes. If the timing synchronization control system selects the system clock of the primary wireless multimedia device, a clock signal of the system clock is provided to the connected wireless multimedia devices as the master clock. If the timing synchronization control system selects one of the connected wireless multimedia devices or one of the external nodes as the master clock, the timing synchronization control system synchronizes the system clock of the primary wireless multimedia device with the master clock.
Some aspects may also provide that the timing synchronization control system determines whether the system clock is synchronized with the master clock within a synchronization tolerance range. If so, an application processing layer may render a multimedia stream. If the system clock is determined not to be synchronized with the master clock, the timing synchronization control system may provide a notification of loss of synchronization to the application processing layer, which may cease the rendering of the multimedia stream.
In this regard, in one aspect, a primary wireless multimedia device is provided. The primary wireless multimedia device comprises a wireless controller communicatively coupled to an antenna. The wireless controller is configured to establish one or more wireless connections with a corresponding one or more connected wireless multimedia devices. The primary wireless multimedia device further comprises a system clock, and a timing synchronization control system that is coupled to the wireless controller and the system clock. The timing synchronization control system is configured to apply a PTP BMC algorithm logic to select dynamically a master clock from among the system clock, the one or more connected wireless multimedia devices, and one or more external nodes. The timing synchronization control system is further configured to, responsive to selecting the system clock as the master clock, provide a clock signal of the system clock as the master clock to the one or more connected wireless multimedia devices. The timing synchronization control system is also configured to, responsive to selecting a connected wireless multimedia device of the one or more connected wireless multimedia devices or an external node of the one or more external nodes as the master clock, synchronize the system clock with the master clock.
In another aspect, a primary wireless multimedia device is provided. The primary wireless multimedia device comprises a means for applying a PTP BMC algorithm logic to select dynamically a master clock from among a system clock of the primary wireless multimedia device, one or more connected wireless multimedia devices, and one or more external nodes. The primary wireless multimedia device further comprises a means for providing a clock signal of the system clock of the primary wireless multimedia device as the master clock to the one or more connected wireless multimedia devices, responsive to selecting the system clock as the master clock. The primary wireless multimedia device also comprises a means for synchronizing the system clock of the primary wireless multimedia device with the master clock, responsive to selecting a connected wireless multimedia device of the one or more connected wireless multimedia devices or an external node of the one or more external nodes as the master clock.
In another aspect, a method for providing timing synchronization control for wireless multimedia devices is provided. The method comprises applying, by a timing synchronization control system of a primary wireless multimedia device, a PTP BMC algorithm logic to select dynamically a master clock from among a system clock of the primary wireless multimedia device, one or more connected wireless multimedia devices, and one or more external nodes. The method further comprises, responsive to selecting the system clock as the master clock, providing a clock signal of the system clock of the primary wireless multimedia device as the master clock to the one or more connected wireless multimedia devices. The method also comprises, responsive to selecting a connected wireless multimedia device of the one or more connected wireless multimedia devices or an external node of the one or more external nodes as the master clock, synchronizing the system clock of the primary wireless multimedia device with the master clock.
With reference now to the drawing figures, several exemplary aspects of the present disclosure are described. The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.
Aspects disclosed in the detailed description include providing Precision Timing Protocol (PTP) timing and clock synchronization for wireless multimedia devices. In this regard, in some aspects, a primary wireless multimedia device (e.g., a multimedia source device or a multimedia sink device, as non-limiting examples, that is responsible for selecting a master clock) is provided. The primary wireless multimedia device comprises a timing synchronization control system. When wirelessly connected to one or more connected wireless multimedia devices, the timing synchronization control system applies a PTP Best-Master-Clock (BMC) algorithm logic to select a master clock. The master clock may be a system clock of the primary wireless multimedia device, one of the one or more connected wireless multimedia devices, or one of one or more external nodes. If the timing synchronization control system selects the system clock of the primary wireless multimedia device, a clock signal of the system clock is provided to the connected wireless multimedia devices as the master clock. If the timing synchronization control system selects one of the connected wireless multimedia devices or one of the external nodes as the master clock, the timing synchronization control system synchronizes the system clock of the primary wireless multimedia device with the master clock.
Some aspects may also provide that the timing synchronization control system determines whether the system clock is synchronized with the master clock within a synchronization tolerance range. If so, an application processing layer may render a multimedia stream. If the system clock is determined not to be synchronized with the master clock, the timing synchronization control system may provide a notification of loss of synchronization to the application processing layer, which may cease the rendering of the multimedia stream.
Before discussing providing PTP timing and clock synchronization for wireless multimedia devices, exemplary devices and point-to-multipoint multimedia systems are described. In this regard,
In
In exemplary operation, the receiver path 102 of the multimedia source device 100 may receive information-bearing radio frequency (RF) signals from one or more remote transmitters provided by a base station (not shown), such as a cellular network base station. A low noise amplifier (not shown) may amplify the signals. A filter (not shown) may minimize broadband interference in the received signals, while down-conversion circuitry (not shown) may down-convert the filtered signals into intermediate or baseband frequency signals, which then may be digitized into one or more digital streams by digitization circuitry (not shown). In some aspects, the receiver path 102 may use one or more mixing frequencies generated by the frequency synthesizer. The BBP 110 processes the digitized received signals to extract the information (e.g., data bits, as a non-limiting example) conveyed in the signals. As such, the BBP 110 may be implemented as one or more digital signal processors (DSPs), as a non-limiting example.
With continued reference to
Referring still to
With further reference to
According to protocols promulgated by the Wi-Fi Alliance, such as Miracast™ (also referred to as Wi-Fi Display or WFD), the multimedia source device 100 may stream audio and/or video to a remote multimedia sink device, such as a speaker and/or large screen display. As used herein, the term “multimedia sink device” refers to a wireless multimedia device for receiving a multimedia stream from a multimedia source device, and rendering the multimedia stream. In this regard, a multimedia sink device 200 is illustrated in
In a conventional wireless multimedia system such as the wireless multimedia system 300, communications among the multimedia source device 302 and the multimedia sink devices 304(0)-304(X) are synchronized using a clock signal provided by a master clock (not shown). In the Miracast standard as promulgated by the Wi-Fi Alliance, the role of providing a master clock signal is entrusted to the multimedia source device 302 or to one of the multimedia sink devices 304(0)-304(X), without regard to the availability of other potentially more accurate time sources. For example, the multimedia source device 302 and/or one or more of the multimedia sink devices 304(0)-304(X) may be connected via a local area network (LAN) (not shown) or a wide area network (WAN) (not shown) to one or more external nodes (not shown) capable of providing a more accurate clock signal. However, due to the unpredictable workload of the HLOS executed by each of the multimedia source device 302 and the multimedia sink devices 304(0)-304(X), implementation of accurate timing and synchronization protocols such as PTP for selecting a master clock may not be practicable.
In this regard,
The primary wireless multimedia device 400 also provides a wireless controller 410 having functionality corresponding to the wireless network interface controller 126 and the antenna 128 of
In the example of
The PTP protocol processor 420 is further communicatively coupled to a PTP BMC algorithm logic 434 implemented by the timing synchronization microcontroller 411, as indicated by bidirectional arrow 436. The PTP BMC algorithm logic 434 employs the PTP BMC algorithm for selecting a best master clock among the primary wireless multimedia device 400 and other connected wireless multimedia devices (not shown) and/or external nodes (not shown). In some aspects, the PTP BMC algorithm logic 434 may base its selection of a master clock on clock attributes such as a user-defined priority of a clock, a class to which the clock is assigned, an accuracy of the clock, and/or a variability of the clock, as non-limiting examples.
The timing synchronization control system 402 is configured to employ the PTP BMC algorithm logic 434 to select a master clock from among the system clock 416, one or more connected wireless multimedia devices (not shown) to which the primary wireless multimedia device 400 is connected, and one or more external nodes (not shown). As noted above, the one or more external nodes may include devices connected to the primary wireless multimedia device 400 and/or to one or more of the connected wireless multimedia devices via a LAN or a WAN, as non-limiting examples. If the PTP BMC algorithm logic 434 of the timing synchronization control system 402 selects the system clock 416 as the master clock, the timing synchronization control system 402 provides the clock signal 426 of the system clock 416 to the one or more connected wireless multimedia devices as the master clock for subsequent multimedia operations. However, if the PTP BMC algorithm logic 434 of the timing synchronization control system 402 selects one of the one or more connected wireless multimedia devices or one of the one or more external nodes as the master clock, the timing synchronization control system 402 synchronizes the system clock 416 to the selected master clock. In aspects in which the primary wireless multimedia device 400 is a multimedia source device, the primary wireless multimedia device 400 may then provide a multimedia stream (not shown) to the connected wireless multimedia devices based on the system clock 416. According to aspects in which the primary wireless multimedia device 400 is a multimedia sink device, the primary wireless multimedia device 400 may render the multimedia stream based on the system clock 416.
In some aspects, the timing synchronization control system 402 may also provide the clock signal 426 to the application processing layer 404 of the primary wireless multimedia device 400 for synchronization of the layer clock 408, as indicated by arrow 438. Note that at this point, the system clock 416 has either been selected as the master clock, or has been synchronized with the master clock. In this manner, the timing synchronization control system 402 may ensure that the system clock 416 and the layer clock 408 used by the application processing layer 404 are synchronized to a single master clock.
In aspects of the primary wireless multimedia device 400 in which the system clock 416 is synchronized to the master clock, maintaining synchronization with the master clock may be important to proper rendition of the multimedia stream by a multimedia sink device. Accordingly, in such aspects, the timing synchronization control system 402 may be further configured to determine periodically whether the system clock 416 is synchronized with the master clock within a specified synchronization threshold range (e.g., a range of tolerable variance between the system clock 416 and the master clock, as a non-limiting example). If the timing synchronization control system 402 determines that the system clock 416 has maintained synchronization with the master clock within the synchronization threshold range, the application processing layer 404 renders the multimedia stream based on the system clock 416. However, if the timing synchronization control system 402 determines that the system clock 416 is no longer synchronized with the master clock within the synchronization threshold range, the timing synchronization control system 402 may provide a notification 440 of loss of synchronization to the application processing layer 404. The notification 440 of loss of synchronization indicates to the application processing layer 404 that the system clock 416 is no longer synchronized properly with the master clock. In some aspects, the application processing layer 404 may then cease the rendering of the multimedia stream in response to receiving the notification 440 of loss of synchronization.
To illustrate selection of a master clock by the timing synchronization control system 402 of
According to some aspects, the primary wireless multimedia device 400 may select an external node, such as the external node 512(0), as a master clock 524 in the manner described above. In such aspects, the primary wireless multimedia device 400 would then synchronize the system clock 416 of
After the master clock 524, 526 is selected and synchronization has taken place, a multimedia stream 528 may be streamed over the wireless network 510. In aspects in which the primary wireless multimedia device 400 is a multimedia source device, the primary wireless multimedia device 400 may stream the multimedia stream 528 to the connected wireless multimedia devices 508(0)-508(X). In aspects in which the primary wireless multimedia device 400 is a multimedia sink device, the primary wireless multimedia device 400 may receive and render the multimedia stream 528.
In some aspects in which the primary wireless multimedia device 400 is a multimedia source device, the primary wireless multimedia device 400 may then provide the multimedia stream 528 to each connected wireless multimedia device 508(0)-508(X) of the one or more connected wireless multimedia devices 508(0)-508(X) based on the system clock 416 (block 606). Some aspects may provide that the timing synchronization control system 402 may provide the clock signal 426 of the system clock 416 to the application processing layer 404 of the primary wireless multimedia device 400 for synchronization of the layer clock 408 (block 608). The timing synchronization control system 402 may thus be referred to herein as “a means for providing the clock signal of the system clock to an application processing layer of the primary wireless multimedia device for synchronization of a layer clock.” It is to be understood that the operations of blocks 606 and 608 may occur in an order other than that illustrated in
Referring now to
Providing PTP timing and clock synchronization for wireless multimedia devices according to aspects disclosed herein may be provided in or integrated into any processor-based device. Examples, without limitation, include a set top box, an entertainment unit, a navigation device, a communications device, a fixed location data unit, a mobile location data unit, a mobile phone, a cellular phone, a smart phone, a tablet, a phablet, a computer, a portable computer, a desktop computer, a personal digital assistant (PDA), a monitor, a computer monitor, a television, a tuner, a radio, a satellite radio, a music player, a digital music player, a portable music player, a digital video player, a video player, a digital video disc (DVD) player, a portable digital video player, and an automobile.
Those of skill in the art will further appreciate that the various illustrative logical blocks, modules, circuits, and algorithms described in connection with the aspects disclosed herein may be implemented as electronic hardware, instructions stored in memory or in another computer readable medium and executed by a processor or other processing device, or combinations of both. The master devices and slave devices described herein may be employed in any circuit, hardware component, integrated circuit (IC), or IC chip, as examples. Memory disclosed herein may be any type and size of memory and may be configured to store any type of information desired. To clearly illustrate this interchangeability, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. How such functionality is implemented depends upon the particular application, design choices, and/or design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
The various illustrative logical blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented or performed with a processor, a DSP, an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration).
The aspects disclosed herein may be embodied in hardware and in instructions that are stored in hardware, and may reside, for example, in Random Access Memory (RAM), flash memory, Read Only Memory (ROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), registers, a hard disk, a removable disk, a CD-ROM, or any other form of computer readable medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a remote station. In the alternative, the processor and the storage medium may reside as discrete components in a remote station, base station, or server.
It is also noted that the operational steps described in any of the exemplary aspects herein are described to provide examples and discussion. The operations described may be performed in numerous different sequences other than the illustrated sequences. Furthermore, operations described in a single operational step may actually be performed in a number of different steps. Additionally, one or more operational steps discussed in the exemplary aspects may be combined. It is to be understood that the operational steps illustrated in the flowchart diagrams may be subject to numerous different modifications as will be readily apparent to one of skill in the art. Those of skill in the art will also understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.
The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples and designs described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
