The present utility model relates to a UHP (ultrahigh-pressure) lamp or HID (high, intensive discharge) lamp, an electronic ballast used by the UHP or HID lamp and a pulse generator used for the electronic ballast.
a is a functional block diagram of an electronic ballast of a UHP or HID lamp in the prior art, and
A main circuit topology of the circuit consists of a M-bridge converter (including MOSFET, namely Metallic Oxide Semiconductor Field Effect Transistors Q3, Q4, Q5 and Q6) and a LC serial resonant circuit (including an inductor L1 and high-pressure serial capacitors C6, C7 and C8). During operation, two ends (4) and (5) of the bridge circuit are inputted with a DC busbar voltage, and Q3 (Q6) and Q5 (Q4) are switched on alternately to convert the DC busbar voltage into an alternate square wave. A high voltage generated by serial resonant is applied to two ends (9) and (10) of a lamp tube T1 to ignite the lamp. A cloak signal of a full-bridge driving circuit is supplied by a voltage controlled oscillator (VCO) based on IC chip TS555. As shown in
The circuit of an existing 555 pulse generator is as shown by the dashed-line block diagram in
A comparator U3 and resistors R14, R15 and R13 form a resonant voltage detecting circuit R14 and R15 supply a voltage reference, a resonant voltage can be set by adjusting the voltage reference. A sampling signal of the resonant voltage on the two ends (9) and (10) of the high voltage capacitors (C6, C7 and C8) is obtained via a resonant voltage sampling circuit, and this sampling signal is delivered to the negative input terminal (8) of comparators U3 and U2 (the negative input terminals of U2 and U3 are connected together directly). C5 filters the sampling signal.
Built-in DAC of the microcontroller U4 gradually decreases from +5V, the frequency of a pulse clock at point (3) also decreases gradually (called as a scanning frequency procedure). At this time, if the tube T1 is not broken down (corresponding to no-load), the resonant voltage on the two ends (9) and (10) of the tube T1 gradually increases with the decrease of the clock frequency. When the resonant voltage increases to a set value, an output terminal (1) of the comparator U3 outputs a low level. After the microcontroller U4 detects a low level transition signal, the output level of DAC is kept constant, and the frequency of the pulse clock at the point (3) becomes constant correspondingly (the scanning frequency procedure ends). At this time, the LC serial resonant circuit oscillates under a constant frequency. Theoretically, in the case of no-load, the resonant voltage generated by the resonant circuit at this time should also be constant.
However, since the output pulse clock frequency of the existing 555 pulse generator is poor in stability, the resonant voltage generated by the resonant circuit is unstable. A waveform of the existing resonant voltage is as shown in
There are also other types or models of IC chips. For example, MC14046 is an integrated phase-looked loop chip, and currently there is a good many of brands of such chip on market, such as MC14046 series (MC14046B and MC14046BDWR2G) by ON Semiconductor and MC14046 series by MOTOROLA, with a similar structure and totally the same function. Now, take MC14046B as an example, whose functional principle block diagram is as shown in
The function of each lead-out terminal of this chip is explained as follows: LD: a phase difference signal output terminal of phase comparator 2 output terminal, which is high level when the loop is looked, low level when the loop is unlocked, and triggered at rising edge. PC2out: an output terminal of the phase comparator 2, which is a tristate phase difference signal and triggered at rising edge. VCOin: an input signal of the voltage controlled oscillator. VCOout: an output of the voltage controlled oscillator. PCBin and PCAin; input signals of two phase comparators, INH: an inhibiting terminal, which inhibits the voltage controlled oscillator from operating at high level and allows the voltage controlled oscillator to operate at low level. C1A and C1B pins: to connect external oscillating capacitors, R1 and R2 pins: to connect external oscillating resistors. VDD: positive power supply; VSS: ground. ZENER pin: to connect cathode of internal independent Zener diode. And SFout: an output of source follower.
The most typical application of MC14046 is phase lock.
A common problem in the above prior arts is that VCO output frequency is not stable, Thus, the resonant voltage is not stable, which, in turn, results in bad stability of ignition of the UHP or HID lamp and susceptibility to extinction of the UHP or HID lamp. Consequently, the lamp's ignition and use effect are severely impacted. Additionally, a too low pulse clock due to VCO frequency drift will cause the full-bridge converter to enter a capacitive operating mode, which reduces the operation reliability of the resonant circuit.
It is an object of the present utility model to provide a pulse generator, which can provide a stable pulse output, used for an electronic ballast of a UHP and HID lamp and an electronic ballast including the pulse generator.
Based on the aforesaid object, the present utility model proposes a pulse generator used for an electronic ballast of a gas discharge lamp, said electronic ballast including a resonant circuit, characterized in that the pulse generator comprises:
According to another aspect of the present utility model, the present utility model proposes an electronic ballast comprising the aforesaid pulse generator.
According to a further aspect of the present utility model, the present utility model proposes an electronic ballast comprising the aforesaid pulse generator and further comprising:
generator, for providing over-voltage protection for fee resonant voltage; and
Normally, a phase-locked loop IC chip (e.g, MC14046B) is used as the phase-locked loop IC, whose internal phase comparator 1 is usually used for generating a digital phase error signal. However, in the present utility model, the internal VCO circuit and phase comparator are used separately. On one hand, the internal VCO is used for providing resonant frequency; on the other hand, the phase comparator 1 is used for changing frequencies during different phases.
When used for an electronic ballast, the pulse generator of the present utility model can first provide a voltage controlled oscillator with stable output frequency to improve the stability of an ignition voltage, and can also provide fast and self-lock over-voltage protective means. In addition to the significant improvement of performance, the pulse generator of the present utility model and the electronic ballast based on the pulse generator are of a simple structure, boast a cheap hardware cost and have strong engineering practical applicability
Therefore, the present utility model provides an electronic ballast with a simple structure, low cost and excellent performance. Compared with the existing electronic ballast solution, the technical solution provided by the present utility model greatly improves the stability of the ignition voltage and accomplishes a fast and self-look over-ignition voltage protection function. The novel features of the present utility model are mainly reflected in the following two aspects: first, the present utility model makes full use of internal hardware resources of the traditional integrated phase-locked loop circuit chip in a novel manner and transits the frequencies of the full-bridge driving dock signal at different phases without increasing any additional external logical gate; second, the present utility model achieve self lock of the high ignition voltage protective state by designing a large hysteresis voltage used for the comparator.
a is a functional block diagram of an electronic ballast in the prior art;
b is a circuit schematic diagram of an electronic ballast in the prior art;
a is a functional block diagram of the traditional phase-locked loop application of MC14046;
b is a waveform view of the traditional phase-looked loop application of MC14046;
a is a principle block diagram of an electronic ballast based on a pulse generator of the present utility model;
b is a relevant logical waveform view of a pulse generator of the present utility model;
The present utility model is a new application developed from phase-looked loop IC chip (e.g, MC14046), whose functional principle block diagram is as shown in
As shown in
Said low-pass filter which comprises R1 and C1 is used for filtering high-frequency noises from the signal.
The microcontroller U4, the positive follower U5, the low-pass filter and the 4046 voltage controlled oscillator (including an integrated phase-locked loop chip U1 and a resistor capacitor network) form a pulse generator.
In
According to
The microcontroller U4 is a single chip microcontroller. An output port (e.g, pin 2 DAC0) of the digital-to-analog converter DAC of the single chip microcontroller outputs a voltage controlled signal which is filtered by a capacitor C9 and then delivered to a positive input terminal (11) of an operation amplifier U5 serving as a positive follower. An output terminal (12) of the operation amplifier U5 is directly connected with a negative input terminal to form a positive follower. A voltage signal at the terminal (12) is delivered to the input terminal VCOin (Pin 9 of the phase-locked loop chip) of the chip U1 (MC10406) after the action of a RC low-pass filter, r1 and C1 constitute said RC low-pass filter, r2 is connected between port R1 (pin 11) of the chip U1 and the ground, R3 is connected between port R2 (pin 12) of the chip U1 and the ground, and r2 and R3 serve as dock resistors. Clock capacitor C2 is connected between ports 6 and 7 of the chip U1. Pin 3 and pin 4 of the chip U1 are directly connected. Capacitor C3 is connected between pin 16 of the chip U1 and the ground serving as a decoupling capacitor. A clock output port (4) of the chip internal integrated Timer 1 of the microcontroller U4 is directly connected to the port PCAin (pin 14 of U1) of the chip U1.
The resonant voltage sampling circuit A and the full-bridge driving circuit B are schematically shown in the form of block diagrams in
The I/O port (e.g. PO.1) of the microcontroller U4 is set high, i.e. INH is a high level, the voltage controlled oscillator function of the VCO unit of the chip U1 is inhibited, and no pulse is output from VCOout (be constantly a low level), At (his time, the Timer 1 is constantly a low level. The result of an exclusive-OR logical operation of signal VCOout (PCBin) and signal Timer 1 (PCAin) is constantly a low level. Therefore, no clock signal is input to the full-bridge driving circuit in
The I/O port (e.g. PO.1) of the microcontroller U4 is set low, i.e. the INH port of U1 is a low level so as to enable the voltage controlled oscillator function of the VCO unit of the chip U1. DAC (e.g. port DAC0) of the microcontroller U4 decreases from +5V, and accordingly the output pulse frequency of the VCO output port VCOout of U1 varies from high to low. The scanning frequency procedure starts, and the whole resonant circuit begins to operate. During phase B, Timer 1 (PCAin) continues to be maintained at a low level fn the case that PCAin of U1 is constantly low, the PC1out pulse signal of point(3) follows the PCBin pulse clock of point (6), at which time the PC1out pulse clock is controlled by the DAC output of the microcontroller U4, During phase B, the VCO unit serves as a traditional voltage controlled oscillator.
The I/O port (e.g. PO.1) of the microcontroller U4 is set high, i.e. the INH port of U1 is a high level, the voltage controlled oscillator function of the VCO unit of the chip U1 is inhibited, no pulse is output from VCOout, and VCOout is constantly a low level. The internal timer 1 (Timer 1) of the microcontroller U4 begins to output pulse clock. During phase C, the VCO unit does not serve as a traditional voltage controlled oscillator, but it carries out a NOT gate logic operation function on the signal INH of input port 5 of the chip U1. Specifically, the VCO unit converts a high level signal of INH into a low level signal of VCOout to control the exclusive-OR logic operation of the phase comparator 1. In other words, in the case that PCBin (i.e. VCOout) is constantly low, the PC1out pulse signal of point (3) follows the PCAin pulse clock of paint (4).
As is clear from the procedure A-B-C, compared with the function of a traditional phase-locked loop, the features of novel application developed from phase-locked loop chip U1 according to the present utility model are following:
{circle around (1)} the digital phase error signal (i.e. the PC1out pulse of point(13)) output from the phase error comparator 1 directly servos as a clock signal required for the operation of the resonant circuit, other than passing through the low-pass filter and then serving as the control voltage of the VCO unit, i.e. being used for phase lock, as shown in
{circle around (2)} the transition of different frequencies of pulse clock from phase B to phase C is achieved based on the action of the exclusive-OR logic operation of the phase error comparator 1 and by controlling the pin 5 INH signal and the pin 14 PCAin signal of the chip U1. Therefore, the present utility model transits output frequency by using internal hardware resources of the phase-looked loop chip U1 without increasing any additional hardware (e.g. an exclusive-OR logic gate) and a dedicated I/O port of the microcontroller U4 (the microcontroller U4 of the present utility model has no other available I/O port). This greatly simplifies the circuit structure and reduces the product, cost.
{circle around (3)} The built-in VCO unit of the chip MC14046 serves as a voltage controlled oscillator function during phase B and carries out a NOT gate; function on the INH signal of pin 5 of the chip during phase C.
Further, the present utility model can solve the problem of insufficient over-voltage protection of the circuit in the prior art. Hereinafter, the over-voltage protective circuit will be explained.
As shown in
Moreover, since the comparator U2 is not designed with any hysteresis voltage, the level at the output terminal (2) of the comparator U2 is susceptible to oscillation (as shown by curve 1 in
As shown in
C4 and R11 are serially connected between the point (7) and the ground, and R11 is used for limiting the current peak value at the moment when D1 is switched on, D1 and R9 connected in series provide a positive feedback branch of the comparator U2 to generate a hysteresis voltage. R7 is connected between the point (2) and the base of Q1. R8 is connected between the +5V power supply and the base of Q1. R6 is connected between the emitter of Q1 and the base of Q2. And R4 is connected between the collector of Q2 and pin 12 of the chip U1.
The operating principle of the over-voltage protective circuit is explained as follows,
When the ignition voltage is too high, the sampling voltage at the point (8) is larger than the voltage reference at the point (7), the output level of the comparator U2 jumps down, the transistors Q1 and Q2 are switched on successively, and the resistor R4 is connected in parallel between two ends of R3 via Q2. As a result, the output pulse frequency of VCO increases rapidly, and the resonant voltage decreases rapidly, thereby achieving over-voltage protection, just as shown in
Under over-voltage protection, relevant waveforms of the comparator U2 are as shown in
In the present utility model, the resistance of resistor R9 is specially designed to ho much smaller than that of R10 and R12. For example, preferably, the resistance of R9 is in a range between 22 and 220Ω, and the resistance of R10 and R12 is in a range between 1KΩ and 10KΩ. Therefore, when the output terminal of the comparator U2 jumps down, the diode D1 is immediately switched on, and the small resistance of resistor R9 pulls down the reference electric potential at me point (7), thereby forming positive feedback. The reference electric potential decreases on a large scale (e.g, 2.7V) due to positive feedback. In this manner, even if the ignition voltage decreases after the action of the high voltage protection circuit, the sampling voltage is still-high than the voltage reference, the jumped down level at the output terminal of the comparator U2 is self locked, thereby achieving self lock of an over-voltage protection state. Therefore, the resonant circuit has the security improved in the case of over voltage. This self-looked technical solution can achieve self lock of an over-voltage protection state simply by adding a diode (D1) and a resister (R9) without the need to design a dedicated self lock circuit. Therefore, the circuit is of a simple structure and has a low cost. Upon detection of the fact that the actual resonant voltage is lower than the protective threshold voltage, the output terminal of U2 is a high level, D1 is switched off to prevent switching Q1 on and thereby triggering the high voltage protection action.
As is clear from
In short, the novel features of the present utility model include: skillfully designing the circuit, making full use of the existing hardware resources, achieves control of frequency transition during different phases and self look function of over-voltage protection action with the least hardware resources (least electronic elements/devices and microcontroller I/O ports). Furthermore, the present utility model almost does not increase the cost of hardware while greatly improving the performance (mainly including the resonant voltage stability and over-voltage protection).
The present utility model can be widely applied to electronic ballasts of UHP, HID, and gas discharge lamps such as UHP and HID.
For the present utility model, the described embodiments are merely illustrative and not restrictive. As the present utility model has been described with reference to the embodiments, it is to be understood by those skilled in the art that modifications or equivalents made within the spirit and scope of the present utility model fall within the protection scope of the present utility model.
In the claims of the present utility model, the word “comprising” and its equivalents do not exclude other components, and the word “a” or “an” does not exclude the existence of a plurality of such components.
Number | Date | Country | Kind |
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200520038163.5 | Dec 2005 | CN | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/IB2006/003795 | 12/29/2006 | WO | 00 | 2/21/2009 |