1. Technical Field
The disclosure generally relates to a pulse modulation circuit and method, especially to a pulse width modulation circuit and method with steady voltage outputs.
2. Description of Related Art
Many electronic apparatuses are not equipped with internal power supply devices in order to save space and costs. Therefore, these electronic apparatuses require external power supplies. Computers are powered by power supplies, which are capable of converting alternating current into direct current. A typical power supply usually includes a pulse skipping mode, which allows the Pulse Width Modulation (PWM) controller to skip some unwanted pulse signals. This pulse skipping mode improves efficiency of the power supply when provides power to a light load. However, the PWM controller cannot rapidly switch to the normal working mode when providing power to a heavy load, which leads to a low voltage output of the power supply.
Therefore there is a need for improvement in the art.
Many aspects of the embodiments can be better understood with references to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
The disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one.
Referring to
The PWM controller 100 includes a boot terminal, BOOT, a first drive terminal, UGATE, a phase terminal, PHASE, a second drive terminal, LGATE and a feedback terminal, FB. The PWM controller 100 detects the working voltage of the load 300 with the feedback terminal FB. The PWM controller 100 outputs a first control signal and a second control signal to the first and second switches Q1, Q2 respectively at the first and second drive terminals UGATE, LGATE, according to the detected working voltage. The first and second switches Q1, Q2 turn on according to the received control signals. The phase terminal PHASE generates the working voltage for the load 300 between the first and second switches Q1, Q2.
The filter circuit 200 includes an inductor L and a capacitor C1. The first and second switches Q1, Q2 are N-channel MOSFETs. The boot terminal BOOT is electrically connected to the phase terminal PHASE by a capacitor C2. The first and second drive terminals UGATE, LGATE are electrically connected to the first and second switches Q1, Q2 grids respectively. A first switch Q1 drain receives an input voltage Vin. A first switch Q1 source and a second switch Q2 drain are electrically connected to an inductor L first terminal. A second switch Q2 source is grounded. An inductor L second terminal is grounded by the capacitor C1. A connection point between the inductor L and the capacitor C1 outputs the working voltage for the load 300. The feedback terminal FB is electrically connected to a load 300 input terminal by a resistor R to detect an input voltage of the load 300.
S201: the feedback terminal FB detects the working voltage of the load 300;
S202: the PWM controller 100 determines the load 300 is a light load or a heavy load; if the load 300 is a heavy load, then go to step S203; and if the load 300 is a light load, then goes to step S204;
S203: the PWM controller 100 works under normal working mode, then goes back to step S201;
S204: the PWM controller 100 works under pulse skipping mode, and detects the voltage output to the load 300 under the pulse skipping mode by the feedback terminal FB;
S205: the PWM controller 100 determines whether the voltage output to the load 300 under the pulse skipping mode is normal; if the voltage is normal, then goes to step S206; and if the voltage is low, then go to step S207;
S206: the PWM controller 100 stays under the pulse skipping mode, then goes back to step S204;
S207: the PWM controller 100 stays under the pulse skipping mode for a number of clock cycles, and goes on detecting the voltage output to the load 300 with the feedback terminal FB;
S208: the PWM controller 100 determines whether the voltage output to the load 300 under the pulse skipping mode is normal during the number of clock cycles; if the voltage is normal, then goes back to step S206; and if the voltage is still low, then goes to step S209;
S209: the PWM controller 100 jumps out from the pulse skipping mode, then goes back to step S203.
In step S204, the PWM controller 100 turns on the first switch Q1 or the second switch Q2 to enter the pulse skipping mode. In step S207, the PWM controller 100 stays under the pulse skipping mode for 32 clock cycles.
Referring to
It is to be understood, however, that even though numerous characteristics and advantages have been set forth in the foregoing description of preferred embodiments, together with details of the structures and functions of the preferred embodiments, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.
It is also to be understood that the above description and the claims drawn to a method may include some indication in reference to certain steps. However, the indication used is only to be viewed for identification purposes and not as a suggestion as to an order for the steps.
Number | Date | Country | Kind |
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201010250892.2 | Aug 2010 | CN | national |