PWM modulator for scalable converters

Abstract

A PWM modulator for generating a PWM control signal for operating transistor switches of a phase of a multi-phase converter including a plurality of ramp generators, each ramp generator receiving a dedicated clock input signal corresponding to a phase of the multi-phase converter and providing a ramp signal starting when the dedicated clock signal is received by the ramp generator, one of the plurality of ramp generators being dedicated to provide the PWM control signal; a plurality of comparators, each comparator associated with a respective ramp generator for terminating the ramp signal when a predefined inequality exists between an error amplifier output of a feedback loop of the multi-phase converter and an output of the associated ramp generator; a plurality of current generator circuits, each current generator circuit associated with a respective ramp generator for providing current to the dedicated ramp generator to control the slope of the ramp signal of the dedicated ramp generator, the dedicated ramp generator controlling its associated comparator to provide the PWM control signal; and a plurality of current generator control circuits for controlling the operation of the plurality of current generator circuits.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of a two-phase multi-phase converter;

FIG. 2 is a diagram of a PWM modulator of a preferred embodiment of the present invention for use with a three phase converter; and

FIG. 3 is a graph of operation signals of the PWM modulator of FIG. 2.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

Rather than implementing one RAMP generator per phase, as in the PWM controller of FIG. 1, the preferred embodiment of the present invention implements several RAMP generators in one PWM modulator 20 shown in FIG. 2. The modulator will have the same number of ramp generators as there are phases in the multi-phase converter. Each ramp generator has a current source I for generating the ramp voltage, e.g., by charging a capacitor. Each implemented RAMP generator corresponds to a dedicated clock signal PHSIN corresponding to a phase of the multi-phase converter. The RAMP starts when the RAMP generator receives the corresponding clock signal pulse, and each RAMP is terminated by the PWM comparator when the RAMP exceeds the voltage loop error amplifier output EAIN.

One of the RAMP generators 12₃ is used to provide PWM. The other ramp generators 12₁ and 12₂ are used to monitor the operations of other converters of the multi-phase converter, and each RAMP generator controls one current source I₁, I₂ for the RAMP generator 12₃ that provides the PWM. In addition, the RAMP generator 12₃ will have more current sources introduced (I₄ and I₅), one current source per clock, if RAMP has not been terminated by the PWM comparator. Accordingly, the PWM modulator 20 of the invention will determine how many converters are ON and change the slope correspondingly, to keep the loop gain unchanged.

FIG. 2 shows the PWM modulator 20 of a preferred embodiment of the present invention for use with a three phase converter. The PWM modulator 20 includes a plurality of RAMP generators 12. Each RAMP generator 12 starts in correspondence with a dedicated clock signal PHSIN, which sets the frequency of the respective PWM RAMP generator 12₁, 12₂, and 12₃. The frequency of the first RAMP generator 12₁ is set by the signal PHSIN received by the PWM modulator 20. The following RAMP generators 12₂ and 12₃ receive delay clock signals from respective circuits 19₁ and 19₂, for example D flip-flops which delay the signal PHSIN by the clock cycle of CLKIN. In an N-phase converter, the circuits 20 each include N RAMP generators 12, circuits 19, and circuits 18. The circuits 18 may also be implemented as D flip-flops.

The circuits 19 receives the clock signal CLKIN and the signal PSHIN and provide an output signal that is used as the signal PSHIN by the following RAMP generator and circuits 18 and 19. The flip-flop circuits 18 accept the inverse of the clock signal CLKIN from an inverter 17 and the signal PHSIN. Additionally, the output signal of the first of the circuits 19₁ is provided as the signal PSHOUT to the following Phase IC (See FIG. 1). As shown in FIG. 2, the output signal of the flip-flops 18₁, 18₂, 18₄, 18₅ controls the current sources for the RAMP generator 12₃ that provides PWM.

The RAMP starts and builds until the RAMP generator 12 receives a corresponding termination signal, the inverse of output signal Q, from the flip-flop 18. The signal RAMPOUT generated by the RAMP generator is compared by the PWM comparator 14₁, 14₂, and 14₃ with the signal EAIN from the voltage loop error amplifier 9 (see FIG. 1). If signal RAMPOUT exceeds the output signal EAIN, the PWM comparator 14 sends a reset signal to the flip-flop 18, which will reset the flip-flop 18 and send the inverse output signal to the respective RAMP generator 12, terminating the ramp.

Only the RAMP generator 12₃ is used for PWM modulation 16. Thus, comparator 14₃ provides a reset to flip-flop 18₃, whose output is the PWM signal for controlling the switches (via further gating/drive circuitry). The other RAMP generators 12₁ and 12₂ are used to monitor the operations of the other converters of the multi-phase converter, and each RAMP controls one equal current source I₁, I₂ for the PWM producing RAMP generator 12₃. In addition, the RAMP generator 12₃ will have more current sources I₄ and I₅ introduced, one current source per clock pulse, if the RAMP has not been terminated by the PWM comparator. With such an arrangement, the PWM modulator will determine how many converters are ON at anytime and change the slope correspondingly to keep the loop gain unchanged.

For example, when ramp generators 12₁ and 12₂ are not reset, i.e., the ramps are building up, the Q outputs of the flip-flops 18₁ and 18₂ are set high and both current sources I₁ and I₂ are on. This increases the charging current to the RAMP generator 12₃, thus maintaining the loop gain. Once the RAMP exceeds EAIN, flip-flop 18₁ and 18₂ are reset, their Q outputs go low and the current sources I₁ and I₂ are turned off.

From the above, it can be determined that phases 1 and 2 are on whenever ramp generators 12₁ and 12₂ are not reset, and thus the number of converter (phases) that are on can be ascertained to maintain the loop gain.

Should the RAMP not be terminated by the PWM comparator, i.e., when the RAMP has not risen to the value of EAIN (for example, due to a large load step which causes a large error voltage EAIN), the additional current sources I₄ and I₅ can be turned on after additional clock periods implemented by the delays of flip-flops 19₃ and 19₄.

FIG. 3 shows a graph of RAMP A that has not been terminated by the PWM comparator when the next clock pulse is received. The ramp slope has doubled due to two current sources I₄ and I₅ charging the RAMP generator. At the same time, RAMP B of a different phase has two current sources charge the RAMP due to one of its internal RAMP generators 12₁ and 12₂ “simulating” RAMP A and therefore another current source is enabled.

Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. It is preferred, therefore, that the present invention not be limited by the specific disclosure herein.

Claims

1. A PWM modulator for generating a PWM control signal for operating transistor switches of a phase of a multi-phase converter comprising: a plurality of ramp generators, each ramp generator receiving a dedicated clock input signal corresponding to a phase of the multi-phase converter and providing a ramp signal starting when the dedicated clock signal is received by the ramp generator, one of the plurality of ramp generators being dedicated to provide said PWM control signal;a plurality of comparators, each comparator associated with a respective ramp generator for terminating the ramp signal when a predefined inequality exists between an error amplifier output of a feedback loop of the multi-phase converter and an output of the associated ramp generator;a plurality of current generator circuits, each current generator circuit associated with a respective ramp generator for providing current to the one of the ramp generators providing the PWM control signal to control the slope of the ramp signal of the dedicated ramp generator, said dedicated ramp generator controlling its associated comparator to provide said PWM control signal; anda plurality of current generator control circuits for controlling the operation of the plurality of current generator circuits.

2. The PWM modulator of claim 2, further comprising an additional current generator circuit for controlling at least one additional current generator for the dedicated ramp generator when the ramp signal has not been terminated by the comparator associated with the dedicated ramp generator.

3. The PWM modulator of claim 1, wherein each of the ramp generators except the dedicated ramp generator corresponds to another phase of the multi-phase converter and monitors the operation of the corresponding phase.

4. The PWM modulator of claim 3, wherein a gain of the feedback loop is kept unchanged by determining the number of phases of the multi-phase converter that are ON and accordingly changing the slope of the ramp signal.

5. The PWM modulator of claim 1, wherein if the output of the ramp generator exceeds the error amplifier output the comparator resets the associated current generating circuit thereby signaling the ramp generator to terminate the ramp.

6. The PWM modulator of claim 5, wherein the plurality of ramp generators other than the dedicated ramp generator are used to monitor operations of other phases of the multi-phase converter and each ramp signal controls one equal current source for the dedicated ramp generator.

7. The PWM modulator of claim 6, wherein when the ramp signal has not been terminated by the comparator during a clock period, the dedicated one of the ramp generators will have more current sources introduced, one current source per clock cycle, allowing the PWM modulator to determine how many phases of the multi-phase converter are ON and to change the slope of the ramp signal to keep the feedback loop gain unchanged.