Claims
- 1. Apparatus for igniting each of a plurality of pyrotechnic devices in an array in a sequence comprising:
- means responsive to an input signal for generating a pyrotechnic device ignition command signal;
- a processor unit (CPU) responsive to said command signal for generating a device digital address code to select a particular device in the array to be ignited, said CPU generating sequentially an address code corresponding to each device for sequentially addressing each device in the array; and
- matrix means responsive to each said address codes for generating an ignition signal corresponding to each address code and sequentially successively applying said generated ignition signal to each said selected particular device in the array.
- 2. The apparatus of claim 1 wherein each said device is ignited in an ignition cycle, said apparatus including processor unit cycling means coupled to the processor unit for cylically operating the processor unit during each ignition cycle and for causing the processor unit to generate said address code in a selected CPU operating cycle of a given ignition cycle.
- 3. The apparatus of claim 2 wherein said processor unit cycling means includes signal validating means for verifying said command signal as valid prior to causing said CPU to generate said address code.
- 4. The apparatus of claim 1 wherein said processor unit cycling means includes means for causing said CPU to cylically operate in response to said command signal.
- 5. The apparatus of claim 1 including CPU program means for causing the CPU to selectively generate the address code representing the device to be ignited in the beginning of an ignition sequence for said array.
- 6. The apparatus of claim 1 wherein said processor unit cycling means includes means for causing the CPU to select a device address representing the next device in the ignition sequence in response to the next received ignition command signal.
- 7. The apparatus of claim 1 wherein said processor unit cycling means includes timing means for periodically enabling said CPU, said CPU including means for disabling itself once enabled, said CPU when enabled including means for initiating said timing means.
- 8. Apparatus for igniting each of a plurality of pyrotechnic devices in an array comprising:
- circuit means for generating a device ignition signal; and
- first switch means having on and off states for selectively applying electrical power to said circuit means;
- said circuit means including a processor unit (CPU) and computer program means responsive to said electrical power applied thereto for causing said devices in said array to be ignited in a given sequence, successive placement of said switch means in said off state interrupting said ignition of said devices, said program means for continuing the ignition sequence from the last ignited device regardless the interruption of the ignition of said devices.
- 9. The apparatus of claim 8 including delay means responsive to said electrical power applied thereto for delaying the application of said electrical power to said circuit means when the first switch means is placed in the on state.
- 10. The apparatus of claim 8 wherein the array has a plurality of device receiving locations, the computer program means including means for commencing said given sequence with the ignition of a first device in a given location of said plurality of device receiving locations in the array, said program means including second switch means having a closed position for interrupting said sequence and for causing said program means to reset the ignition sequence to commence at said given location regardless the location of the last device ignited in previous ignition sequence.
- 11. The apparatus of claim 10 wherein said circuit means includes means responsive to an input signal for generating a command signal, successive input signals having corresponding successive command signals, said computer program means including means for generating a device ignite signal in response to each successive command signal applied thereto for igniting said devices in said sequence.
- 12. The apparatus of claim 11 including means for validating each said command signal as valid prior to generating said device ignite signal.
- 13. The apparatus of claim 11 wherein the processor unit (CPU) generates a device ignition address code corresponding to a selected device in said sequence, said circuit means including means responsive to said address code for generating a power output signal for igniting said selected device and means responsive to said power output signal for causing said computer program means to commence generating a device ignition address code for the next device in the sequence to be ignited.
- 14. The apparatus of claim 13 wherein said second switch means includes means for generating a sequence control signal, and sequence control means including resettable means responsive to the sequence control signal for causing said computer program means to set said program means to start the ignition sequence at said given location.
- 15. The apparatus of claim 14 wherein said sequence control means includes means responsive to said power output signal to cause said sequence control means to reset so as to continue the ignition sequence in sequential order.
- 16. The apparatus of claim 13 wherein the CPU includes means for cyclically enabling the CPU in successive CPU cycles in an ignition cycle for igniting a device, said means responsive to said power output signal for enabling said CPU in a last of said CPU cycles for updating the address of the next to be ignited device to the address code of said next to be ignited device in said sequence.
- 17. The apparatus of claim 16 including means for disabling the CPU at the end of each ignition cycle and for enabling the CPU upon receipt of an ignition command signal.
- 18. The apparatus of claim 10 including delay means responsive to said electrical power applied thereto for delaying the application of said electrical power to said circuit means when the first switch means is placed in the on state.
- 19. Apparatus for igniting each of a plurality of pyrotechnic devices in an array comprising:
- circuit means responsive to applied electrical power for generating a device ignition signal; and
- first switch means having on and off states for selectively applying electrical power to said circuit means;
- said circuit means including:
- a) computer program means including a processor unit (CPU) responsive to said electrical power applied thereto for causing said devices in said array to be ignited in a given sequence having a beginning and an end, each said device being ignited in an ignition cycle, placement of said switch means in said off state interrupting said ignition of said devices in successive ignition cycles, said program means for continuing the ignition sequence with the next ignition cycle in the sequence from the last ignited device in the sequence regardless the interruption of the successive ignition of said devices when the first switch means is in the off state;
- said computer program means including:
- i) second switch means for selectively restarting the ignition sequence at the beginning of the sequence after placing the first switch means in the on state;
- ii) means responsive to an input command signal for causing the CPU to successively generate a device address code for addressing the next to be ignited device in the array in the sequence upon ignition of a device;
- b) delay means for delaying the application of said electrical power to said circuit means; and
- c) means for successively enabling and disabling the CPU in each ignition cycle.
- 20. The apparatus of claim 19 including means for generating a warning signal prior to the generation of a device ignition signal including means for verifying the warning signal has been generated.
Parent Case Info
This is a division of application Ser. No. 145,499 filed Nov. 1, 1993 now U.S. Pat. No. 5,450,686 which is a division of application Ser. No 877,809 filed May 4, 1992 now U.S. Pat. No. 5,284,094 which is a division of application Ser. No. 419,549 filed Oct. 10, 1989 now U.S. Pat. No. 5,157,222.
US Referenced Citations (18)
Foreign Referenced Citations (2)
Number |
Date |
Country |
958473 |
Mar 1950 |
FRX |
2352273 |
Dec 1977 |
FRX |
Divisions (3)
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Number |
Date |
Country |
Parent |
145499 |
Nov 1993 |
|
Parent |
877809 |
May 1992 |
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Parent |
419549 |
Oct 1989 |
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