1. Field of the Invention
This invention relates to apparatus and methods for using queuing latency feedback to improve I/O performance.
2. Background of the Invention
In storage networks such as storage area networks (SANs), one or more servers (referred to herein as “hosts” or “host systems”) may access data in one or more storage systems. Each host system may manage one or more applications, each of which may manage one or more I/O workstreams to a storage system. Managing these I/O workstreams is often critical to complying with service level agreements (SLAs). To comply with an SLA, the host system may send priority hints to the storage system on an I/O by I/O basis. The storage system may use these priority hints to prioritize and de-prioritize I/O requests within the storage system. The host system can measure compliance with an SLA and adjust the priority hints accordingly.
Problems may occur when host systems make decisions without understanding latencies within a storage system. For example, a storage system may service I/O requests on storage devices with different latency characteristics, such as lower performance disk drives with higher latency, higher performance disk drives with lower latency, and solid state drives with even lower latency.
Consider a high priority host application that is not complying with an SLA. In an attempt to comply with the SLA, the host application may raise the priority of the I/O workstream. In cases where the I/O is on lower performance disk drives and the I/O is performing at near optimal levels on the lower performance disk drives, raising the priority of an I/O workstream (which may slow down or place back pressure on other I/O workstreams) may not improve the performance of the I/O workstream, while negatively impacting the performance of other I/O workstreams. In some cases, a host volume may be spread across different types of storage media, each having different performance and latency characteristics. Because a host application may be unaware of underlying storage system latencies, which may have significant effects on I/O performance, the host application may raise and lower I/O priorities in ways that are ineffective and possibly counterproductive.
In view of the foregoing, what are needed are mechanisms to provide host systems more useful information about latencies within a storage system. Ideally such mechanisms will enable host systems (and system administrators) to make more intelligent decisions with regard to complying with SLAs.
The invention has been developed in response to the present state of the art and, in particular, in response to the problems and needs in the art that have not yet been fully solved by currently available apparatus and methods. Accordingly, the invention has been developed to improve I/O performance using queuing latency feedback. The features and advantages of the invention will become more fully apparent from the following description and appended claims, or may be learned by practice of the invention as set forth hereinafter.
Consistent with the foregoing, a method for improving I/O performance using queuing latency feedback is disclosed. The method initially generates, at a host system, I/O for processing on a storage system. The I/O is received at the storage system and queuing latency experienced by the I/O is measured as the I/O is processed by the storage system. The queuing latency is returned to the host system. The host system may use the queuing latency to understand delays and resource contention within the storage system and enable the host system to more effectively take actions that improve I/O performance and compliance with SLAs.
A corresponding system and computer program product are also disclosed and claimed herein.
In order that the advantages of the invention will be readily understood, a more particular description of the invention briefly described above will be rendered by reference to specific embodiments illustrated in the appended drawings. Understanding that these drawings depict only typical embodiments of the invention and are not therefore to be considered limiting of its scope, the invention will be described and explained with additional specificity and detail through use of the accompanying drawings, in which:
It will be readily understood that the components of the present invention, as generally described and illustrated in the Figures herein, could be arranged and designed in a wide variety of different configurations. Thus, the following more detailed description of the embodiments of the invention, as represented in the Figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of certain examples of presently contemplated embodiments in accordance with the invention. The presently described embodiments will be best understood by reference to the drawings, wherein like parts are designated by like numerals throughout.
As will be appreciated by one skilled in the art, the present invention may be embodied as an apparatus, system, method, or computer program product. Furthermore, the present invention may take the form of a hardware embodiment, a software embodiment (including firmware, resident software, micro-code, etc.) configured to operate hardware, or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “module” or “system.” Furthermore, the present invention may take the form of a computer-usable storage medium embodied in any tangible medium of expression having computer-usable program code stored therein.
Any combination of one or more computer-usable or computer-readable storage medium(s) may be utilized to store the computer program product. The computer-usable or computer-readable storage medium may be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable storage medium may include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CDROM), an optical storage device, or a magnetic storage device. In the context of this document, a computer-usable or computer-readable storage medium may be any medium that can contain, store, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.
Computer program code for carrying out operations of the present invention may be written in any combination of one or more programming languages, including an object-oriented programming language such as Java, Smalltalk, C++, or the like, and conventional procedural programming languages, such as the “C” programming language or similar programming languages. Computer program code for implementing the invention may also be written in a low-level programming language such as assembly language.
The present invention may be described below with reference to flowchart illustrations and/or block diagrams of methods, apparatus, systems, and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, may be implemented by computer program instructions or code. These computer program instructions may be provided to a processor of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
The computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means which implement the function/act specified in the flowchart and/or block diagram block or blocks. The computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
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As shown, the network architecture 100 includes one or more computers 102, 106 interconnected by a network 104. The network 104 may include, for example, a local-area-network (LAN) 104, a wide-area-network (WAN) 104, the Internet 104, an intranet 104, or the like. In certain embodiments, the computers 102, 106 may include both client computers 102 and server computers 106 (also referred to herein as “host systems” 106). In general, the client computers 102 initiate communication sessions, whereas the server computers 106 wait for requests from the client computers 102. In certain embodiments, the computers 102 and/or servers 106 may connect to one or more internal or external direct-attached storage systems 112 (e.g., arrays of hard-disk drives, solid-state drives, tape drives, etc.). These computers 102, 106 and direct-attached storage systems 112 may communicate using protocols such as ATA, SATA, SCSI, SAS, Fibre Channel, or the like.
The network architecture 100 may, in certain embodiments, include a storage network 108 behind the servers 106, such as a storage-area-network (SAN) 108 or a LAN 108 (e.g., when using network-attached storage). This network 108 may connect the servers 106 to one or more storage systems 110, such as arrays 110a of hard-disk drives or solid-state drives, tape libraries 110b, individual hard-disk drives 110c or solid-state drives 110c, tape drives 110d, CD-ROM libraries, or the like. To access a storage system 110, a host system 106 may communicate over physical connections from one or more ports on the host 106 to one or more ports on the storage system 110. A connection may be through a switch, fabric, direct connection, or the like. In certain embodiments, the servers 106 and storage systems 110 may communicate using a networking standard such as Fibre Channel (FC). One or more of the storage systems 110 may utilize the apparatus and methods disclosed herein.
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In selected embodiments, the storage controller 200 includes one or more servers 206. The storage controller 200 may also include host adapters 208 and device adapters 210 to connect the storage controller 200 to host devices 106 and storage devices 204, respectively. Multiple servers 206a, 206b may provide redundancy to ensure that data is always available to connected hosts 106. Thus, when one server 206a fails, the other server 206b may pick up the I/O load of the failed server 206a to ensure that I/O is able to continue between the hosts 106 and the storage devices 204. This process may be referred to as a “failover.”
One example of a storage system 110a having an architecture similar to that illustrated in
In selected embodiments, each server 206 may include one or more processors 212 and memory 214. The memory 214 may include volatile memory (e.g., RAM) as well as non-volatile memory (e.g., ROM, EPROM, EEPROM, hard disks, flash memory, etc.). The volatile and non-volatile memory may, in certain embodiments, store software modules that run on the processor(s) 212 and are used to access data in the storage devices 204. The servers 206 may host at least one instance of these software modules. These software modules may manage all read and write requests to logical volumes in the storage devices 204.
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As shown, a host system 106 may include one or more applications 300, each of which may manage one or more I/O workstreams to a storage system 110. Managing these I/O workstreams may be needed to comply with various service level agreements (SLAs) 306. To comply with an SLA 306, the host system 106 may send priority hints to the storage system 110 on an I/O by I/O basis. The storage system 110 may use these priority hints to prioritize and de-prioritize I/O requests within the storage system 110. A host system 106 may measure compliance with an SLA 306 and adjust priority hints accordingly.
In certain embodiments, the priority hints may include different types of information. For example, a priority hint may indicate an importance 302 of an application 300, as well as achievement 304 of the application 300. The importance 302 may be set by an administrator and remain constant (unless changed by the administrator), while the achievement 304 may vary in accordance with an application's compliance with an SLA 306. The achievement 304 may be dynamically raised when the application 300 is complying with an SLA 306 and dynamically lowered when the application 300 is not complying with the SLA 306. By examining the achievement 304 attached to an I/O, a storage system 110 may adjust resource allocation within the storage system 110 to help the I/O workstream comply with an SLA 306. As compliance with an SLA 306 changes, the host system 106 may dynamically adjust the priority hints of the I/O workstream accordingly.
In certain embodiments, an I/O priority manager 308 implemented within one or more of the host system 106 and the storage system 110 may manage the priority hints discussed above and adjust resource allocation inside the storage system 110 accordingly. The I/O priority manager 308 may also provide a queuing latency feedback mechanism to provide the host system 106 with more useful information about latencies within the storage system 110. Ideally, the queuing latency feedback mechanism will enable a host system 106 (and possibly a system administrator) to make more intelligent decisions with regard to how to comply with SLAs 306.
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When the host system 106 generates an I/O request 320 for transmission to the storage system 110, the tagging module 310 may be configured to tag the I/O 320 with a priority so that the storage system 110 can prioritize or de-prioritize the I/O request within the storage system 110. In certain embodiments, this may include tagging the I/O with the importance 302 and/or achievement 304 previously discussed. In general, the priority indicates how the storage system 110 should handle a I/O request relative to other I/O requests in the event of resource contention in the storage system 110.
Upon receiving an I/O request from the host system 106, a queuing latency determination module 326 in the storage system 110 may measure queuing latency associated with the I/O request as the I/O request is processed by the storage system 110. In general, the queuing latency may reflect the delay an I/O request experiences in the storage system 110 as a result of queuing delays or other resource contention in the storage system 110. The queuing latency may be technology and resource dependent, meaning that the queuing latency for a first device (e.g., a lower performance storage drive) may differ from the queuing latency for a second device (e.g., a higher performance storage drive) under the same real-world conditions.
In certain embodiments, measuring the queuing latency may include measuring the queuing latency with respect to an optimal latency of a resource (e.g., storage device 204, device adapter 210, etc.) in the storage system 110. For example, using simple round numbers for illustration, if a storage device 204 can process an I/O request in two microseconds under optimal conditions (where no queuing latency exists), but the storage device requires five microseconds to process the I/O request under real-world conditions, the queuing latency for the I/O request with respect to the storage device 204 would be three microseconds. Similarly, if a device adapter 210 can process an I/O request in one microsecond under optimal conditions (no queuing latency) but requires three microseconds to process the I/O request under real-world conditions, the queuing latency for the I/O request with respect to the device adapter 210 would be two microseconds. This represents one technique for measuring queuing latency and is not intended to be limiting. Other algorithms or techniques (such as techniques using Little's Law) may also be used to measure queuing latency.
In certain embodiments, an aggregation module 328 may aggregate the queuing latencies of devices (e.g., storage devices 204, device adapters 210, host adapters 208, cache or other memory 214, processors 212 etc.) that are used to process an I/O to provide an overall queuing latency. In certain embodiments, the aggregation module 328 only aggregates the queuing latencies of devices that the I/O priority manager 308 manages. For example, the I/O priority manager 308 may only manage storage devices 204 and device adapters 210. Thus, the aggregation module 328 may only aggregate the queuing latencies of storage devices 204 and device adapters 210 which are used to process an I/O request to arrive at an overall queuing latency. If the I/O priority manager 308 is extended to manage additional devices (e.g., processors 212, cache 214, host adapters 208, etc.), the aggregation module 328 may incorporate the queuing latency from these additional devices into the overall queuing latency.
Upon determining the overall queuing latency, the storage system 110 may return the queuing latency to the host system 106. In certain embodiments, the queuing latency may be returned to the host system 106 with an I/O completion status 322 (indicating whether the I/O did or did not complete successfully). Upon receiving the queuing latency, an analysis module 312 within the host system 106 may analyze the queuing latency 314 and SLA 306 compliance 316 to determine how to most efficiently comply with the SLAs 306.
In certain cases, a priority adjustment module 318 may adjust the priority of one or more I/O workstreams when SLAs 306 are not being achieved and the adjustment would be helpful to achieving the SLAs 306. In other cases, a system administrator or data migration software may move data from lower performance storage devices 204 to higher performance storage devices 204, or vice versa, when doing so would be helpful to achieving SLAs 306. In yet other cases, a system administrator or data migration software may move data from one storage configuration (e.g., RAIDS) to another (e.g., RAID6) when doing such would be helpful to achieving SLAs 306. Any combination of such actions may be taken. Because the described feedback mechanism makes queuing latency within the storage system 110 known, host systems 106 and/or system administrators may make more intelligent decisions with regard to how to comply with SLAs 306.
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The techniques for calculating queuing latency described in association with
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However, if the SLA 306 is not being complied with, the method 600 analyzes 608 the queuing latency returned with the I/O completion status. If the method 600 determines 610 that SLA compliance may be improved by adjusting the priority of the I/O workstream (without negatively affecting other I/O workstreams and compliance with other SLAs 306), the method 600 may adjust 612 the priority of the I/O workstream. If the method 600 determines 614 that SLA compliance may be improved by adjusting data placement on the storage system 110, the method 600 may alter 616 data placement, such as by moving data to faster or slower storage media. Such movement may be initiated by a system administrator, data migration software, or the like. If, from the queuing latency, the method 600 determines 618 that SLA compliance may be improved by upgrading hardware on the storage system 110 (such as by installing higher performance storage devices 204), the method 600 may initiate 620 a hardware upgrade, such as by instructing a system administrator or other personnel to upgrade hardware.
The flowcharts and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer-usable media according to various embodiments of the present invention. In this regard, each block in the flowcharts or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the Figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, may be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.