The FETs 11 to 14 are connected together in series. The source of the FET 11 is connected to the first input/output terminal P11. The drain of the FET 14 is connected to the second input/output terminal P12. The sources and the drains of the FETs 11 to 14 are grounded via the resistors Rs10 to Rs14 each having a predetermined resistance value. The gates of the FETs 11 to 14 are connected to the control terminal V11 via the resistors Rg11 to Rg14, respectively. The first input/output terminal P11 and the second input/output terminal P12 are each connected to an external circuit such as an antenna circuit or a receiver circuit. A predetermined external voltage is applied to the control terminal V11. The number of FETs connected together in series is not limited to four.
The radio frequency switching circuit 1 is an ON-switch type SPST radio frequency switching circuit, and has a function of turning ON/OFF the path extending from the first input/output terminal P11 to the second input/output terminal P12 according to a control voltage applied to the control terminal V11. The control voltage applied to the control terminal V11 is either “a negative bias voltage”, which turns OFF the path, or “a positive bias voltage being greater than or equal to 0V and less than or equal to the Schottky forward voltage”, which turns ON the path. The Schottky forward voltage depends on the forward voltage Vf of the FET, and is a positive bias voltage of about 1V or less. As the value of the positive bias voltage is closer to the value of the forward voltage Vf, it provides a greater effect as the depletion layer at the metal-semiconductor junction plane becomes narrower. In the present invention, a 0V voltage, capable of turning ON the path, is considered within the definition of a positive bias voltage being less than or equal to the Schottky forward voltage.
With the radio frequency switching circuit 1, a positive bias voltage being greater than 0V and less than or equal to the Schottky forward voltage is applied to the gates of the FETs 11 to 14 in order to turn ON the path extending from the first input/output terminal P11 to the second input/output terminal P12. This brings forth a positive bias voltage state where the gate-source (or gate-drain) voltage Vgs (or Vgd) is less than or equal to the Schottky forward voltage, and the depletion layer is narrowed as compared with a case where 0V is applied to the gates of the FETs 11 to 14, whereby it is possible to improve the radio frequency characteristics such as the insertion loss characteristics and the distortion characteristics along the path extending from the first input/output terminal P11 to the second input/output terminal P12. The Schottky forward voltage as used herein is a Schottky voltage when there is a current flow of 100 μA/m.
In detailed discussions below using specific values, a negative bias voltage is referred to as a “non-actuating voltage”, and a positive bias voltage being greater than or equal to 0V and less than or equal to the Schottky forward voltage is referred to as an “actuating voltage” for the sake of simplicity.
For example, when a non-actuating voltage of −3V is applied to the control terminal V11, the gate-source (or gate-drain) voltage Vgs (or Vgd) of each of the FETs 11 to 14 becomes −3V, thereby turning OFF the path extending from the first input/output terminal P11 to the second input/output terminal P12. When an actuating voltage of 0V is applied to the control terminal V11, the gate-source (or gate-drain) voltage Vgs (or Vgd) of each of the FETs 11 to 14 becomes 0V, thereby turning ON the path extending from the first input/output terminal P11 to the second input/output terminal P12.
As described above, with the radio frequency switching circuit 1 according to the first embodiment of the present invention, the potential of the source or drain of each of the FETs 11 to 14 is fixed at a positive bias voltage being greater than or equal to 0V and less than or equal to the Schottky forward voltage, thereby eliminating the need for DC cut capacitors, which are conventionally provided between an external circuit and the first and second input/output terminals P11 and P12. Thus, it is possible to realize desirable radio frequency characteristics over a wide band without being influenced by the frequency characteristics of DC cut capacitors. Moreover, it is possible to avoid the breakdown of the circuit even when there is a flow of a high voltage signal such as an electrostatic surge.
Moreover, while the radio frequency switching circuit 1 is typically implemented as an integrated circuit on a semiconductor chip, it is not necessary to provide chip capacitors as DC cut capacitors, whereby it is possible to reduce the number of steps in the semiconductor production process and to reduce the semiconductor chip area.
The FETs 15 to 18 are connected together in series. The source of the FET 15 is connected to the first input/output terminal P11 and the second input/output terminal P12. The drain of the FET 18 is grounded. The sources and the drains of the FETs 15 to 18 are grounded via the resistors Rs15 to Rs18, respectively, having a predetermined resistance value. The gates of the FETs 15 to 18 are connected to the control terminal V12 via the resistors Rg15 to Rg18, respectively. The first input/output terminal P11 and the second input/output terminal P12 are each connected to an external circuit such as an antenna circuit or a receiver circuit. A predetermined external voltage is applied to the control terminal V12. The number of FETs connected together in series is not limited to four.
The radio frequency switching circuit 2 is an OFF-switch type SPST radio frequency switching circuit, and has a function of turning ON/OFF the path extending from the first input/output terminal P11 to the second input/output terminal P12 according to a control voltage applied to the control terminal V12. The control voltage applied to the control terminal V12 is either a negative bias voltage (a non-actuating voltage) and a positive bias voltage being greater than or equal to 0V and less than or equal to the Schottky forward voltage (an actuating voltage).
For example, when a non-actuating voltage of −3V is applied to the control terminal V12, the gate-source (or gate-drain) voltage Vgs (or Vgd) of each of the FETs 15 to 18 becomes −3V, thereby turning ON the path extending from the first input/output terminal P11 to the second input/output terminal P12. When an actuating voltage of 0V is applied to the control terminal V12, the gate-source (or gate-drain) voltage Vgs (or Vgd) of each of the FETs 15 to 18 becomes 0V, thereby turning OFF the path extending from the first input/output terminal P11 to the second input/output terminal P12.
As described above, with the radio frequency switching circuit 2 according to the second embodiment of the present invention, the potential of the source or drain of each of the FETs 15 to 18 is fixed at a positive bias voltage being greater than or equal to 0V and less than or equal to the Schottky forward voltage, thereby eliminating the need for DC cut capacitors, which are conventionally provided between an external circuit and the first and second input/output terminals P11 and P12 and between the FET 18 and the ground. Thus, it is possible to realize desirable radio frequency characteristics over a wide band without being influenced by the frequency characteristics of DC cut capacitors. Moreover, it is possible to avoid the breakdown of the circuit even when there is a flow of a high voltage signal such as an electrostatic surge. The above non-actuating voltage of −3V is an example. Using a higher voltage (in terms of the absolute value thereof), it is possible to improve the linearity and the radio frequency characteristics in a high signal region.
Moreover, while the radio frequency switching circuit 2 is typically implemented as an integrated circuit on a semiconductor chip, it is not necessary to provide chip capacitors as DC cut capacitors, whereby it is possible to reduce the number of steps in the semiconductor production process and to reduce the semiconductor chip area. Particularly, the DC cut capacitor between the FET 18 and the ground is often an MIM capacitor, in which case the ESD resistance of the radio frequency switching circuit is dependent upon the voltage resistance of the MIM capacitor and is very low. By eliminating the presence of an MIM capacitor, the ESD resistance level can be improved 10 times or so.
Consider a case where an actuating voltage of 0V is applied to the control terminal V11, and a non-actuating voltage of −3V is applied to the control terminal V12. In such a case, each of the FETs (FETs 11 to 14) in the transfer circuit section has its gate-source (or gate-drain) voltage Vgs (or Vgd) forward-biased and is thus ON, whereas each of the FETs (FETs 15 to 18) in the shunt circuit section has its gate-source (or gate-drain) voltage Vgs (or Vgd) reverse-biased and is thus OFF.
Now consider a case where a non-actuating voltage of −3V is applied to the control terminal V11 and an actuating voltage of 0V is applied to the control terminal V12. In such a case, each FET in the transfer circuit section is OFF, and each FET in the shunt circuit section is ON.
When each FET in the transfer circuit section is ON, each FET in the shunt circuit section is OFF. Therefore, a signal inputted from an antenna connected to the first input/output terminal P11, for example, passes through the transfer circuit section and is transmitted to the receiver circuit section connected to the second input/output terminal P12. Then, since each FET in the shunt circuit section is OFF, no signal is transmitted to the shunt circuit section. Conversely, when each FET in the transfer circuit section is OFF, no signal can pass through the transfer circuit section. Even if a large signal is inputted from an antenna and the signal leaks to the transfer circuit section being OFF, the leak signal is released to GND but is not transmitted to the receiver circuit section since the shunt circuit section is ON.
As described above, with the radio frequency switching circuit 3 according to the third embodiment of the present invention, a circuit obtained by combining an ON-switch type SPST radio frequency switching circuit with an OFF-switch type SPST radio frequency switching circuit can be made to function as a radio frequency receiver switching device by appropriately controlling the control terminals V11 and V12.
The FETs 11 to 14, the resistors Rg11 to Rg14 and Rs11 to Rs14 together form a first transfer circuit section. The FETs 15 to 18, the resistors Rg15 to Rg18 and Rs15 to Rs18 together form a first shunt circuit section. The FETs 21 to 24, the resistors Rg21 to Rg24 and Rs21 to Rs24 together form a second transfer circuit section. The FETs 25 to 28 and the resistors Rg25 to Rg28 and Rs25 to Rs28 together form a second shunt circuit section.
The control voltages applied to the control terminals V11 and V12 (a negative bias voltage and a positive bias voltage being greater than or equal to 0V and less than or equal to the Schottky forward voltage) are controlled so that the transfer circuit section of one of the radio frequency switching circuits 3 and the shunt circuit section of the other one of the radio frequency switching circuits 3 are both ON.
As described above, with the radio frequency switching circuit 4 according to the fourth embodiment of the present invention, it is possible to improve the radio frequency characteristics over a wide band and to realize desirable distortion characteristics when large signals are passing therethrough and a reduction in the power consumption when small signals are passing therethrough. Moreover, it is possible to avoid the breakdown of the circuit even when there is a flow of a high voltage signal such as an electrostatic surge.
The radio frequency switching circuit 51 employs the radio frequency switching circuit 4 of the fourth embodiment. The negative bias generation circuit 52 uses the external control voltage applied to the external control terminal so as to control the control voltages applied to the control terminals V11 and V12 connected to the transfer circuit sections and the shunt circuit sections of the radio frequency switching circuit 51. The control terminal V11 is connected to the gates of the FETs of the first transfer circuit section and the second shunt circuit section. The control terminal V12 is connected to the gates of the FETs of the second transfer circuit section and the first shunt circuit section.
For example, where 3V is applied as the power supply voltage and 3V is applied as the external control voltage, the voltage increasing circuit 54 is ON, and the OFF control voltage of the control voltage is in a state (1) shown in the figure. For example, where an actuating voltage of 0V and a non-actuating voltage of −6V are applied to the control terminals V11 and V12, respectively, each of the FETs in the first transfer circuit section and the second shunt circuit section has its gate-source (or gate-drain) voltage Vgs (or Vgd) forward-biased and is thus ON, whereas each of the FETs in the second transfer circuit section and the first shunt circuit section has its gate-source (or gate-drain) voltage Vgs (or Vgd) strongly reverse-biased and is thus OFF.
In such a state, a signal inputted from a transmitter circuit section connected to the second input/output terminal P12 is transmitted to an antenna connected to the first input/output terminal P11 through the first transfer circuit section. Since the FETs in the first shunt circuit are OFF, the signal is not transmitted to the first shunt circuit section. Moreover, the second transfer circuit section is OFF and the second shunt circuit section is ON. Therefore, even if a signal leaks to the second transfer circuit section, the leak signal is released to GND but is not transmitted to the receiver circuit section since the second shunt circuit section is ON. Since the FETs of the first shunt circuit section and the second transfer circuit section are strongly reverse-biased, it is possible to realize desirable distortion characteristics with desirable linearity.
Conversely, where 3V is applied as the power supply voltage and 0V is applied as the external control voltage, for example, the voltage increasing circuit 54 is OFF and the OFF control voltage of the control voltage is in a state (2) shown in the figure. For example, where a non-actuating voltage of −3V and an actuating voltage of 0V are applied to the control terminals V11 and V12, respectively, each of the FETs in the first transfer circuit section and the second shunt circuit section has its gate-source (or gate-drain) voltage Vgs (or Vgd) reverse-biased and is thus OFF, whereas each of the FETs in the second transfer circuit section and the first shunt circuit section has its gate-source (or gate-drain) voltage Vgs (or Vgd) forward-biased and is thus ON.
The voltage increasing circuit 54 has a disadvantage in that the current consumption thereof is as high as 200 μA in order to increase the voltage. However, when the signal passing therethrough is a low signal as in a signal-receiving operation, it is not needed to be strongly reverse-biased. Therefore, the voltage-increasing function of the circuit may be turned OFF by logic control so that the current consumption thereof can be reduced to be 1 μA or less.
As described above, with the radio frequency switching device 5 according to the fifth embodiment of the present invention, it is possible to eliminate the need for DC cut capacitors, which are needed in conventional configurations. Therefore, it is possible to realize desirable radio frequency characteristics over a wide band without being influenced by the frequency characteristics of DC cut capacitors. Particularly, it is possible to realize stable isolation characteristics.
The radio frequency switching circuit 61 includes transfer circuit sections SWT1 to SWT4 and shunt circuit sections SWS1 to SWS4. Four circuits each including a pair of a transfer circuit section SWTx and a shunt circuit section SWSx (where x is 1 to 4) are connected in parallel to one another, and each of these circuits is the radio frequency switching circuit 3 of the third embodiment. The number of the sets of transfer circuit sections and shunt circuit sections is not limited to four.
The inputs of the transfer circuit sections SWT1 to SWT4 are connected to an antenna connection terminal ANT. The first input/output terminal P11 is connected to a GSM (Global System for Mobile Communication) transmitter circuit section, and receives a signal of up to 35 dBm. The second input/output terminal P12 is connected to a GSM receiver circuit section, and outputs a signal of up to 10 dBm. The third and fourth input/output terminals P13 and P14 are connected to a UMTS (Universal Mobile Telecommunications System) transceiver circuit, and receives a signal of up to 26 dBm. The transfer circuit sections SWT1 to SWT4 and the shunt circuit sections SWS1 to SWS4 are controlled by the control terminals V11 to V14 and V21 to V24, respectively.
With the radio frequency switching device 6, the voltage level of the OFF control voltage of the control terminals V11 to V14 and V21 to V24 is changed as necessary by the external control voltage, as illustrated in
With the radio frequency switching device 6, when the device operates according to the control voltage applied to the control terminals V11 to V14 and V21 to V24 when the paths shown in
As described above, with the radio frequency switching device 6 according to the sixth embodiment of the present invention, it is possible to realize a free-port radio frequency switching device by a control using a logic circuit, without changing the FET configuration, according to the amplitude of the signal to be passed therethrough.
A conventional switching module shown in
In contrast, the switching module shown in
While the invention has been described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is understood that numerous other modifications and variations can be devised without departing from the scope of the invention.
Number | Date | Country | Kind |
---|---|---|---|
2006-152170 | May 2006 | JP | national |
2007-117119 | Apr 2007 | JP | national |