This disclosure relates generally to a railroad safety communication structure, and more specifically, to sharing second train logic between railroad lines.
Vehicle road grade crossings of railroad tracks have long introduced danger to the vehicles and pedestrians, as well as trains passing through these grade crossings. There is a need to improve the safety at these grade crossings.
Disclosed herein are exemplary scenarios illustrating second train logic and implementations thereof. This description includes drawings, wherein:
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions and/or relative positioning of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted to facilitate a less obstructed view of these various embodiments. It will further be appreciated that certain actions and/or steps may be described or depicted in a particular order of occurrence while those skilled in the art will understand that such specificity with respect to sequence is not actually required. It will also be understood that the terms and expressions used herein have the ordinary technical meaning as is accorded to such terms and expressions by persons skilled in the technical field as set forth above except where different specific meanings have otherwise been set forth herein.
Described herein are scenarios illustrating the need, use, application, and implementation of second train logic at a grade crossing, i.e., where the roadway and railroad tracks cross, adjacent to a traffic controlled intersection and an adjacent track interconnected railroad grade crossing where two or more railroads detect trains independently.
Railroad grade crossing including adjacent tracks at a grade crossing for vehicles (e.g., automobiles, trucks, semi-trailer trucks, motorcycles, etc.) and/or pedestrians configured to avoid having vehicles and/or pedestrians on the tracks as a second train movement inbound after the first train is proceeding across or just crossed the railroad grade crossing. In doing so, extra safety precautions are provided, i.e., second train logic. Second train logic has been implemented to provide additional safety for drivers and the train near the grade crossing.
Generally speaking,
The second train detection 5 controls continue to indicate for advance preemption and does not release the indication to the adjacent traffic signal controller nor do the warning devices 3. This occurs even though the second train detection 5 controls on Track #2 are indicating for advance preemption only. In the exemplary implementation of second train logic, generally, there may be a single input into the adjacent traffic signal controller for railroad advance preemption. The adjacent traffic signal controller does not detect two distinct preemption calls due to the first train detection 1 controls initially preempting the adjacent traffic signal controller, and the subsequent second train detection 5 controls continuing the initial preemption indication to the adjacent traffic signal controller 2. Because of this, the adjacent traffic signal controller will not start the traffic clearance phases 2 again, and instead, the traffic signal remains in the dwell phases 4, i.e., the parallel roadway, as if one continuous train move is occurring.
Turning to
Further, due to the warning devices 3a, 3b, and 4a deactivating as neither the far railroad nor the near railroad train detection controls indicate for warning device activation, vehicles which were stopped at warning device 3a from the first train are now permitted to pull forward towards the traffic intersection and encounter a stop indication. In this scenario, the traffic signal is still in dwell phase 5 due to the advance preemption having never released and the drivers must stop creating a queue back towards, and over, the tracks. This red light is a result, at least in part, of the continuous preemption call from the two railroad grade crossings to the adjacent traffic signal controller. The adjacent traffic signal controller will not re-service the traffic signal clearance phases 2 and the traffic signal dwell phases 5 continue.
Turning to
The communication of second train logic between the two adjacent railroads can be achieved using one or more microprocessors, processors, integrated circuits, and/or other control circuitry via direct communication links and/or wired and/or wireless communication over one or more distributed communication networks (e.g., cellular, Wi-Fi, Bluetooth, LoRa, LoRaWAN, WAN, LAN, other IEEE802.11 communication protocols, Internet, other such communication networks, or a combination of two or more of such communication networks). This may be achieved by receiving an external signal or signals, such as the advanced preemption or the warning activation signals, through an input or inputs and comparing the received signal or signals indicating train inbound. The microprocessor may determine if a second train scenario is occurring when the train detection devices are external, e.g., the Near Railroad can determine if there is a second train scenario due to a train on one of the Far Railroad. In doing so, the warning devices may remain active and avoid a potential flaw due to the second train logic not being shared across the two railroads.
The second train detection 6 controls continue to indicate for advance preemption and does not release the preemption call to the adjacent traffic signal controller, but even though this control on Near Track #2 is only indicating for advance preemption the warning devices remain active. The present disclosure provides for holding the warning devices active through all train moves if they are occurring back-to-back on adjacent track interconnected railroads. This in part provides for increased safety at traffic signal interconnected grade crossings due to the nature of how traffic signal preemption interconnections are made between the railroad grade crossing and the adjacent traffic signal controller. There is generally only a single input into the adjacent traffic signal controller for railroad advance preemption. Due to the first train detection controls initially preempting the traffic signal, and subsequently the second train 6 controls indicating a second train inbound on Near Track #2 and continuing the initial preemption indication to the adjacent traffic signal controller, the adjacent traffic signal controller does not detect two distinct preemption calls. Therefore, the adjacent traffic signal controller will not re-service the traffic signal clearance phases 2, and the traffic signal dwell phases 5 continue, e.g. the parallel roadway, as if one continuous train move is occurring.
Referring to
At step 208, the Near Railroad microprocessor, processor and/or other control circuitry aggregates both the internal and external signals to determine if internal second train event is occurring, i.e., there are multiple train moves occurring simultaneously on its own lines and/or a train on the Far Railroad and Near Railroad simultaneously. At step 210, the microprocessor determines if there is a received signal and an internally detected signal to determine if there are multiple trains entering and passing the grade crossing at nearly the same time. At step 212, the microprocessor decides whether or not this is in fact a second train event, if so, the microprocessor proceeds to step 214 and applies the shared second train logic and process described above. If a second train event is not determined, the microprocessor proceeds to step 216 and proceeds as normal.
Railroad control circuits are typically of the conventional direct current (DC), fail safe, normally energized, closed circuit principal style of discrete input-output (IO). Leveraging existing designed foreign interconnect circuits and improving the existing design through external relay logic networks is possible through use of the foreign crossing repeater relay (XPR). In some embodiments, this foreign indication of second train logic can be implemented via stick circuitry to ensure local advance preempt control occurring in concert with a foreign XPR indication immediately activates the local warning device control and will not release the warning devices until the advance preempt control and foreign XPR indication are returned to the normally energized state. It is contemplated that bootstrap conditions can be present and/or are prevalent when foreign entities, i.e., adjacent railroads or other related networks or devices thereof, control each other and therefore may be utilized in some embodiments.
Another method using conventional DC, fail safe, normally energized, closed circuit principal style of discrete IO, an input of the foreign (external) advance preempt control may be used in some embodiments to locally discern when the foreign entity has preempted the nearby traffic intersection. A similar external relay logic network to the foreign XPR indication may be implemented on the local advance preempt repeater relay with associated stick circuitry and potential for bootstrap conditions. This approach does not preclude foreign indication of XPR but is incorporated to provide a single interconnection point to the traffic controller.
In yet further embodiments, a traffic controller may be utilized to implement second train logic. Traditionally second train logic is a railroad signal design function, but this does not prevent a traffic agency from implementing external second train logic at the traffic signal controller. This approach, in some embodiments, would include independent indications of advance preempt from one or more, and typically all, entities to be interconnected with the traffic controller and a feedback circuit interconnection to one or more, and typically all, entities indicating the intersection has been preempted. This feedback circuit may leverage current industry standard interconnects, non-standard interconnects, or a combinations of standard and non-standard interconnects.
It is contemplated that external input of second train logic is not restricted to foreign railroads. Depending on the design of a railroad's control circuitry, a crossing with multiple tracks may have independent train detection controls for each track. For these scenarios external relay logic networks, with associated stick circuitry, as previously discussed may be implemented on a single railroad.
Some embodiments, such as presented in
Virtual track circuits or “dummy” tracks may also be implemented in railroad vital programming applications. In this approach, the discrete, dedicated, external advance preempt and/or crossing active inputs can be associated with a virtual track that does not have a physical presence at the grade crossings. Although the virtual track does not exist, the vital programming application treats indications from the virtual track as if they have a physical presence on the local railroad. Through the virtual track indications, the local railroad grade crossing microprocessor can, in some embodiments, use its internal second train logic functionality to closely match the grade crossing's behavior in the form shown in
Further, the circuits, circuitry, systems, devices, processes, methods, techniques, functionality, services, servers, sources and the like described herein may be utilized, implemented and/or run on many different types of devices and/or systems.
By way of example, the system 2100 may comprise one or more control circuits or processor modules 2112, one or more memory 2114, and one or more communication links, paths, buses or the like 2118. Some embodiments may include one or more user interfaces 2116, and/or one or more internal and/or external power sources or supplies 2140. The control circuit 2112 can be implemented through one or more processors, microprocessors, central processing unit, logic, local digital storage, firmware, software, and/or other control hardware and/or software, and may be used to execute or assist in executing the steps of the processes, methods, functionality and techniques described herein, and control various communications, decisions, programs, content, listings, services, interfaces, logging, reporting, etc. Further, in some embodiments, the control circuit 2112 can be part of control circuitry and/or a control system 2110, which may be implemented through one or more processors with access to one or more memory 2114 that can store instructions, code and the like that is implemented by the control circuit and/or processors to implement intended functionality. In some applications, the control circuit and/or memory may be distributed over a communications network (e.g., LAN, WAN, Internet) providing distributed and/or redundant processing and functionality. Again, the system 2100 may be used to implement one or more of the above or below, or parts of, components, circuits, systems, processes and the like.
Some embodiments include a user interface 2116 that can allow a user to interact with the system 2100 and receive information through the system. In some instances, the user interface 2116 includes a display 2122 and/or one or more user inputs 2124, such as buttons, touch screen, track ball, keyboard, mouse, etc., which can be part of or wired or wirelessly coupled with the system 2100. Typically, the system 2100 further includes one or more communication interfaces, ports, transceivers 2120 and the like allowing the system 2100 to communicate over a communication bus, a distributed computer and/or communication network (e.g., a local area network (LAN), the Internet, wide area network (WAN), etc.), communication link 2118, other networks or communication channels with other devices and/or other such communications or combination of two or more of such communication methods. Further the transceiver 2120 can be configured for wired, wireless, optical, fiber optical cable, satellite, or other such communication configurations or combinations of two or more of such communications. Some embodiments include one or more input/output (I/O) ports 2134 that allow one or more devices to couple with the system 2100. The I/O ports can be substantially any relevant port or combinations of ports, such as but not limited to USB, Ethernet, or other such ports. The I/O interface 2134 can be configured to allow wired and/or wireless communication coupling to external components. For example, the I/O interface can provide wired communication and/or wireless communication (e.g., Wi-Fi, Bluetooth, cellular, RF, and/or other such wireless communication), and in some instances may include any known wired and/or wireless interfacing device, circuit and/or connecting device, such as but not limited to one or more transmitters, receivers, transceivers, or combination of two or more of such devices.
In some embodiments, the system may include one or more sensors 2126 to provide information to the system and/or sensor information that is communicated to another component. The sensors can include substantially any relevant sensor, such as distance measurement sensors (e.g., optical units, sound/ultrasound units, etc.), weight and/or pressure sensors, velocity sensors, light sensors, and/or other such sensors. The foregoing examples are intended to be illustrative and are not intended to convey an exhaustive listing of all possible sensors. Instead, it will be understood that these teachings will accommodate sensing any of a wide variety of circumstances in a given application setting.
The system 2100 comprises an example of a control and/or processor-based system with the control circuit 2112. Again, the control circuit 2112 can be implemented through one or more processors, controllers, central processing units, logic, software and the like. Further, in some implementations the control circuit 2112 may provide multiprocessor functionality.
The memory 2114, which can be accessed by the control circuit 2112, typically includes one or more processor-readable and/or computer-readable media accessed by at least the control circuit 2112, and can include volatile and/or nonvolatile media, such as RAM, ROM, EEPROM, flash memory and/or other memory technology. Further, the memory 2114 is shown as internal to the control system 2110; however, the memory 2114 can be internal, external or a combination of internal and external memory. Similarly, some or all of the memory 2114 can be internal, external or a combination of internal and external memory of the control circuit 2112. The external memory can be substantially any relevant memory such as, but not limited to, solid-state storage devices or drives, hard drive, one or more of universal serial bus (USB) stick or drive, flash memory secure digital (SD) card, other memory cards, and other such memory or combinations of two or more of such memory, and some or all of the memory may be distributed at multiple locations over one or more computer networks. The memory 2114 can store code, software, executables, scripts, data, content, lists, programming, programs, log or history data, user information, customer information, product information, and the like. While
The microprocessor may be disposed within a module stored in a chassis near the grade crossing to receive and detect signals of inbound trains, both internally on its own railroad, and shared from external microprocessors on other adjacent railroads. The external microprocessors may be disposed within the same chassis in a different module near the railroad grade crossings or in a different nearby chassis.
Some embodiments provide a communication structure comprising: a first track including a first microprocessor and first control circuitry; and a second track including a second microprocessor and second control circuitry; wherein the first control circuitry and the second control circuitry are configured to determine an inbound train on the first track or the second track, wherein the first control circuitry and the second control circuitry are configured to communicate the inbound train on the corresponding tracks to the other control circuitry, wherein the first microprocessor and the second microprocessor are configured to communicate with one another, wherein at least one of the first microprocessor and the second microprocessor are configured to determine whether a first activation of warning devices is to be activated at a grade crossing and communicate the first activation to the other microprocessor, and wherein at least one of the first microprocessor and the second microprocessor are configured to determine a second sustained activation of the warning devices and communicate the first activation to the other microprocessor.
In some embodiments, the first track can comprises at least two separate train tracks monitored by the first control circuitry, and/or the second track can comprise at least two separate train tracks monitored by the second control circuitry. The first microprocessor can be configured to communicate a clearance signal to an automobile traffic indicator and/or automobile control system at the grade crossing upon a detection of an inbound movement of a train on the first track, and typically the detection occurs through one or more sensor systems at or prior to a threshold distance from the grade crossing. The first microprocessor, in some embodiments, can be configured to communicate a warning device activation signal to automobile warning indicators of the grade crossing and next to the first track upon an advancement of a train on the first track to the grade crossing. In some embodiments, the second microprocessor can be configured to communicate a clearance signal to a traffic indicator at the grade crossing upon an inbound movement of a train on the second track. The second microprocessor can, in some implementations, be configured to communicate a warning device activation signal to warning indicators next to the second track upon an advancement of a second train on the second track to the grade crossing. Typically, at least one of the first microprocessor and the second microprocessor communicate an inbound movement of a respective train on the corresponding track with one another. In some embodiments, at least one of the first microprocessor and the second microprocessor may communicate a first advancement of the respective trains on the corresponding respective track with one another. In some implementations, the first microprocessor may communicate with the second microprocessor a first advancement of a first train on the first track, and/or the second microprocessor may communicate with the first microprocessor a second advancement of a second train on the second track. A first advancement of a first train communicated between the first microprocessor and the second microprocessor may in some embodiments cause at least one warning indicator on one or both the first track system and the second track system to activate, disallowing any vehicles from entering the grade crossing. Additionally or alternatively, in some embodiments, a second advancement of a second train, occurring at the same time or within a threshold duration as the first advancement communicated between the first microprocessor and the second microprocessor, can trigger the control system to cause at least one warning indicator on one or both the first track and the second track to remain activate, disallowing any vehicles from entering the grade crossing during an entirety of the first advancement and the second advancement. The warning devices may be deactivated, in some embodiments, upon clearance of the first train and the second train from the grade crossing. The warning devices typically remain active after clearance of one of the first train or the second train from the grade crossing.
Some embodiments provide a method for communicating train grade crossing signals comprising: detecting a first inbound movement of a first train on a first track towards a grade crossing via a first control circuitry of a first track system associated with the first track; communicating the first inbound movement via the first control circuitry to a first microprocessor of the first track system; communicating the first inbound movement via the first microprocessor to a second microprocessor of a second track system associated with a second track, and a traffic indicator; communicating a first advancement of the first train towards the grade crossing via the first microprocessor to the second microprocessor, the traffic indicator, and first warning devices; detecting a second inbound movement of a second train on a second track towards the grade crossing via a second control circuitry of the second track system; communicating the second inbound movement via the second control circuitry to the second microprocessor; communicating the second inbound movement via the second microprocessor to the first microprocessor and the traffic indicator; and communicating a second advancement of the second train towards the grade crossing via the second microprocessor to the first microprocessor, the traffic indicator, and second warning devices; wherein communication of the first inbound movement causes the traffic indicator to enter a clearance phase, wherein communication of the first advancement causes the traffic indicator to enter a dwell phase and the first warning devices and the second warning devices to become active; and wherein communication of the second inbound movement or the second advancement causes the traffic indicator to remain in the dwell phase and the first warning devices and the second warning devices to remain active.
In some embodiments, a clearance signal is communicated to the traffic indicator at the grade crossing upon an inbound movement of the train on the first track. Some embodiments trigger a communication of the control signal when a second advancement of a second train, occurring within a threshold duration as the first advancement communicated between the first microprocessor and the second microprocessor, in controlling warning indicator on one or both the first track and the second track to remain activate and inhibiting vehicles from entering the grade crossing during an entirety of the first advancement and the second advancement. The first warning devices and the second warning devices can be deactivated, in some embodiments, upon clearance of the first train and the second train from the grade crossing. Some embodiments maintain the first warning devices and the second warning devices active after clearance of only one of the first train or the second train from the grade crossing. In some embodiments, the first track can comprise at least two separate train tracks monitored by the first control circuitry, and/or the second track can comprise at least two separate train tracks monitored by the second control circuitry.
Some embodiments provide a railroad communication structure comprising: first track system comprising a first microprocessor and first control circuitry associated with a first track; and a second track system comprising a second microprocessor and second control circuitry associated with a second track; wherein the first control circuitry is configured to determine when there is an inbound train on the first track, and the second control circuitry is configured to determine an inbound train on the second track, wherein the first control circuitry is configured to communicate the inbound train on the first track to the second control circuitry, and the second control circuitry is configured to communicate the inbound train on the second track to the first control circuitry, wherein the first microprocessor and the second microprocessor are configured to communicate with one another, wherein the first microprocessor is configured to determine that a first activation of warning devices is to be activated at a grade crossing and communicate the first activation to the second microprocessor, and wherein the second microprocessor is configured to determine a second sustained activation of the warning devices and communicate the second sustained activation to the first microprocessor.
Further, some embodiments provide methods of enhancing railroad safety at a two adjacent railroad systems comprising: determining by a first control circuitry, of a first railroad track system associated with a first track, when there is an inbound train on the first track; communicating the determination of the inbound train on the first track to a second control circuitry of a second railroad track system associated with a second track that is running adjacent the first track at a grade crossing; determining, by a first microprocessor of the first railroad track system based on the determination of the inbound train on the first track, that a first activation of warning devices is to be activated at a grade crossing; communicating the first activation to a second microprocessor of the second railroad track system; determining when a second sustained activation of the warning devices is to be implemented; and communicating the second sustained activation to the first microprocessor.
Some embodiments provide a communication structure comprising: a first track system comprising a first microprocessor and first control circuitry associated with a first track; and a second track system comprising a second microprocessor and second control circuitry associated with a second track; wherein the first control circuitry is configured to determine when there is an inbound train on the first track, and the second control circuitry is configured to determine an inbound train on the second track, wherein the first control circuitry is configured to communicate the inbound train on the first track to the second control circuitry, and the second control circuitry is configured to communicate the inbound train on the second track to the first control circuitry, wherein the first microprocessor and the second microprocessor are configured to communicate with one another, wherein the first microprocessor is configured to determine that a first activation of warning devices is to be activated at a grade crossing and communicate the first activation to the second microprocessor, and wherein the second microprocessor is configured to determine a second sustained activation of the warning devices and communicate the second sustained activation to the first microprocessor.
Those skilled in the art will recognize that a wide variety of other modifications, alterations, and combinations can also be made with respect to the above described embodiments without departing from the scope of the invention, and that such modifications, alterations, and combinations are to be viewed as being within the ambit of the inventive concept.
This application claims the benefit of U.S. Provisional Application No. 63/539,939 filed Sep. 22, 2023, which is incorporated herein by reference in its entirety.
Number | Date | Country | |
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63539939 | Sep 2023 | US |