Claims
- 1. A method for fabricating a read-only memory, comprising:providing a semiconductor substrate; forming active regions extending in a first direction to define memory cell lines along bit lines; forming a gate oxide layer on the active regions; forming a gate layer on the gate oxide layer; removing a part of the gate layer except areas for gates of field effect transistors, which store one type of binary data; forming impurity regions at both sides of each gate of the field effect transistor to form source and drain thereof; implanting impurities in the semiconductor substrate using the gate as a mask to form conducting regions, which store the other type of binary data therein; forming an interlayer insulating layer over the gates of the field effect transistors; forming contact holes passing through the interlayer insulating layer; and forming a wiring pattern which is connected to the gates via the contact holes and to word lines, which are extending in a second direction orthogonal to the first direction, wherein the word and bit lines define the locations of the memory cell matrix; and binary data stored in the memory cell matrix are decided by detecting current flowing through the corresponding bit line.
- 2. A method according to claim 1, wherein the read-only memory is a NAND type mask ROM.
- 3. A method according to claim 25, wherein the impurity regions and the conducting regions are formed in a same process.
Priority Claims (1)
Number |
Date |
Country |
Kind |
11-268289 |
Sep 1999 |
JP |
|
CROSS REFERENCE TO RELATED APPLICATION
This is a divisional application of application Ser. No. 09/532,041, filed Aug. 9, 2000, now U.S. Pat. No. 6,278,629, which is hereby incorporated by reference in its entirety for all purposes. This application also claims priority of Application No. H11-268289, filed Sep. 22, 1999 in Japan, the subject matter of which is incorporated herein by reference.
US Referenced Citations (10)