Patent Application
20060022798
1. Field of the Invention
The present invention relates to a reader/writer, and a communication method and a communication system using it, and more particularly to a reader/writer for transmitting such a control command as a write command to an IC tag, and a communication method and a communication system using it.
2. Description of the Related Art
Recently in physical distribution management at factories and in stock control at retail stores, RFID (Radio Frequency Identification) technology is attracting attention as a means for automatically recognizing a product by attaching a tag having an IC, in which the specific information on a product is written, to the product, reading the information via radio antenna and managing products in real-time.
The IC tag for RFID (hereafter called IC tag) used here transmits/receives data to/from a reader/writer via radio communication, and writes such data as the specific information on a product to a non-volatile memory enclosed in the IC tag, or reads the data from the non-volatile memory. An IC tag is classified into a “Passive type” for generating power supply voltage by radio waves without enclosing a battery, and an “active type” which encloses a battery.
For example, in Udo Karthaus, et al. “Fully Integrated Passive UHF RFID Transponder IC With 16.7 μW minimum RF Input Power”, IEEE Journal of Solid State Circuits, Vol. 38, No. 10, October 2003, pp. 1602-1608, the technology on a conventional passive type IC tag is disclosed. The passive type IC tag rectifies a part of the carrier which is transmitted from the reader/writer, and generates the power supply voltage for operation in the internal circuits of the IC tag. In other words, the power supply voltage of the IC tag depends on the radio waves received from the reader/writer. When this generated voltage is supplied, a control circuit inside the semiconductor device in the IC tag, a non-volatile memory in which data is written, and the communication circuits for transmitting/receiving data to/from the reader/writer, operate.
In the IC tag, predetermined data is written to or read from a memory in the IC tag according to the command transmitted from the reader/writer. Generally writing data to a non-volatile memory requires higher voltage than the case of reading data from a non-volatile memory. Therefore the IC tag boosts the power supply voltage by a charge pump circuit, for example, to acquire the write voltage. So if boosting to the write voltage takes time, the write speed drops.
In other words, the IC tag needs radio waves for generating power supply voltage for the internal circuit to operate, and in particular, radio waves for generating much higher power supply voltage are required when writing to a memory. This means that it is necessary to efficiently use the radio waves to be transmitted/received between the reader/writer and the IC tag.
As described above, the radio waves to be transmitted/received between the reader/writer and the IC tag must be used efficiently. The signals including commands transmitted from the reader/writer need not include all the elements, but can include only predetermined signals while the IC tag is executing a specific operation. However in the case of a conventional communication method using an IC tag, that the power supply voltage of an IC tag is generated by efficiently using the radio waves being transmitted and received is not a major concern.
According to a first aspect of the present invention, a communication system comprises an IC tag, and a reader/writer for performing radio communication with the IC tag. The reader/writer further comprises an encoding unit for encoding a digital signal having at least one bit and generating an encoded signal and a transmission unit for transmitting a modulated wave acquired by modulating a carrier based on the encoded signal during an acceptance period when the encoded signal is accepted in the IC tag, and transmitting the carrier to the IC tag during an execution period when the processing based on the encoded signal is executed in the IC tag. The IC tag further comprises a receive unit for receiving the modulated wave or the carrier transmitted from the reader/writer and a power supply voltage generation unit for generating the power supply voltage based on the received modulated wave or the carrier.
According to a second aspect of the present invention, a communication method between an IC tag and a reader/writer for performing radio communication with the IC tag. In the reader/writer, a digital signal having at least one bit is encoded and an encoded signal is generated, a modulated wave acquired by modulating a carrier based on the encoded signal is transmitted to the IC tag during an acceptance period when the encoded signal is accepted in the IC tag, and the carrier is transmitted to the IC tag during an execution period when the processing based on the encoded signal is executed in the IC tag. In the IC tag, the modulated wave or the carrier transmitted from the reader/writer is received, and the power supply voltage is generated based on the received modulated wave or the carrier.
According to a third aspect of the present invention, a reader/writer, comprises an encoding unit for encoding a digital signal having at least one bit and generating an encoded signal and a transmission unit for transmitting a modulated wave acquired by modulating a carrier based on the encoded signal to the IC tag during an acceptance period when the encoded signal is accepted in the IC tag, and transmitting the carrier to the IC tag during an execution period when the processing based on the encoded signal is executed in the IC tag.
The above and other objects, advantages and features of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:
The invention will be now described herein with reference to illustrative embodiments. Those skilled in the art will recognize that many alternative embodiments can be accomplished using the teachings of the present invention and that the invention is not limited to the embodiments illustrated for explanatory purposed.
The configuration of the IC tag system according to an embodiment of the present invention will now be described with reference to
The reader/writer 2 is communicably connected with a computer (not illustrated), for example, and according to an instruction of this computer, the reader/writer 2 writes predetermined data to the storage circuit in the IC tag 1, or reads the data from the IC tag 1.
When data is written to or read from the IC tag 1, the IC tag 1 is positioned close to the reader/writer 2, for example, then the reader/writer 2 transmits a radio wave to the IC tag 1, and the IC tag 1 rectifies the radio wave and generates the power supply voltage. The reader/writer 2 transmits the command acquired from the computer to the IC tag 1, and the IC tag 1 receives this command and writes data to or reads data from the storage circuit in the IC tag 1.
Now signals transmitted from the reader/writer 2 to the IC tag 1 according to the present embodiment will be described with reference to
As
The signal at the first bit of this frame (first signal) is a reference signal to be a reference clock for the logical circuit of the IC tag 1 to operate. The signal at the second bit of the frame (second signal) shows whether this data has the one bit data, in other words, this is an identification signal to indicate the presence or absence of the data. If the second signal is “1”, this frame has the data. If the second signal is “0”, this frame has only the reference signal (frame pulse) without having the data. The signal at the third bit of the frame (third signal) is a data identification signal to indicate the content of the data. If the third signal is “1”, this frame is “1”, and if the third signal is “0”, this frame is “0”.
For example, if this data signal is represented in three bits using “0” and “1”, the frame with only a frame pulse without data is “100”, the frame which indicates data “0” is “110”, and the frame which indicates data “1” is “111”. The combination of the frame, data content and frame pulse is not limited to this, but may have other combinations. The data “0” may be the frame “111”, and the data “1” may be the frame “110”, or a frame with an arbitrary bit length may be used.
As
In the IC tag 1, this carrier is used when the power supply voltage is generated from the modulated signals. In other words, the level of the power supply voltage to be generated by the IC tag 1 depends on the level of the amplitude of the carrier. Therefore if the amplitude of the carrier changes, the IC tag 1 side cannot generate the power supply voltage efficiently. In the present embodiment, if the frame of the data signal is unnecessary at the IC tag 1 side, the amplitude of the carrier by this frame is unchanged so that the power supply voltage is generated in the IC tag 1 efficiently.
Now the configuration of the reader/writer according to the present embodiment will be described with reference to the block diagram in
The antenna 21 is an antenna for transmitting/receiving radio waves to/from the IC tag 1, and has characteristics according to the frequency of the radio waves to be transmitted/received to/from the IC tag 1.
The transmission circuit 23 modulates the data signals generated by the control circuit 25, and converts them into the modulated signals in
The receive circuit 22 demodulates the radio wave received by the antenna 21 and converts it into demodulated signals. The received radio wave includes signals transmitted from the reader/writer 2, so demodulation is performed after removing the modulated signals modulated by the transmission circuit 23. This demodulated signal is output to the control circuit 25. The demodulation method performed in the receive circuit 22 is a method according to the modulation method of the IC tag 1, and is ASK modulation or PSK (Phase Shift Keying) modulation, for example.
The clock generation circuit 24 generates clock signals (clock pulses) for transmitting the frame pulse to the IC tag 1 via radio waves. The clock generation circuit 24 is an oscillator, for example, by which clock signals with a predetermined cycle are generated. These clock signals are output to the control circuit 25. The clock signal defines the reference clock of the IC tag 1, and also defines the timing to send data from the reader/writer 2 to the IC tag 1, and the communication speed.
The control circuit 25 encodes the clock signals generated by the clock generation circuit 24 and the commands to be transmitted, and decodes the demodulated signal generated by the receive circuit 22. According to the present embodiment, when the transmission command is a write command, the execution period when the write command is executed in the IC tag 1 is detected, and the data signals to be output to the transmission circuit 23 are controlled.
Now the configuration of the control circuit disposed in the reader/writer 2 according to the present embodiment will be described with reference to the block diagram in
The transmission command acquisition circuit 31 acquires a transmission command to be sent to the IC tag 1 from a computer. This transmission command is a write command or a read command, for example, and if it is a write command, the write data is also included. The transmission command may be generated inside the reader/writer 2. For example, a transmission command may be generated when predetermined data is received from the IC tag 1 or after a predetermined period has elapsed since a command is sent to the IC tag 1.
The data signal generation circuit 32 encodes the transmission command acquired by the transmission command acquisition circuit 31, and converts it into the data signal shown in
It is possible to modulate the data of a transmission command directly as a data signal by the transmission circuit 23 without being converted into a frame and to send it to the IC tag 1, but in the present embodiment, encoding is performed at the timing of the clock signal generated by the clock generation circuit 24, so as to transmit the transmission command to the IC tag 1, along with the frame pulse based on the clock signal.
For example, if the transmission command is not sent, only the clock signal is converted into a frame of the data signal. In other words, a frame with only the frame pulse is generated according to a predetermined cycle of the clock signal. In the example of
If the transmission command is sent, the data of the transmission command is converted into a frame of the data signal bit-by-bit according to a predetermined cycle of the clock signal. In other words, after the frame pulse generated based on the clock signal, the content of the bits of the transmission command is encoded. In the case of the example in
If the transmission command is a write command, the data signal generation circuit 32 converts the transmission command into a data signal, and outputs it, then in the write command execution period in the IC tag 1, the data signal generation circuit 32 interrupts the generation of the frame including the frame pulse, and outputs the data signal. The data signal during the write command execution period corresponds to data which a modulated signal with a predetermined amplitude is output. In the example in
The counter circuit 33 counts the number of clocks of the clock signal for detecting the write command execution period in the IC tag 1. Also the transmission period to transmit a command or the command acceptance period in the IC tag 1 may be detected by the counter circuit 33, and the count of the command execution period may be started at that timing.
The execution period storage circuit 34 stores the write command execution period in advance. The stored data is the number of clocks, for example, but may be other data such as time.
The receive data analysis circuit 35 decodes the demodulation signal generated by the receive circuit 22 to generate the receive data. This receive data is output to the computer when necessary.
Now the configuration of the IC tag according to the present embodiment will be described with reference to the block diagram in
The antenna 17 is an antenna for transmitting/receiving radio waves to/from the reader/writer 2, and has characteristics according to the frequency of the radio waves to be transmitted by the reader/writer 2. The power supply voltage generation circuit 11 rectifies the radio waves received by the antenna 17, and generates the power supply voltage based on the amplitude of the radio waves. This power supply voltage is supplied to the receive circuit 12, transmission circuit 13, clock generation circuit 14, control circuit 15 and storage circuit 16.
The receive circuit 12 demodulates the radio waves received by the antenna 17 and converts them into the demodulated signal. This demodulated signal is output to the clock generation circuit 14 and the control circuit 15. The transmission circuit 13 modulates the data signal including the data, which is generated and transmitted by the control circuit 15, and converts it into the modulated signal. This modulated signal is transmitted to the reader/writer 2 as a radio wave via the antenna 17.
The clock generation circuit 14 extracts the frame pulse with a predetermined cycle from the demodulated signal generated by the receive circuit 12, and generates the clock signal based on the frame pulse. This clock signal is output to the control circuit 15. The clock generation circuit 14 may detect the frame pulse, not necessarily from the demodulated signal, but directly from the radio wave received by the antenna 17, and generate the clock signal.
The control circuit 15 decodes the demodulated signal generated by the receive circuit 12, and extracts and analyzes the command, and writes or reads the data to/from the storage circuit 16 based on this command. For example, if the received command is a write command, the control circuit 15 turns ON/OFF the write control signal for controlling the write operation of the storage circuit 16, and turns ON/OFF the charge pump control signal for controlling the charge pump operation of the storage circuit 16. The control circuit 15 also generates the data signal to be transmitted to the reader/writer 2 based on the data read from the storage circuit 16, and outputs this data signal to the transmission circuit 13.
The storage circuit 16 is a memory for storing the data received from the reader/writer 2, such as a non-volatile memory. The storage circuit 16 stores the data or outputs the stored data according to the control of the control circuit 15. The non-volatile memory of the storage circuit 16 may be EEPROM (Electrically Erasable Programmable ROM), flash memory, FeRAM (Ferroelectric RAM), MRAM (Magnetic RAM) or OUM (Ovonic Unified Memory). The storage circuit 16 also has a boosting circuit such as a charge pump, so that the power supply voltage is boosted to a voltage required for writing by this boosting circuit when data is written.
Now the communication method according to the present embodiment will be described with reference to the flow chart in
First the transmission command is acquired (S501). The transmission command acquisition circuit 31 acquires the transmission command, such as a write command and a read command, from a computer. The transmission command acquisition circuit 31 outputs this transmission command to the data signal generation circuit 32.
Then whether the transmission command is a write command or not is judged (S502). The data signal generation circuit 32 judges whether the transmission command acquired in S501 is a write command.
If it is judged that the transmission command is a write command in S502, data on the command execution period is acquired (S503). The data signal generation circuit 32, acquires the data on the execution period of the write command from the execution period storage circuit 34. S503 is executed before S505, so it may be executed after S504.
Then the command is transmitted (S504). The data signal generation circuit 32 encodes the transmission command acquired in S501, generates a frame, and outputs the data signal based on the clock signal generated by the clock generation circuit 24. The data signal generation circuit 32 outputs the data signal to the transmission circuit 23, and the transmission circuit 23 modulates the data signal and sends it to the IC tag 1 via the antenna 21.
Then in the command execution period, the generation of the frame is interrupted (S505). After the data signal generation circuit 32 generates the data signal from the transmission command and outputs it in S504, the data signal generation circuit 32 counts the clock signals using the counter circuit 33, and waits until the command execution period, on which data was acquired in S503, elapses. During the command execution period, the data signal generation circuit 32 interrupts the generation of a frame based on the clock signal, and repeatedly outputs a data signal with a predetermined value, such as “000”. A modulated signal with a predetermined amplitude is generated by the transmission circuit 23, and is transmitted from the antenna 21 to the IC tag 1. After the command execution period elapses, a frame comprised only of a frame pulse is generated based on the clock signal, and the modulated signal, based on the data signal including this frame, is transmitted from the transmission circuit 23.
In other words, according to the present embodiment, in the command acceptance period when a command is accepted by the IC tag 1, the reader/writer 2 transmits a first modulated signal, and in the command execution period when a command is executed by the IC tag 1, the reader/writer 2 transmits a second modulated signal. The first modulated signal is a signal acquired by modulating a frame comprised only of a frame pulse or a frame having such data as a command, as shown in
If it is judged that the transmission command is not a write command in S502, the command is transmitted (S506). Just like S504, the data signal generation circuit 32 converts the transmission command into the data signal, which is transmitted to the IC tag 1 by the transmission circuit 23. In this case, a frame comprised only of a frame pulse is generated by the data signal generation circuit 32 after S506, and the modulated signal based on the data signal including this frame is sent from the transmission circuit 23.
Now the waveforms used for the communication method according to the present embodiment will be described with reference to
The clock signal shown in
Before the reader/writer 2 transmits a command, a frame comprised only of a frame pulse is generated by the data signal generation circuit 32 from the clock signal in
In the command transmission period when a command is transmitted from the reader/writer 2, that is in the command acceptance period when a command is accepted by the IC tag 1, a frame is generated from the data of the transmission command by the data signal generation circuit 32 according to the timing of the clock signal, and is modulated by the transmission circuit 23, and the modulation signal based on the clock signal and the transmission command shown in FIG. 7C is transmitted from the reader/writer 2 to the IC tag 1. For example, just like
In the command execution period in the IC tag 1, a frame is not generated by the data signal generation circuit 32. In other words, encoding is not performed based on the data of the transmission command and the clock signal, amplitude modulation is not performed by the transmission circuit 23, and the modulated signal with a predetermined amplitude, as shown in
Now the operation of the IC tag according to the present embodiment will be described with reference to the timing chart in
When the modulated signal in
The clock generation circuit 14 generates the clock signal shown in
The IC tag 1 generates the internal signal for executing the command synchronizing the clock signal generated based on the frame pulse. However command execution, such as a write operation and an erase operate to the storage circuit, requires a predetermined time, and the control circuit is in response wait status in the period from the start to the end of the write operation and from the start to the end of the erase operation in the storage circuit, so it is not necessary to change the logic of the internal signal during this time. Therefore during command execution, in which it is unnecessary to operate the control circuit, a frame pulse to generate the clock signal for operating the control circuit need not be received. When command execution ends, it is necessary to change the logic of the internal signal synchronizing the clock signal generated based on the restarted frame pulse, in order to control the circuits inside the chip, including the control circuit. Therefore after command execution ends, the reader/writer 2 transmits the frame pulse to generate the clock synchronizing the internal signal inside the IC tag 1.
Now, with reference to
The storage circuit 16 starts the write operation when the write control signal turns ON, and stops the write operation when it turns OFF. The storage circuit 16 starts boosting the power supply voltage by the charge pump when the charge pump signal turns ON, and stops boosting the power supply voltage by the charge pump when it turns OFF.
In this way, during a period other than the command execution period in the IC tag (period when no command is sent and a command transmission period), a frame including the clock signal is generated and modulated, and is sent to the IC tag, so that the IC tag can efficiently receive the operation clock and command. During the command execution period in the IC tag, a frame including the clock signal is not generated or modulated, and a modulated signal with a predetermined amplitude is sent from the reader/writer to the IC tag, that is the modulated signal which does not include a frame pulse is sent, so that the radio wave can be used efficiently, and the power supply voltage generation time of the IC tag can be decreased. Particularly in the write operation, which requires high voltage in the IC tag, the present invention can decrease the write operation time.
In the IC tag, the signal including the clock signal (frame pulse) is received from the reader/writer after the command execution period, so the end of the command execution period can be detected, and at this timing, the internal signals required for completing the command, such as the write control signal and the charge pump control signal, can be generated. Therefore the configuration for detecting a predetermined period for generating these control signals, such as installing and operating the counter circuit for counting the frame pulse during the command execution period, is unnecessary. As a result, the circuit configuration of the IC tag can be simplified, and power consumption during command execution can be decreased.
In the present embodiment, the counter circuit is installed in the reader/writer side to detect a predetermined period, but this counter circuit can be used not only for the command execution period, but for controlling the command transmission space, so if the counter circuit is shared for these functions, the circuit configuration of the reader/writer can be simplified.
In the above example, the modulated signal is controlled during the command execution period of the write command, but this is not limited to the write command, but may be applied to other commands, such as the read command. The execution periods of a plurality of commands may be stored in the execution period storage circuit 34, and an applicable command may be retrieved at transmission.
In the above example, the modulated signal to be transmitted from the reader/writer is controlled by the data signal generation circuit 32 of the control circuit 25, but this may be controlled by the transmission circuit 23. For example, in the transmission circuit 23, a modulated signal with a predetermined amplitude may be output without amplitude modulation during the command execution, regardless the difference of the data signals.
In the above example, transmission/reception was performed with keeping the amplitude of the modulated signal constant during the command execution period, but the amplitude of the modulated signal may be changed during a part of the command execution period. For example, it is preferable that the change of the amplitude of the modulated signal is less in the command execution period than in a period other than the command execution period, and it is preferable that the average value of the amplitude of the modulated signal is greater in the command execution period than in a period other than the command execution period.
It is apparent that the present invention is not limited to the above embodiment and it may be modified and changed without departing from the scope and spirit of the invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2004-222598 | Jul 2004 | JP | national |
