Real-time load current detecting circuit for CPU

Abstract

A real-time load current detecting circuit composed of a power supply circuit, a delay circuit, a current sensing circuit, and a current feedback circuit. The power supply circuit is adapted for providing the CPU with a power source. The delay circuit includes a resistor and a capacitor, connected to the power supply circuit. The current sensing circuit includes a comparison circuit connected to the delay and power supply circuits. The current feedback circuit includes a feedback current source and a resistor, connected to the current sensing circuit. The feedback current source is adapted for mirroring a current sensed by the current sensing circuit. In light of this, the current can be accurately monitored and detected and there is hardly inaccuracy for the detection of the current.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic view of a circuitry of a preferred embodiment of the present invention.

FIG. 2 is a schematic view of a conventional load current detecting device.

FIG. 3 is a schematic view of a conventional current load detecting device.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Referring to FIG. 1, a real-time load current detecting circuit 10 for a CPU, constructed according to a preferred embodiment of the present invention, is composed of a power supply circuit 11, a delay circuit 21, a current sensing circuit 31, and a current feedback circuit 41.

The power supply circuit 11 is adapted for providing the CPU (not shown) with a power source. The power supply circuit 11 includes a power driver 12, two switches 14, an inductor L together with an equivalent series DC resistance (DCR), and a capacitor C1. The structure of interconnection between the elements of the power supply circuit 11 is identical to that of the second conventional detecting circuit mentioned above, such that no more description is necessary.

The delay circuit 21 includes a resistor R_ISEN and a capacitor C_T, which are serially connected with each other, connected to the power supply circuit 11.

The current sensing circuit 31 includes a comparison circuit 32 composed of an operational (OP) amplifier 34 and connected to the delay circuit 21 and the power supply circuit 11.

The current feedback circuit 41 includes a feedback current source 42 and a resistor R1, which are serially connected with each other, connected to the current sensing circuit 31. The feedback current source 42 is adapted for mirroring a current I_SEN sensed by the current sensing circuit 31.

While the circuit 10 is operated, the power driver 12 provides a power source and the power source is provided through the switches 14, the inductor L, and the capacitor C1 for the CPU (not shown). Since the manner of its power supply is the same as the prior art, no tautological recitation is necessary.

The delay circuit 21 is adapted for matching the current of two input ends of the comparison circuit 32. In light of this, the amperage of the current I_SEN can be derived from the product of a current IL of the inductor L and the ratio of the resistance DCR to the resistor R_ISEN of the delay circuit 21. The equation (1) is shown below:

$I_{\mathrm{SEN}}=\frac{\mathrm{DCR}}{R_{\mathrm{ISEN}}}·I_L$

The current feedback circuit 41 employs the feedback current source 42 in connection with an output end of the OP amplifier 34 to detect an effective current by means of current mirror and employs the resistor R1 to detect the current of the feedback current source 42. In light of this, the resistor R1 affects neither the current of the power supply circuit 11 nor the sensed current I_SEN calculated by the equation (1), such that accurate amperage of the current can be detected. Further, the current can be monitored and detected without any inaccuracy.

Although the present invention has been described with respect to a specific preferred embodiment thereof, it is no way limited to the details of the illustrated structures but changes and modifications may be made within the scope of the appended claims.

Claims

1. A real-time load current detecting circuit for a central processing unit (CPU), comprising: a power supply circuit for providing said CPU with a power source;a delay circuit having a resistor and a capacitor and connected to said power supply circuit;a current sensing circuit having a comparison circuit connected to said delay circuit and said power supply circuit; anda current feedback circuit having a feedback current source and a resistor and connected to said current sensing circuit, said feedback current source being provided for mirroring a current sensed by said current sensing circuit.

2. The real-time load current detecting circuit as defined in claim 1, wherein said resistor and said capacitor of said delay circuit are interconnected.

3. The real-time load current detecting circuit as defined in claim 1, wherein said feedback current source is serially connected with said resistor of said current feedback circuit.

4. The real-time load current detecting circuit as defined in claim 1, wherein said comparison circuit includes an operational (OP) amplifier.