This disclosure relates generally to detection of moving objects responsive to an average of magnitudes of a sum of collections of reflected predetermined pattern samples and a predetermined threshold value.
Some radar systems may detect moving objects based on the Doppler effect. Specifically, a continuous wave radio frequency (RF) signal may be transmitted, and the transmitted and received RF signals may be mixed to generate a Doppler signal. A Doppler frequency of the Doppler signal may be proportional to the speed of the detected moving object relative to a stationary transmitter and receiver, enabling the radar system to detect the velocity of the moving object in the direction of the radar system. In addition to continuous wave signals, pulse signals and frequency modulated signals may also be used to measure the distance between a radar antenna and a detected object.
Short range radar devices may include a transmitter and receiver, often implemented into a single device, which operate synchronously at, by way of non-limiting example, a frequency range of substantially twenty-four gigahertz (24 GHz) or seventy-seven gigahertz (77 GHz). These devices may use analog RF signals for the transmitter and receiver where the received and amplified signal is multiplied with the transmitted RF signal to generate the Doppler signal. As previously mentioned, the velocity of a moving object may be detected responsive to a frequency of the Doppler signal, which may require the combination of one transmitter and one receiver in one device and to operate the transmitter and the receiver synchronously. The use of a Doppler signal in this way to detect velocity may be limited to velocity detection in a direction of the short range radar device.
While this disclosure concludes with claims particularly pointing out and distinctly claiming specific examples, various features and advantages of examples within the scope of this disclosure may be more readily ascertained from the following description when read in conjunction with the accompanying drawings, in which:
In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which are shown, by way of illustration, specific examples in which the present disclosure may be practiced. These examples are described in sufficient detail to enable a person of ordinary skill in the art to practice the present disclosure. However, other examples enabled herein may be utilized, and structural, material, and process changes may be made without departing from the scope of the disclosure.
The illustrations presented herein are not meant to be actual views of any particular method, system, device, or structure, but are merely idealized representations that are employed to describe the examples of the present disclosure. In some instances, similar structures or components in the various drawings may retain the same or similar numbering for the convenience of the reader; however, the similarity in numbering does not necessarily mean that the structures or components are identical in size, composition, configuration, or any other property.
The following description may include examples to help enable one of ordinary skill in the art to practice the disclosed examples. The use of the terms “exemplary,” “by example,” and “for example,” means that the related description is explanatory, and though the scope of the disclosure is intended to encompass the examples and legal equivalents, the use of such terms is not intended to limit the scope of an example or this disclosure to the specified components, steps, features, functions, or the like.
It will be readily understood that the components of the examples as generally described herein and illustrated in the drawings could be arranged and designed in a wide variety of different configurations. Thus, the following description of various examples is not intended to limit the scope of the present disclosure, but is merely representative of various examples. While the various aspects of the examples may be presented in the drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
Furthermore, specific implementations shown and described are only examples and should not be construed as the only way to implement the present disclosure unless specified otherwise herein. Elements, circuits, and functions may be shown in block diagram form in order not to obscure the present disclosure in unnecessary detail. Conversely, specific implementations shown and described are exemplary only and should not be construed as the only way to implement the present disclosure unless specified otherwise herein. Additionally, block definitions and partitioning of logic between various blocks is exemplary of a specific implementation. It will be readily apparent to one of ordinary skill in the art that the present disclosure may be practiced by numerous other partitioning solutions. For the most part, details concerning timing considerations and the like have been omitted where such details are not necessary to obtain a complete understanding of the present disclosure and are within the abilities of persons of ordinary skill in the relevant art.
Those of ordinary skill in the art will understand that information and signals may be represented using any of a variety of different technologies and techniques. Some drawings may illustrate signals as a single signal for clarity of presentation and description. It will be understood by a person of ordinary skill in the art that the signal may represent a bus of signals, wherein the bus may have a variety of bit widths and the present disclosure may be implemented on any number of data signals including a single data signal.
The various illustrative logical blocks, modules, and circuits described in connection with the examples disclosed herein may be implemented or performed with a general purpose processor, a special purpose processor, a digital signal processor (DSP), an Integrated Circuit (IC), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor (may also be referred to herein as a host processor or simply a host) may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. A general-purpose computer including a processor is considered a special-purpose computer while the general-purpose computer executes computing instructions (e.g., software code) related to examples of the present disclosure.
The examples may be described in terms of a process that is depicted as a flowchart, a flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe operational acts as a sequential process, many of these acts can be performed in another sequence, in parallel, or substantially concurrently. In addition, the order of the acts may be re-arranged. A process may correspond to a method, a thread, a function, a procedure, a subroutine, a subprogram, other structure, or combinations thereof. Furthermore, the methods disclosed herein may be implemented in hardware, software, or both. If implemented in software, the functions may be stored or transmitted as one or more instructions or code on computer-readable media. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another.
Any reference to an element herein using a designation such as “first,” “second,” and so forth does not limit the quantity or order of those elements, unless such limitation is explicitly stated. Rather, these designations may be used herein as a convenient method of distinguishing between two or more elements or instances of an element. Thus, a reference to first and second elements does not mean that only two elements may be employed there or that the first element must precede the second element in some manner. In addition, unless stated otherwise, a set of elements may include one or more elements.
As used herein, the term “substantially” in reference to a given parameter, property, or condition means and includes to a degree that one of ordinary skill in the art would understand that the given parameter, property, or condition is met with a small degree of variance, such as, for example, within acceptable manufacturing tolerances. By way of example, depending on the particular parameter, property, or condition that is substantially met, the parameter, property, or condition may be at least 90% met, at least 95% met, or even at least 99% met.
Ultra-wideband (UWB) is one example of a technology that may be used for short-range, high-bandwidth communications and radar applications. UWB radar devices, which utilize a bandwidth of >500 MHz, may be used to identify a position of an object using a receiver that is synchronized with a transmitter to determine time separations between pulses in a transmit signal and pulses in a receive signal. Due to its use of relatively short pulses, UWB may enable relatively precise distance and localization detection. UWB radar devices that detect positions of objects may be capable of detecting motion by monitoring changes in distance over time to detect velocity.
Examples disclosed herein utilize a channel impulse response (CIR) to detect motion. As used herein, the term “CIR signal” refers to a sum of a plurality of collections of samples (sometimes referred to herein as “reflected predetermined pattern samples”) taken of a reflected predetermined pattern signal provided by a receiver antenna at a receiver responsive to a predetermined pattern signal driving a transmitter antenna of a transmitter. Each collection of the plurality of collections corresponds to a predetermined time window. The samples each represent a value of a received wave. Magnitudes of the CIR signal thus represent the total energy of the samples over the predetermined time window. The CIR signal may describe a behavior of a transmission channel between a transmitter and a receiver.
As a non-limiting example, a first collection of reflected predetermined pattern samples (e.g., 256 samples) may be taken over a predetermined time window (e.g., a 256 nanosecond predetermined time window, one sample per nanosecond). A length of the predetermined time window may be selected to fit the predetermined pattern signal at the transmitter (e.g., the predetermined pattern signal may pulse every 256 nanoseconds). A second collection of the reflected predetermined pattern samples may then be taken and added to the first collection of reflected predetermined pattern samples. Subsequent collections of the reflected predetermined pattern signals may then be added to the total over a span of time (e.g., forty microseconds, corresponding to 156 predetermined time windows of 256 ns each) to produce a CIR signal, which may be a sum of the plurality of collections (e.g., 156 collections for a 256 nanosecond predetermined time window and a span of time of 40 microseconds). An average of magnitudes of values of the CIR signal may be taken to compare with a predetermined threshold value to determine whether a moving object is present (e.g., determine that a moving object is present responsive to the average of magnitudes of values of the CIR signal exceeding the predetermined threshold value).
Motion sensing capabilities disclosed herein may be added to a position detecting radar system (e.g., via software or firmware updates or upgrades) in addition to existing capabilities to provide motion sensing capabilities to a position sensing radar system (e.g., a radar system including one or more UWB radar devices, without limitation). For example, an existing radar device coupled to a rear of a vehicle that is originally to detect a distance between the rear of the vehicle to an object behind the vehicle may be updated with motion sensing capabilities disclosed herein to detect a gesture (e.g., a kicking motion) to trigger opening of a trunk of the vehicle. Also, UWB devices (e.g., 6-8 GHz UWB devices) for distance bounding for car access and short range radar application may be adapted for motion sensing according to examples disclosed herein. Examples disclosed herein may also be used to detect seat occupancy, to trigger passive entry systems in vehicles, to control devices and machines via gestures, and to perform other functions as will be apparent to those of ordinary skill in the art based on this disclosure.
Examples disclosed herein may not necessarily perform an analysis of a received RF signal itself and may not necessarily use synchronous operation between the transmitter and the receiver. The implementation may instead use a predetermined pattern signal (e.g., a predetermined pulse sequence of a data signal), which is accumulated over time to form a CIR signal of the transmission path between the transmitter and the receiver. Such a CIR signal may be processed by calculating an average of magnitudes of a sum of reflected predetermined pattern samples, which represents the distribution of the CIR signal over a predetermined time interval, which predetermined time interval may be a 256 nanosecond time interval (given by a pulse interval of a data telegram, described further below).
To suppress noise in the captured CIR signal, gain control (GC) is set to a fixed level above the noise level and only reflected signal components that have the right data telegram pattern (e.g., alternating “0” and “1” symbols with a fixed distance of the predetermined time interval) are captured by the receivers. The receiver frontend (e.g., an analog to digital converter (ADC) of the frontend) may have a limited input range. A dynamic range of a signal provided to the receiver frontend should be adjusted to match the limited input range of the receiver frontend. The GC with a fixed gain level may be used to define a pulse energy detection window for a limited dynamic range of the receiver (e.g., the sensitivity of the radar system). If the gain setting is too low, no RF signal may be detected (e.g., the RF signal may be below a noise floor at the receiver frontend). If the gain is set too high, noise of the signal provided to the receiver may be amplified to the limited input range and the dynamic range of the signal provided to the receiver may not be outside of the limited dynamic range of the receiver, and therefore may not be detected. Gain control may enable the use of multiple receivers to capture the CIR signals from different directions and to cover a certain area and range to detect moving objects. This setup may also be influenced by the antennas and the antenna patterns for the transmitter and the receivers. These antenna patterns may define the area and range that is covered to detect moving objects.
In one or more examples, a-priori knowledge of the structure of a transmitted data signal (e.g., fixed pattern of the preamble, without limitation) may be used by receiver devices (also referred to herein as “receivers”). Such a receiver may “lock” to this signal pattern (at the RF frequencies of the 0 and 1 symbols and on the time interval between these symbols) and may detect changes in the timing of the captured pattern. The respective gains at the receivers (GC) are adjusted to recognize only the reflected data signal and suppress noise.
Examples disclosed herein use digital data patterns of the captured CIR signal and determine changes in the CIR signal that characterize a moving object. The devices may operate asynchronously instead of using synchronous receiver(s) and transmitter. Examples disclosed herein may also function as described even where the receivers and transmitters are synchronized. Where unsynchronized, however, multiple receivers may be used to determine an area that will be covered to detect moving objects. These multiple receivers may be located at different spatial positions without wired connections to the transmitter or to other receivers.
Examples disclosed herein enable the use of devices, such as UWB devices, without limitation, for additional applications beyond distance measurement, such as proximity detection, gesture recognition, and detection of moving objects. Examples disclosed herein may utilize build-in test modes and debug features of UWB devices, with or without any hardware modification of an existing UWB device. Examples of UWB devices that may be modified based on examples disclosed herein include the ATA5350, ATA5352, ATA8350, and ATA8352 UWB devices manufactured by Microchip Technology Inc., headquartered in Chandler, Ariz. Non-limiting examples of use cases for examples disclosed herein may include automotive applications (e.g., detection of a foot kick movement so as to open a trunk, passenger detection on car seats), home appliance applications (e.g., proximity detection for door opening), industrial automation control (e.g., one dimensional, two dimensional, and three dimensional gesture detection), home security applications, and any application that uses proximity detection or gesture recognition.
In contrast with short range radar devices that use analog RF signals at 24 GHz or 77 GHz to determine the Doppler frequency of a moving object, which may require the combination of one transmitter and one receiver in one device and to operate synchronously, some examples disclosed herein may use the CIR signal captured by the receiver at 7 GHz to detect moving objects. In some examples, the CIR signal may be captured by the receiver at 6-8 GHz, or other frequencies (e.g., at 24 GHz or 77 GHz). The receiver or receivers may operate asynchronously or synchronously to the transmitter. The use of several receiver devices allows the recognition of movement directions for gesture recognition or coverage of a predefined area.
Examples disclosed herein may not necessarily measure distance or speed of a moving object. Examples disclosed herein, however, may detect object movements in any direction within the detection range. The use of several receiver devices may enable detection of moving objects in an expanded area or to detect gestures and proximity.
In the example of
The receivers 104a, 104b may each include respective receiver processing circuitry (e.g., the receiver 104a includes receiver processing circuitry 108a and the receiver 104b includes the receiver processing circuitry 108b) and a receiver antenna (e.g., the receiver 104a includes a receiver antenna 112a and the receiver 104b includes a receiver antenna 112b).
Responsive to transmission, by the transmitter 102, of the transmitted predetermined pattern wave 120, the receiver antennae 112a, 112b may receive respective reflected predetermined pattern waves 122a, 122b, and provide respective reflected predetermined pattern signals 118a, 118b to the respective receiver processing circuitry 108a, 108b. The receiver processing circuitry 108a, 108b may respectively accumulate collections of samples of the respective reflected predetermined pattern signals 118a, 118b while in a receive mode. Specifically, the respective receiver processing circuitry 108a, 108b may sample the reflected predetermined pattern signals 118a, 118b (e.g., for a time span of substantially forty microseconds), determine a sum (SUM1 from the receiver processing circuitry 108a and SUM2 from the receiver processing circuitry 108b) of collections (e.g., substantially 156 collections) of the samples of the reflected predetermined pattern signals 118a, 118b, each collection of samples taken over a predetermined time window (e.g., substantially 256 nanoseconds, without limitation), and determine whether a moving object is sensed responsive to an average of magnitudes of sums (SUM1 and SUM2) of the collections of samples of the reflected predetermined pattern signals 118a, 118b and a predetermined threshold value. The samples of the reflected predetermined pattern signals 118a, 118b each represent values of a received wave, and thus magnitudes (absolute values) of the sum of collections of the samples of the reflected predetermined pattern signals 118a, 118b over the predetermined time window represents the total energy of the samples over the predetermined time window.
Due to the asynchronous operation of the transmitter 102 and the at least one receiver 104a, 104b and the movement of a reflecting object (e.g., a human), magnitudes of the CIR signal exhibit different distributions with saturation effects for a static object than for a moving object. In case of a static object only small portions of the CIR signal magnitudes exhibit a signal level that is greater than substantially zero. In case of a moving object, larger portions of the CIR signal magnitudes exhibit a signal level that is greater than substantially zero as compared to those of the case of the static object and the case of no object. The CIR signal magnitudes may be averaged to generate an average, which is an average of the magnitudes of values of a CIR signal (e.g., an average of magnitudes of a sum of a plurality of collections of the reflected predetermined pattern signals). By thus generating an average, a moving object may be detected by comparing the average to a predetermined threshold value.
A first sum signal SUM1 (a first CIR signal), which is a sum of each of the collections of samples, may be related to the movement of the moving object 114 within a detection area 124a of the receiver 104a. This first sum signal SUM1 may be generated by receiver 104a, which may operate independently from the transmitter 102 (
The position, antenna pattern, and orientation of the transmit antenna 110 and the receiver antennae 112a, 112b may determine the active area and the range where movement of the moving object 114 is detected.
The CIR signal (e.g., SUM1 or SUM2 over time) may be captured during a preamble PR of a data telegram 200 (see
The data telegram 200 may be a binary frequency-shift keying (BFSK) signal. Accordingly, in some examples, where the preamble signal PR indicates a “1,” the preamble signal PR (and the predetermined pattern signal 116 of
The receiver processing circuitry 300 includes an analog input terminal 304 to receive a reflected predetermined pattern signal 302 (e.g., one of the reflected predetermined pattern signals 118a, 118b of
The receiver processing circuitry 300 also includes an analog to digital converter (ADC) circuitry 306 to sample the amplified reflected predetermined pattern signal 302 received by the analog input terminal 304 and amplified by the adjustable gain amplifier 326 to generate reflected predetermined pattern samples 308. By way of non-limiting example, the adjustable gain amplifier 326 may amplify the reflected predetermined pattern signal 302 into an operational input range of the ADC circuitry 306, which may be a dynamic range of a receiver including the receiver processing circuitry 300.
The receiver processing circuitry 300 includes a processor 310 (e.g., one or more processing cores). The processor 310 may provide the GC signal 328 to the adjustable gain amplifier 326 to adjust the adjustable gain A of the adjustable gain amplifier 326. Stated another way, the processor 310 adjusts the gain of the receiver processing circuitry 300.
The processor 310 implements an integrator 324 (e.g., implemented in hardware and/or in software) that integrates, for a time span (e.g., 40 μs), the collections of reflected predetermined pattern samples 308, each of the collections taken over a predetermined time window (e.g., 256 ns). The integrator 324 may accumulate the collections of reflected predetermined pattern samples 308 over a time span (e.g., 40 μs) to provide a sum 332 of the collections of reflected predetermined pattern samples 308. The processor 310 may then use the sum 332 to determine an average 312 of magnitudes of the sum 332 (e.g., an average of magnitudes of one of SUM1 or SUM2 of
In some examples, operation 316 (determining whether a moving object is sensed) includes operation 318 and operation 320. In such examples, at operation 318 the processor 310 divides the average 312 by a number of the reflected predetermined pattern samples in the predetermined time window to generate a normalized average sum. At operation 320 the processor 310 determines that the moving object is sensed responsive to the normalized average exceeding the predetermined threshold value 314.
In some examples, operation 316 (determining whether a moving object is sensed) includes operation 322. In such examples, at operation 322 the processor 310 determines that the moving object is sensed responsive to the determined average 312 exceeding the predetermined threshold value 314. In some examples, determining whether a moving object is sensed may include determining a direction of movement of a moving object responsive to magnitudes of the sum 332 and magnitudes of another sum (not shown) from another receiver (not shown). By way of non-limiting example, a shift in time of magnitudes of a sum from one receiver as compared to magnitudes of a sum of another receiver may be analyzed to determine a direction of motion of a moving object.
In some examples, the processor 310 may output a trigger signal 330 responsive to a determination, at operation 316, that the moving object is detected. A receiver (e.g., the receivers 104a, 104b of
The vehicle 402 also includes a trunk 404 and a vehicle trunk opening mechanism 406, such as an electronically controllable latch, that opens the trunk 404 responsive to the trigger signal 412. Accordingly, responsive to a determination that a moving object is detected within the total detection area of the one or more receivers 410, the one or more receivers 410 may provide the trigger signal 412 to the vehicle trunk opening mechanism 406, triggering the vehicle trunk opening mechanism 406 to open the trunk 404. By way of non-limiting example, the motion detection system 400 may trigger the opening of the trunk 404 responsive to a detection of a kick motion of a person within the total detection area. As a result, a person that is carrying a load of items to be placed in the trunk or that otherwise does not have free hands to manually open the trunk 404 may open the trunk 404 using a motion gesture.
The trigger signal 510 may trigger the door opening mechanism 508 to open the automatic door 502. Accordingly, responsive to the one or more receivers 506 detecting motion such as a moving person 512 within a total detection area (e.g., the total detection area 126 of
Each of the one or more motion detection systems 602 may include a transmitter 604 similar to the transmitter 102 of
The trigger signal 612 may trigger the industrial automation controller 608 to control the actuators 610 to perform or stop performing any of a variety of different functions. By way of non-limiting example, if one of the one or more motion detection systems 602 provides a trigger signal 612 to the industrial automation controller 608 corresponding to a detected motion near moving parts of the industrial automation system 600, the industrial automation controller 608 may stop those moving parts from moving. In such an example, a moving person or moving limb (e.g., arm, leg, hand) of a person may not be damaged or crushed by the moving parts because the detected movement of the person triggered the industrial automation controller 608 to stop moving the moving parts.
With a predetermined threshold value 906 (e.g., threshold=400 in
The average sum s(t) (e.g., the average sum magnitudes 902) may be determined as follows:
where p is a fixed factor to adjust a range of the average sum magnitudes 902 to a predetermined range (e.g., from 0 to 1000), nsamples is a number of samples in the predetermined time window (e.g., 256 samples, without limitation), and E(k) is the magnitude of the sums of the collections of reflected predetermined pattern samples, which are to be averaged at points.
At operation 1004 the method 1000 includes determining an average of magnitudes of a sum of collections of the reflected predetermined pattern samples over time, each collection of the plurality of collections corresponding to a predetermined time window. In some examples determining the average includes integrating values of the collections of reflected predetermined pattern samples overtime (e.g., using the integrator 324 of
At operation 1008 the method 1000 includes determining that a moving object is detected responsive to the determined average sum of and a predetermined threshold value.
At operation 1106 the method 1100 includes receiving, by a receiver antenna of a receiver, a reflected predetermined pattern wave responsive to the predetermined pattern signal provided to the transmit antenna. At operation 1108 the method 1100 includes sampling, by receiver processing circuitry of the receiver, a reflected predetermined pattern signal responsive to the reflected predetermined pattern wave to generate reflected predetermined pattern samples.
At operation 1110 the method 1100 includes determining an average of magnitudes of a sum of collections of the reflected predetermined pattern samples, each collection of the plurality of collections corresponding to a predetermined time window. At operation 1112 the method 1100 includes determining that a moving object is detected responsive to the determined average and a predetermined threshold value. In some examples, determining that the moving object is detected includes determining that the moving object is detected responsive to the determined average exceeding the predetermined threshold value at operation 1114.
It will be appreciated by those of ordinary skill in the art that functional elements of examples disclosed herein (e.g., functions, operations, acts, processes, and/or methods) may be implemented in any suitable hardware, software, firmware, or combinations thereof.
When implemented by logic circuitry 1208 of the processors 1202, the machine executable code 1206 is to adapt the processors 1202 to perform operations of examples disclosed herein. For example, the machine executable code 1206 may be to adapt the processors 1202 to perform at least a portion or a totality of the method 1000 of
The processors 1202 may include a general purpose processor, a special purpose processor, a central processing unit (CPU), a microcontroller, a programmable logic controller (PLC), a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, other programmable device, or any combination thereof designed to perform the functions disclosed herein. A general-purpose computer including a processor is considered a special-purpose computer while the general-purpose computer is to execute functional elements corresponding to the machine executable code 1206 (e.g., software code, firmware code, hardware descriptions) related to examples of the present disclosure. It is noted that a general-purpose processor (may also be referred to herein as a host processor or simply a host) may be a microprocessor, but in the alternative, the processors 1202 may include any conventional processor, controller, microcontroller, or state machine. The processors 1202 may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
In some examples, the storage 1204 includes volatile data storage (e.g., random-access memory (RAM)), non-volatile data storage (e.g., Flash memory, a hard disc drive, a solid state drive, erasable programmable read-only memory (EPROM), etc.). In some examples, the processors 1202 and the storage 1204 may be implemented into a single device (e.g., a semiconductor device product, a system on chip (SOC), etc.). In some examples, the processors 1202 and the storage 1204 may be implemented into separate devices.
In some examples, the machine executable code 1206 may include computer-readable instructions (e.g., software code, firmware code). By way of non-limiting example, the computer-readable instructions may be stored by the storage 1204, accessed directly by the processors 1202, and executed by the processors 1202 using at least the logic circuitry 1208. Also by way of non-limiting example, the computer-readable instructions may be stored on the storage 1204, transferred to a memory device (not shown) for execution, and executed by the processors 1202 using at least the logic circuitry 1208. Accordingly, in some examples, the logic circuitry 1208 includes electrically configurable logic circuitry 1208.
In some examples, the machine executable code 1206 may describe hardware (e.g., circuitry) to be implemented in the logic circuitry 1208 to perform the functional elements. This hardware may be described at any of a variety of levels of abstraction, from low-level transistor layouts to high-level description languages. At a high-level of abstraction, a hardware description language (HDL) such as an IEEE Standard hardware description language (HDL) may be used. By way of non-limiting examples, VERILOG™, SYSTEMVERILOG™ or very large scale integration (VLSI) hardware description language (VHDL™) may be used.
HDL descriptions may be converted into descriptions at any of numerous other levels of abstraction as desired. As a non-limiting example, a high-level description can be converted to a logic-level description such as a register-transfer language (RTL), a gate-level (GL) description, a layout-level description, or a mask-level description. As a non-limiting example, micro-operations to be performed by hardware logic circuits (e.g., gates, flip-flops, registers, without limitation) of the logic circuitry 1208 may be described in a RTL and then converted by a synthesis tool into a GL description, and the GL description may be converted by a placement and routing tool into a layout-level description that corresponds to a physical layout of an integrated circuit of a programmable logic device, discrete gate or transistor logic, discrete hardware components, or combinations thereof. Accordingly, in some examples, the machine executable code 1206 may include an HDL, an RTL, a GL description, a mask level description, other hardware description, or any combination thereof.
In examples where the machine executable code 1206 includes a hardware description (at any level of abstraction), a system (not shown, but including the storage 1204) may be to implement the hardware description described by the machine executable code 1206. By way of non-limiting example, the processors 1202 may include a programmable logic device (e.g., an FPGA or a PLC) and the logic circuitry 1208 may be electrically controlled to implement circuitry corresponding to the hardware description into the logic circuitry 1208. Also by way of non-limiting example, the logic circuitry 1208 may include hard-wired logic manufactured by a manufacturing system (not shown, but including the storage 1204) according to the hardware description of the machine executable code 1206.
Regardless of whether the machine executable code 1206 includes computer-readable instructions or a hardware description, the logic circuitry 1208 is adapted to perform the functional elements described by the machine executable code 1206 when implementing the functional elements of the machine executable code 1206. It is noted that although a hardware description may not directly describe functional elements, a hardware description indirectly describes functional elements that the hardware elements described by the hardware description are capable of performing.
A non-exhaustive, non-limiting list of examples follows. Not each of the examples listed below is explicitly and individually indicated as being combinable with all others of the examples listed below and examples discussed above. It is intended, however, that these examples are combinable with all other examples unless it would be apparent to one of ordinary skill in the art that the examples are not combinable.
An apparatus, comprising: an analog input terminal of a receiver processing circuitry, the analog input terminal to receive a reflected predetermined pattern signal provided by a receiver antenna; an analog to digital converter (ADC) circuitry to sample the reflected predetermined pattern signal received by the analog input terminal to generate reflected predetermined pattern samples; and a processor to: capture a plurality of collections of the reflected predetermined pattern samples, each collection of the plurality of collections including a predetermined number of the reflected predetermined pattern samples corresponding to a predetermined time window of the reflected predetermined pattern signal; determine an average of magnitudes of a sum of the plurality of collections of the reflected predetermined pattern samples; and determine whether a moving object is sensed responsive to the determined average and a predetermined threshold value.
The apparatus of Example 1, the processor to: divide the determined average by a number of reflected predetermined pattern samples corresponding to the predetermined time window to generate a normalized average; and determine that the moving object is sensed responsive to the normalized average exceeding the predetermined threshold value.
The apparatus of Example 1, the processor to determine that the moving object is sensed responsive to the determined average exceeding the predetermined threshold value.
The apparatus according to any one of Examples 1-3, the receiver processing circuitry to operate asynchronously from a transmitter processing circuitry of a transmitter, the transmitter processing circuitry to generate a predetermined pattern signal to provide the reflected predetermined pattern signal responsive to reflection of a predetermined pattern wave corresponding to the predetermined pattern signal by one or more objects.
The apparatus according to any one of Examples 1-4, the processor to adjust a gain of the receiver processing circuitry.
The apparatus according to any one of Examples 1-5, the processor to determine the determined average by integrating the values of the collections of reflected predetermined pattern samples over time.
The apparatus according to any one of Examples 1-6, wherein the reflected predetermined pattern signal includes a binary frequency shift keying signal.
A system, comprising: a transmitter including a transmitter processing circuitry to generate a predetermined pattern signal; and one or more receivers, each including a respective receiver processing circuitry to: sample a reflected predetermined pattern signal to generate reflected predetermined pattern samples; determine an average of magnitudes of a sum of collections of the reflected predetermined pattern samples over time, each collection of the plurality of collections corresponding to a predetermined time window; and determine that a moving object is detected responsive to the determined average and a predetermined threshold value.
The system of Example 8, wherein the predetermined pattern signal comprises a binary frequency shift keying signal.
The system according to any one of Examples 8 and 9, wherein at least one of the one or more receivers operates asynchronously from the transmitter processing circuitry.
The system according to any one of Examples 8-10, wherein the one or more receivers comprise a plurality of receivers, each of the plurality of receivers having a respective individual detection area associated therewith.
The system of Example 11, wherein the plurality of receivers is positioned relative to a total detection area with the respective individual detection area associated with the each of the plurality of receivers in sum substantially covering the total detection area.
The system according to any one of Examples 8-12, the respective receiver processing circuitry to determine that the moving object is detected responsive to the determined average exceeding the predetermined threshold value.
The system according to any one of Examples 8-13, the one or more receivers to output a trigger signal responsive to a determination that the moving object is detected.
The system of Example 14, comprising at least one of a vehicle trunk opening mechanism, a door opening mechanism, and an industrial automation controller to trigger responsive to the trigger signal.
A method of operating receiver processing circuitry, the method comprising: sampling a reflected predetermined pattern signal to generate reflected predetermined pattern samples; determining an average of magnitudes of a sum of collections of the reflected predetermined pattern samples over time, each collection of the plurality of collections corresponding to a predetermined time window; and determining that a moving object is detected responsive to the determined average and a predetermined threshold value.
The method of Example 16, wherein determining the average comprises integrating values of the plurality of collections of the reflected predetermined pattern samples.
A method of operating a radar system, the method comprising: generating, by transmitter processing circuitry of a transmitter, a predetermined pattern signal including a binary frequency shift keying signal; providing the predetermined pattern signal to a transmit antenna of the transmitter; receiving, by a receiver antenna of a receiver, a reflected predetermined pattern wave responsive to the predetermined pattern signal provided to the transmit antenna; sampling, by receiver processing circuitry of the receiver, a reflected predetermined pattern signal responsive to the reflected predetermined pattern wave to generate reflected predetermined pattern samples; determining an average of magnitudes of a sum of collections of the reflected predetermined pattern samples over time, each collection of the plurality of collections corresponding to the predetermined time window; and determining that a moving object is detected responsive to the determined average and a predetermined threshold value.
The method of Example 18, wherein determining that the moving object is detected comprises determining that the moving object is detected responsive to the determined average exceeding the predetermined threshold value.
A receiver processing circuitry comprising: an analog input terminal configured to receive a reflected test pattern signal received via a receiver antenna; an analog to digital converter (ADC) circuitry configured to sample the reflected test pattern signal received by the analog input terminal to generate reflected test pattern samples; and a processor configured to: determine a sum of channel impulse response values over a predetermined time window responsive to the reflected test pattern samples; and determine whether a moving object is sensed responsive to the determined sum of the channel impulse response values and a predetermined threshold value.
The receiver processing circuitry of Example 20, wherein the processing core is configured to determine whether the moving object is sensed responsive to the determined sum of the channel impulse response values and the predetermined threshold value by: dividing the sum of the channel impulse response values by a number of test pattern samples corresponding to the predetermined time window to generate a normalized sum; and determining that the moving object is sensed responsive to the normalized sum exceeding the predetermined threshold value.
The receiver processing circuitry of Example 20, wherein the processing core is configured to determine whether the moving object is sensed responsive to the determined sum of the channel impulse response values and the predetermined threshold value by determining that the moving object is sensed responsive to the determined sum of the channel impulse response values exceeding the predetermined threshold value.
The receiver processing circuitry according to any one of Examples 20-22, wherein the receiver processing circuitry is configured to operate asynchronously from transmitter processing circuitry of a transmitter, the transmitter processing circuitry configured to generate a test pattern signal to provide the reflected test pattern signal responsive to reflection of the test pattern signal by one or more objects.
The receiver processing circuitry according to any one of Examples 20-23, wherein the processing core is configured to adjust a gain of the receiver.
The receiver processing circuitry according to any one of Examples 20-24, wherein the processing core is configured to determine the sum of the channel impulse response values by integrating the channel impulse response values over the predetermined time window.
The receiver processing circuitry according to any one of Examples 20-25, wherein the test pattern signal includes a binary frequency shift keying signal.
A radar system, comprising: a transmitter including transmitter processing circuitry configured to generate a test pattern signal; and one or more receivers including receiver processing circuitry configured to: sample a reflected test pattern signal to generate reflected test pattern samples; determine a sum of channel impulse response values over a predetermined time window responsive to the reflected test pattern samples; and determine that a moving object is detected responsive to the sum of the channel impulse response values and a predetermined threshold value.
The radar system of Example 27, wherein the test pattern signal comprises a binary frequency shift keying signal.
The radar system according to any one of Examples 27 and 28, wherein at least one of the one or more receivers is configured to operate asynchronously from the transmitter processing circuitry.
The radar system according to any one of Examples 27-29, wherein the one or more receivers comprise a plurality of receivers, each of the plurality of receivers having an individual detection area associated therewith.
The radar system of Example 30, wherein the plurality of receivers are positioned relative to a total detection area with individual detection areas associated with the plurality of receivers substantially covering the total detection area.
The radar system according to any one of Examples 27-31, wherein the receiver processing circuitry is configured to determine that the moving object is detect by: determining an average of the channel impulse response values responsive to the sum of the channel impulse response values; and determining that the moving object is detected responsive to the average of the channel impulse response values exceeding the predetermined threshold value.
The radar system according to any one of Examples 27-32, wherein the receiver processing circuitry is configured to determine that the moving object is detect by determining that the moving object is detected responsive to the sum of channel impulse response values exceeding the predetermined threshold value.
The radar system according to any one of Examples 27-33, further comprising a mechanism configured to trigger responsive to a determination that the moving object is detected.
The radar system of Example 34, wherein the mechanism comprises a mechanism selected from the group consisting of a vehicle trunk opening mechanism, a door opening mechanism, and an industrial automation controller.
A method of operating receiver processing circuitry, the method comprising: sampling a reflected test pattern signal to generate reflected test pattern samples; determining a sum of channel impulse response values over a predetermined time window responsive to the reflected test pattern samples; and determining that a moving object is detected responsive to the sum of the channel impulse response values and a predetermined threshold value.
The method of Example 36, wherein determining the sum of channel impulse response values over the predetermined time window comprises integrating the reflected test pattern samples over the predetermined time window.
A method of operating a radar system, the method comprising: generating, by transmitter processing circuitry of a transmitter, a test pattern signal including a binary frequency shift keying signal; providing the test pattern signal to a transmit antenna of the transmitter; receiving, by a receive antenna of a receiver, a reflected test pattern signal responsive to the test pattern signal provided to the transmit antenna; sampling, by receiver processing circuitry of the receiver, the reflected test pattern signal to generate reflected test pattern samples; determining a sum of channel impulse response values over a predetermined time window responsive to the reflected test pattern samples; and determining that a moving object is detected responsive to the sum of the channel impulse response values and a predetermined threshold value.
The method of Example 38, wherein determining that the moving object is detected responsive to the sum of the channel impulse response values and the predetermined threshold value comprises determining an average of the channel impulse response values and determining that the moving object is detected responsive to the average exceeding the predetermined threshold value.
As used in the present disclosure, the terms “module” or “component” may refer to specific hardware implementations to perform the actions of the module or component and/or software objects or software routines that may be stored on and/or executed by general purpose hardware (e.g., computer-readable media, processing devices, etc.) of the computing system. In some examples, the different components, modules, engines, and services described in the present disclosure may be implemented as objects or processes that execute on the computing system (e.g., as separate threads). While some of the system and methods described in the present disclosure are generally described as being implemented in software (stored on and/or executed by general purpose hardware), specific hardware implementations or a combination of software and specific hardware implementations are also possible and contemplated.
As used in the present disclosure, the term “combination” with reference to a plurality of elements may include a combination of all the elements or any of various different sub-combinations of some of the elements. For example, the phrase “A, B, C, D, or combinations thereof” may refer to any one of A, B, C, or D; the combination of each of A, B, C, and D; and any sub-combination of A, B, C, or D such as A, B, and C; A, B, and D; A, C, and D; B, C, and D; A and B; A and C; A and D; B and C; B and D; or C and D.
Terms used in the present disclosure and especially in the appended claims (e.g., bodies of the appended claims) are generally intended as “open” terms (e.g., the term “including” should be interpreted as “including, but not limited to,” the term “having” should be interpreted as “having at least,” the term “includes” should be interpreted as “includes, but is not limited to,” etc.). As used herein the term “each” means some or a totality, and the term “each and every” means a totality.
Additionally, if a specific number of an introduced claim recitation is intended, such an intent will be explicitly recited in the claim, and in the absence of such recitation no such intent is present. For example, as an aid to understanding, the following appended claims may contain usage of the introductory phrases “at least one” and “one or more” to introduce claim recitations. However, the use of such phrases should not be construed to imply that the introduction of a claim recitation by the indefinite articles “a” or “an” limits any particular claim containing such introduced claim recitation to examples containing only one such recitation, even when the same claim includes the introductory phrases “one or more” or “at least one” and indefinite articles such as “a” or “an” (e.g., “a” and/or “an” should be interpreted to mean “at least one” or “one or more”); the same holds true for the use of definite articles used to introduce claim recitations.
In addition, even if a specific number of an introduced claim recitation is explicitly recited, those skilled in the art will recognize that such recitation should be interpreted to mean at least the recited number (e.g., the bare recitation of “two recitations,” without other modifiers, means at least two recitations, or two or more recitations). Furthermore, in those instances where a convention analogous to “at least one of A, B, and C, etc.” or “one or more of A, B, and C, etc.” is used, in general such a construction is intended to include A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B, and C together, etc.
Further, any disjunctive word or phrase presenting two or more alternative terms, whether in the description, claims, or drawings, should be understood to contemplate the possibilities of including one of the terms, either of the terms, or both terms. For example, the phrase “A or B” should be understood to include the possibilities of “A” or “B” or “A and B.”
While the present disclosure has been described herein with respect to certain illustrated examples, those of ordinary skill in the art will recognize and appreciate that the present invention is not so limited. Rather, many additions, deletions, and modifications to the illustrated and described examples may be made without departing from the scope of the invention as hereinafter claimed along with their legal equivalents. In addition, features from one example may be combined with features of another example while still being encompassed within the scope of the invention as contemplated by the inventor.
This application claims the benefit under 35 U.S.C. § 119(e) of U.S. Provisional Patent Application No. 63/198,948, filed Nov. 24, 2020, and titled “SHORT RANGE RADAR USING CHANNEL IMPULSE RESPONSE INFORMATION AND RELATED SYSTEMS, METHODS, AND DEVICES,” the entire disclosure of which is hereby incorporated herein by reference.
Number | Date | Country | |
---|---|---|---|
63198948 | Nov 2020 | US |